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KR960025751A - 플래쉬 메모리 장치 - Google Patents

플래쉬 메모리 장치 Download PDF

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Publication number
KR960025751A
KR960025751A KR1019940037294A KR19940037294A KR960025751A KR 960025751 A KR960025751 A KR 960025751A KR 1019940037294 A KR1019940037294 A KR 1019940037294A KR 19940037294 A KR19940037294 A KR 19940037294A KR 960025751 A KR960025751 A KR 960025751A
Authority
KR
South Korea
Prior art keywords
memory device
flash memory
memory cell
program
cell group
Prior art date
Application number
KR1019940037294A
Other languages
English (en)
Other versions
KR0142638B1 (ko
Inventor
심현수
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940037294A priority Critical patent/KR0142638B1/ko
Priority to GB9526039A priority patent/GB2296588B/en
Priority to US08/576,055 priority patent/US5610861A/en
Priority to CN95113188A priority patent/CN1089475C/zh
Publication of KR960025751A publication Critical patent/KR960025751A/ko
Application granted granted Critical
Publication of KR0142638B1 publication Critical patent/KR0142638B1/ko

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3486—Circuits or methods to prevent overprogramming of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate programming

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

본 발명은 플래쉬 메모리 장치에 관한 것으로서, 섹터 소거모드시 선행되어야할 프리-프로그램 모드에서 선택된 워드라인별로 프리-프로그램 및 프로그램상태를 확인하도록 하여 프리-프로그램시간을 단축시키도록 한 플래쉬 메모리 장치에 관한 것이다.

Description

플래쉬 메모리 장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따른 플래쉬 메모리 장치의 회로도, 제3도는 본 발명의 실시예.

Claims (3)

  1. 메모리셀군 및 전원단자간에 접속되며 프리-프로그램 인에이블 신호를 입력으로 하는 다수의 NMOS 트랜지스터와, 상기 메모리셀군과 전압스위치회로 및 프리-프로그램확인겸용 회로간에 접속되며 다수의 워드라인을 각기 입력으로 하는 다수의 NMOS 트랜지스터로 구성되는 것을 특징으로 하는 플래쉬 메모리 장치.
  2. 상기 제 1 항에 있어서, 상기 전압스위치 회로 및 프리-프로그램 확인겸용 회로는 프로그램시 드레인 전압, 독출시 드레인전압 및 프리-프로그램 확인 전압을 선택적으로 공급되도록 구성되는 것을 특징으로 하는 플래쉬 메모리장치.
  3. 메모리셀군 및 전원단자간에 접속되며 독출시 인에이블신호를 입력으로 하는 레퍼런스 메모리셀과, 상기 메모리셀군 및 프로그램시 드레인전압 공급회로간에 접속되며 다수의 워드라인을 각기 입력으로하는 다수의 NMOS 트랜지스터로 구성되는 것을 특징으로 하는 플래쉬 메모리 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940037294A 1994-12-27 1994-12-27 플래쉬 메모리 장치 KR0142638B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019940037294A KR0142638B1 (ko) 1994-12-27 1994-12-27 플래쉬 메모리 장치
GB9526039A GB2296588B (en) 1994-12-27 1995-12-20 Flash memory device
US08/576,055 US5610861A (en) 1994-12-27 1995-12-21 Flash memory device
CN95113188A CN1089475C (zh) 1994-12-27 1995-12-27 快速存储器

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940037294A KR0142638B1 (ko) 1994-12-27 1994-12-27 플래쉬 메모리 장치

Publications (2)

Publication Number Publication Date
KR960025751A true KR960025751A (ko) 1996-07-20
KR0142638B1 KR0142638B1 (ko) 1998-08-17

Family

ID=19403857

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940037294A KR0142638B1 (ko) 1994-12-27 1994-12-27 플래쉬 메모리 장치

Country Status (4)

Country Link
US (1) US5610861A (ko)
KR (1) KR0142638B1 (ko)
CN (1) CN1089475C (ko)
GB (1) GB2296588B (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19607724A1 (de) * 1996-02-29 1997-09-04 Siemens Ag Schaltungsanordnung für einen programmierbaren nichtflüchtigen Speicher
KR100237019B1 (ko) * 1996-12-28 2000-03-02 김영환 플래쉬 메모리셀의 프리-프로그램 방법

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62114200A (ja) * 1985-11-13 1987-05-25 Mitsubishi Electric Corp 半導体メモリ装置
US4875188A (en) * 1988-01-12 1989-10-17 Intel Corporation Voltage margining circuit for flash eprom
JP2519585B2 (ja) * 1990-07-03 1996-07-31 三菱電機株式会社 不揮発性半導体記憶装置
TW260788B (ko) * 1993-09-01 1995-10-21 Philips Electronics Nv
US5440516A (en) * 1994-01-27 1995-08-08 Sgs-Thomson Microelectronics, Inc. Testing circuitry of internal peripheral blocks in a semiconductor memory device and method of testing the same

Also Published As

Publication number Publication date
KR0142638B1 (ko) 1998-08-17
GB2296588B (en) 1998-09-09
CN1089475C (zh) 2002-08-21
GB2296588A (en) 1996-07-03
GB9526039D0 (en) 1996-02-21
US5610861A (en) 1997-03-11
CN1131801A (zh) 1996-09-25

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