KR940006164B1 - 반도체 패키지 및 그 제조방법 - Google Patents
반도체 패키지 및 그 제조방법 Download PDFInfo
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- KR940006164B1 KR940006164B1 KR1019910007631A KR910007631A KR940006164B1 KR 940006164 B1 KR940006164 B1 KR 940006164B1 KR 1019910007631 A KR1019910007631 A KR 1019910007631A KR 910007631 A KR910007631 A KR 910007631A KR 940006164 B1 KR940006164 B1 KR 940006164B1
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- solder
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- inner lead
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- Power Engineering (AREA)
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- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
Claims (11)
- LOC형 반도체 패키지에 있어서, 반도체 칩(11)의 중앙 상면에 패드(13)에 솔더(14)를 각각 형성하고, 프레임의 인너리드(15)를 중앙에까지 연장하여 상기 솔더(14)에 솔더링으로 고정하여, 소자의 박형화에 기여하도록 구성된 것을 특징으로 하는 반도체 패키지.
- 제 1 항에 있어서, 상기 솔더(14)는 Pb-Sn합금으로 형성된 것임을 특징으로 하는 반도체 패키지.
- 제 1 항 또는 제 2 항에 있어서, 상기 솔더(14)는 볼형(ball ytpe)인 것을 특징으로 하는 반도체 패키지.
- 제 1 항에 있어서, 상기 반도체 칩(11)의 패드(13)는 길이 방향으로 1열로 형성되고, 그 상면에 솔더(14)가 각각 형성된 것임을 특징으로 하는 반도체 패키지.
- 제 1 항에 있어서, 상기 반도체 칩(11)의 패드(13)(13')는 길이 방향으로 2열로 형성되고, 그 상면에 솔더(14)(14')가 각각 형성된 것임을 특징으로 하는 반도체 패키지.
- 제 5 항에 있어서, 상기 패드(13)(13')는 서로 엇갈리게 교호로 2열로 형성되고, 그 상면에 솔더(14)(14')가 각각 형성된 것임을 특징으로 하는 반도체 패키지.
- 제 5 항에 있어서, 상기 패드(13)(13')는 평행하게 2열로 형성되고, 그 상면에 솔더(14)(14')가 각각 형성된 것임을 특징으로 하는 반도체 패키지.
- 반도체 패키지 제조방법에 있어서, 반도체 칩(11)에 폴리이미드(12)를 도포하는 폴리이미드 도포공정과, 반도체 칩(11)의 각 패드(13)에 솔더(14)를 형성하는 솔더형성공정과, 상기 솔더(14)에 프레임의 각 인너리드(15)를 솔더링하여 반도체 칩(11)과 인너리드(15)를 전기적으로 접속시키는 솔더링 공정과, 반도체 칩(11)과 인너리드(15)를 포함하는 일정면적을 몰딩하는 몰딩공정과, 트리밍/포밍공정으로 진행됨을 특징으로 하는 반도체 패키지 제조방법.
- 제 8 항에 있어서, 상기 솔더형성공정은 칩패드 금속화 공정중에 Cr/Cu/Au 층을 얹은 다음, Pb-Sn 합금을 코팅한 후, 온도를 상승시켜 각 패드(13)의 상면에 솔더(14)를 형성시킴을 특징으로 하는 반도체 패키지 제조방법.
- 제 9 항에 있어서, 상기 Pb-Sn 합금은 증착 또는 스퍼터링방법에 의하여 코팅됨을 특징으로 하는 반도체 패키지 제조방법.
- 제 8 항에 있어서, 상기 솔더링 공정은 반도체 칩(11)의 솔더(14)에 프레임의 인너리드(15)를 정렬한 후, 접합노에 넣은다음, 접합노의 내부온도를 상승시켜 솔더(14)와 인너리드(15)를 접합시킴을 특징으로 하는 반도체 패키지 제조방법.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019910007631A KR940006164B1 (ko) | 1991-05-11 | 1991-05-11 | 반도체 패키지 및 그 제조방법 |
TW081102561A TW221522B (ko) | 1991-05-11 | 1992-04-02 | |
US07/872,154 US5334873A (en) | 1991-05-11 | 1992-04-22 | Semiconductor packages with centrally located electrode pads |
JP4114939A JPH05136202A (ja) | 1991-05-11 | 1992-05-07 | 半導体パツケージ及びその製造方法 |
DE4215471A DE4215471C2 (de) | 1991-05-11 | 1992-05-11 | Halbleiterpackung und Verfahren zur Herstellung einer solchen Packung |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019910007631A KR940006164B1 (ko) | 1991-05-11 | 1991-05-11 | 반도체 패키지 및 그 제조방법 |
Publications (2)
Publication Number | Publication Date |
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KR920022459A KR920022459A (ko) | 1992-12-19 |
KR940006164B1 true KR940006164B1 (ko) | 1994-07-08 |
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ID=19314319
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910007631A Expired - Lifetime KR940006164B1 (ko) | 1991-05-11 | 1991-05-11 | 반도체 패키지 및 그 제조방법 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5334873A (ko) |
JP (1) | JPH05136202A (ko) |
KR (1) | KR940006164B1 (ko) |
DE (1) | DE4215471C2 (ko) |
TW (1) | TW221522B (ko) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5331200A (en) * | 1992-09-30 | 1994-07-19 | Texas Instruments Incorporated | Lead-on-chip inner lead bonding lead frame method and apparatus |
KR960005042B1 (ko) * | 1992-11-07 | 1996-04-18 | 금성일렉트론주식회사 | 반도체 펙케지 |
JPH09107048A (ja) * | 1995-03-30 | 1997-04-22 | Mitsubishi Electric Corp | 半導体パッケージ |
US5811875A (en) * | 1995-06-29 | 1998-09-22 | Samsung Electronics Co., Ltd. | Lead frames including extended tie-bars, and semiconductor chip packages using same |
KR100242994B1 (ko) * | 1996-12-28 | 2000-02-01 | 김영환 | 버텀리드프레임 및 그를 이용한 버텀리드 반도체 패키지 |
US6008996A (en) * | 1997-04-07 | 1999-12-28 | Micron Technology, Inc. | Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die |
US6271582B1 (en) | 1997-04-07 | 2001-08-07 | Micron Technology, Inc. | Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die |
KR100311035B1 (ko) * | 1997-11-21 | 2002-02-28 | 윤종용 | 효율적으로 배치된 패드들을 갖는 반도체 메모리 장치 |
KR100726762B1 (ko) * | 2000-12-21 | 2007-06-11 | 삼성테크윈 주식회사 | 반도체 리드프레임과 이를 채용한 반도체 패키지 |
JP2006173437A (ja) * | 2004-12-17 | 2006-06-29 | Toshiba Corp | 半導体装置 |
US8174099B2 (en) * | 2008-08-13 | 2012-05-08 | Atmel Corporation | Leadless package with internally extended package leads |
JP6456451B1 (ja) | 2017-09-25 | 2019-01-23 | エヌ・ティ・ティ・コミュニケーションズ株式会社 | 通信装置、通信方法、及びプログラム |
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Publication number | Priority date | Publication date | Assignee | Title |
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US3947867A (en) * | 1970-12-21 | 1976-03-30 | Signetics Corporation | Two part package for a semiconductor die |
US4604644A (en) * | 1985-01-28 | 1986-08-05 | International Business Machines Corporation | Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making |
CA1238119A (en) * | 1985-04-18 | 1988-06-14 | Douglas W. Phelps, Jr. | Packaged semiconductor chip |
US5014112A (en) * | 1985-11-12 | 1991-05-07 | Texas Instruments Incorporated | Semiconductor integrated circuit device having mirror image circuit bars bonded on opposite sides of a lead frame |
US4796078A (en) * | 1987-06-15 | 1989-01-03 | International Business Machines Corporation | Peripheral/area wire bonding technique |
US4967261A (en) * | 1987-07-30 | 1990-10-30 | Mitsubishi Denki Kabushiki Kaisha | Tape carrier for assembling an IC chip on a substrate |
JP2702219B2 (ja) * | 1989-03-20 | 1998-01-21 | 株式会社日立製作所 | 半導体装置及びその製造方法 |
US4862322A (en) * | 1988-05-02 | 1989-08-29 | Bickford Harry R | Double electronic device structure having beam leads solderlessly bonded between contact locations on each device and projecting outwardly from therebetween |
JPH01286448A (ja) * | 1988-05-13 | 1989-11-17 | Hitachi Ltd | 半導体装置の製造方法 |
JPH0212863A (ja) * | 1988-06-30 | 1990-01-17 | Matsushita Electron Corp | 樹脂封止型半導体装置 |
US4861425A (en) * | 1988-08-22 | 1989-08-29 | International Business Machines Corporation | Lift-off process for terminal metals |
KR0158868B1 (ko) * | 1988-09-20 | 1998-12-01 | 미다 가쓰시게 | 반도체장치 |
JPH02310956A (ja) * | 1989-05-26 | 1990-12-26 | Hitachi Ltd | 高密度実装半導体パツケージ |
ATE101746T1 (de) * | 1989-11-24 | 1994-03-15 | Siemens Ag | Halbleiterspeicher. |
JPH04278548A (ja) * | 1991-03-07 | 1992-10-05 | Nec Corp | 樹脂封止型半導体装置 |
US5155578A (en) * | 1991-04-26 | 1992-10-13 | Texas Instruments Incorporated | Bond wire configuration and injection mold for minimum wire sweep in plastic IC packages |
-
1991
- 1991-05-11 KR KR1019910007631A patent/KR940006164B1/ko not_active Expired - Lifetime
-
1992
- 1992-04-02 TW TW081102561A patent/TW221522B/zh not_active IP Right Cessation
- 1992-04-22 US US07/872,154 patent/US5334873A/en not_active Expired - Lifetime
- 1992-05-07 JP JP4114939A patent/JPH05136202A/ja active Pending
- 1992-05-11 DE DE4215471A patent/DE4215471C2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
TW221522B (ko) | 1994-03-01 |
DE4215471A1 (de) | 1992-11-12 |
KR920022459A (ko) | 1992-12-19 |
US5334873A (en) | 1994-08-02 |
JPH05136202A (ja) | 1993-06-01 |
DE4215471C2 (de) | 2002-10-24 |
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