KR20200010363A - Board for mounting electronic components and manufacturing method thereof - Google Patents

Abstract

The board | substrate has the insulating layer 11 and the conductor 12 provided in the said insulating layer 11. At least a part of the bottom surface and the side surface of the said conductor 12 is located in the back surface side rather than the surface of the said insulating layer 11.

Description

Board for mounting electronic components and manufacturing method thereof

The present disclosure relates to an electronic component mounting substrate and a method of manufacturing the same.

With high-density mounting of electronic devices, high density, miniaturization, thinning, and multilayering of conductors have also been required for substrates for mounting electronic components. When the conductor is mounted at a high density or downsized, the adhesion between the insulating layer and the conductor becomes insufficient when the adhesion between the insulating layer and the conductor formed on the insulating layer is not sufficient. In the case where the conductor is a multilayer in the insulating layer, the adhesion between the insulating layer and the conductor becomes insufficient.

In order to form a conductor, when using the semiadditive process, the technique of improving the adhesiveness of an insulating layer and a conductor by heating an insulating layer is proposed (for example, refer patent document 1).

Japanese Patent Application Laid-Open No. 2012-169600

However, when trying to make a thin printed board or making the surface of an insulating layer and a conductor adhere by semi-additive method etc., adhesiveness of an insulating layer and a conductor cannot fully be ensured. Or when the insulating layer is thin, peeling of a conductor tended to occur in many cases. When the adhesiveness between an insulating layer and a conductor is inadequate, there existed a subject that manufacture of a printed board was impossible initially, or even if it could manufacture, the deterioration of a manufacturing yield cannot be avoided.

Therefore, in order to solve the said subject, this indication aims at improving the adhesiveness of the board | substrate for electronic component mounting.

In order to achieve the said objective, it was supposed that the conductor formed on the insulating layer was embedded in the insulating layer. In addition, when the combination layer of an insulating layer and a conductor is formed in one or more layers on the insulating layer, at least one of the conductors contained in at least one combination layer shall be embedded in the direction of an insulating layer.

The board | substrate for electronic component mounting of this indication is a board | substrate which can mount an electronic component, and what is necessary is just to form the conductor on the insulating layer. In this disclosure, the board | substrate with which the conductor is formed on the insulating layer shall be called the board | substrate for electronic component mounting. In addition, the present disclosure includes an electronic component, an electronic device, and a mounting apparatus, on which an electronic component mounting substrate according to the present disclosure is mounted. For example, the mounting apparatus which concerns on this indication is an arbitrary apparatus provided with the electronic component mounting board which concerns on this indication, and the electronic component which performs predetermined process using the said electronic component mounting board | substrate. As described above, the present disclosure can be applied to all electronic components, electronic devices, and apparatuses that operate using the electronic component mounting substrate.

According to the present disclosure, since at least a part of the conductor is embedded in the insulating layer or the insulating layer, the adhesion of the substrate for mounting the electronic component, that is, the peeling strength, can be improved. Accordingly, the present disclosure prevents a decrease in the yield at the time of manufacturing the electronic component mounting substrate, improves the durability of the electronic component mounting substrate, and improves the quality of the electronic component mounting substrate comprehensively. Can be. Moreover, this indication can improve the reliability of the electronic component, the electronic device, and the apparatus which operate using the wiring board of this indication.

1 is a diagram illustrating a conductor forming step of forming a conductor on an insulating layer.
It is a figure explaining the conductor formation process of forming a conductor on an insulating layer.
FIG. 3 is a diagram illustrating a press-fit process for pressurizing or sinking a conductor into an insulating layer. FIG.
4 is a diagram illustrating a heating sequence.
5 is a diagram illustrating a heating sequence.
6 is a diagram illustrating a heating procedure.
7 is a diagram illustrating a heating procedure.
8 is a diagram illustrating a heating procedure.
It is a figure explaining the schematic diagram at the time of heating.
It is a figure explaining the state after a press-fitting process of a conductor.
It is a figure explaining the state after a press-fitting process of a conductor.
It is a figure explaining the press-in process which injects or sinks a conductor into an insulating layer.
It is a figure explaining the press-in process which injects or sinks a conductor into an insulating layer.
It is a figure explaining the state after a press-fitting process of a conductor.
It is a figure explaining the state after a press-fitting process of a conductor.
It is a figure explaining a VIA formation process.
It is sectional drawing which shows an example of the board | substrate for electronic component mounting which concerns on 2nd Embodiment.
It is sectional drawing which shows an example of the boundary part of an electroless plating layer and a conductor.
19 is an enlarged view showing a first example of unevenness.
20 is an enlarged view showing a second example of unevenness.
21 shows an example of regularity of irregularities on the surface of the insulating layer.
It is explanatory drawing of the manufacturing method of the electronic component mounting board | substrate which concerns on 3rd Embodiment.
It is sectional drawing which shows an example of the method of manufacturing the conductor which has a conductor recessed part.
It is sectional drawing which shows an example of the method of manufacturing the conductor which has a conductor convex part.

Embodiments of the present disclosure will be described with reference to the accompanying drawings. Embodiments described below are examples of the embodiments of the present disclosure, and the present disclosure is not limited to the following embodiments. In addition, in this specification and drawing, the component same in code | symbol shall show the same thing mutually.

(1st embodiment)

In this embodiment, the case where an insulator layer is an insulating layer is demonstrated. The manufacturing method of the board | substrate for electronic component mounting which concerns on this indication is equipped with the conductor formation process and press-fit process which are described below in turn. Thereby, this indication can improve adhesiveness, ie, peeling strength, between an insulating layer and a conductor.

The conductor formation process of forming a conductor on the insulating layer of this indication is shown to FIG. 1 (a)-FIG. 1 (c). 1 (a) to 1 (c), 11 represents an insulating layer, 12 represents a conductor, 121 represents metal foil, and 122 represents metal plating. 1 is the thickness direction of a board | substrate, the upper surface in FIG. 1 becomes a surface, and the lower surface in FIG. 1 becomes a back surface.

The insulating layer 11 is an insulator which can be used for a printed circuit board. Although the material used for the insulating layer 11 is resin, it is not limited to this, The arbitrary materials, such as glass and ceramic which have insulation, may be contained. Two or more types of insulating substances may be mixed in the insulating layer 11. For example, a fibrous or granular insulator may be included in the insulating layer 11.

The insulator which mixed the base material with resin may be sufficient as the insulating layer 11. As resin, thermosetting resin or ultraviolet curable resin is preferable. If it is constant heat resistance, you may use a thermoplastic resin. As thermosetting resin, a polyimide resin, an epoxy resin, a phenol resin, and a cyanate resin can be illustrated. The thermoplastic resin should just be 50 degreeC or more in heat distortion temperature. The higher the deformation temperature, the better. As a base material, glass fiber, ceramic particle, a cellulose fiber can be illustrated. Natural objects, such as a fiber of a cobweb, may be sufficient. The base material is not limited to these. Moreover, you may laminate | stack the prepreg which impregnated and semi-hardened the said resin to glass cloth, and may heat and pressurize and comprise an insulating layer. The same is true in any of the following embodiments.

The conductor 12 is a conductor layer formed of any material which can be used for the conductor of a printed board, and contains a metal foil, metal plating, and a rolling plate. The materials of the metal foil 121 and the metal plating 122 constituting the conductor 12 are all conductive metals, alloys or pastes. Or if there is electroconductivity, even if it is all materials other than metals, such as carbon and a ceramic, it can use as one part or all part of the conductor 12. As a metal applied to the conductor 12, although the alloy and paste which contain copper, gold, silver, aluminum, nickel, or these metals by mass% most are mentioned, it is not limited to these. The same is true in any of the following embodiments.

Metal plating is performed on the metal foil 121 of the insulating layer 11 (FIG. 1 (a)) to which the metal foil 121 was attached (FIG. 1 (b)). Next, the patterned conductor 12 is formed in the insulating layer 11 by the well-known panel plating method or the pattern plating method (FIG. 1 (c)). The conductor 12 thus formed includes a metal foil and a metal plating layer plated on the metal foil.

Another conductor forming step of forming a conductor on the insulating layer of the present disclosure is shown in Figs. 2A to 2D. This manufacturing method is known as a semiadditive process. 2 (a) to 2 (d), 11 represents an insulating layer, 12 represents a conductor, and 13 represents a pattern resist.

As a material of the patterned resist 13, although a photosensitive dry film, a liquid resist, and an ED resist can be illustrated, it is not limited to these. The same is true in any of the following embodiments. Such materials may be photocurable or photodissolved.

Pattern resist is apply | coated to the insulating layer 11 (FIG. 2 (a)), and the pattern resist other than the part used as a conductor finally is removed (FIG. 2 (b)). The conductors are grown on the portions other than the remaining pattern resist 13 by electroless plating or the like (Fig. 2 (c)). The pattern resist 13 is removed, leaving the conductor 12. At this time, as shown in FIG. 17 mentioned later, in the cross section perpendicular | vertical to the insulating layer 11, the edge 12E of the upper surface (normal surface) of the conductor 12 is round. In this conductor formation step, a patterned conductor 12 is formed on the insulating layer 11. The conductor forming step is not limited to the method described herein.

The press-in process which press-fits the conductor of this indication to an insulating layer is shown to FIG. 3 (a)-FIG. 3 (b). In FIG.3 (a)-FIG.3 (b), 11 represents an insulating layer and 12 represents a conductor. When the conductor 12 ((a) of FIG. 3 (a)) formed on the surface of the insulating layer 11 is mechanically press-fitted into the insulating layer 11, a part of the conductor 12 is formed of the insulating layer 11. It is buried on the surface ((b) of Fig. 3.) (b) is an example of the board | substrate for electronic component mounting of this indication. The operation | work which mechanically presses in is a press machine which has a flat press surface, for example. By using the above, all or part of the conductor 12 formed on the surface of the insulating layer 11 is press-fit into the insulating layer 11.

By injecting the conductor 12 into the insulating layer 11, not only the bottom face of the conductor 12, but also at least a part of the side surface of the conductor 12 adheres to the insulating layer 11, thereby insulating the insulating layer 11. And the peel strength between the conductors 12 is improved.

The method of realizing the board | substrate for mounting electronic components in which the conductor 12 was embedded in the insulating layer 11 is not limited to the mechanical embedding of the conductor 12 in the insulating layer 11. For example, in the press-fitting step, both or either of the conductor 12 and the insulating layer 11 may be heated to sink the conductor 12 to the insulating layer 11. Thereby, the conductor 12 can be embedded in the insulating layer 11 without applying a force to the conductor 12.

At this time, the conductor 12 may not be press-fitted into the insulating layer 11, but the conductor 12 may be press-fitted into the insulating layer 11 with a weak force. Thereby, the position of the upper surface which is the top surface of the conductor 12 can be controlled easily. As described above, indentation in the present disclosure also includes indentation with a weak force. Hereinafter, as an example of the indentation process, in addition to the indentation order of mechanically indenting the conductor 12 into the insulation layer 11 in the indentation process, both or both of the conductor 12 and the insulation layer 11 are heated. An example having a heating sequence will be described.

In the press-fitting step, when the conductor 12 is mechanically press-fitted into the insulating layer 11, both or both of the conductor 12 and the insulating layer 11 may be heated. It is effective when the insulating layer is too hard or when the peel strength is to be further improved. The heating is realized by placing a heater, irradiating LED light light or infrared rays, or letting hot air flow. The conductor 12 may be mechanically press-fitted by the panel heated by the heater.

The heating sequence is shown in FIG. 4, FIG. 5, FIG. 6, FIG. 4, 5, 6, 7, and 8, 11 is an insulating layer, and 12 is a conductor. In FIG. 4, FIG. 5, FIG. 6, FIG. 7, and FIG. 8, (a), (b), (c) shows a procedure. As a heating order of heat, the order of first heating (FIG. 4 (b)) and mechanically indenting while heating (FIG. 4 (c)) may be sufficient. First, heating may be performed (FIG. 5B), and the heating may be stopped and mechanically press-fitted (FIG. 5C). The order of heating and mechanically press-fitting at the same time may be used (FIG. 6B). First, the procedure may be performed by mechanically indenting (FIG. 7B) and heating while mechanically indenting (FIG. 7C). First, mechanically press-fit (Fig. 8 (b)), mechanical press-in may be stopped and heated (Fig. 8 (c)).

The schematic diagram at the time of heating is shown to Fig.9 (a). Since the conductor 12 is a metal and the insulating layer 11 is resin, the expansion rate is larger in the conductor 12 than the insulating layer 11. For this reason, by heating to moderate temperature, the conductor 12 adheres to the insulating layer 11, and an anchor effect is obtained. Subsequently, even if the sequence (Fig. 9 (b), the adhesion of the conductor 12 and the insulating layer 11 is improved than before heating. Therefore, the insulating layer 11 and the conductor 12 Peel strength between is improved.

In the indentation step, the state after the indentation of the conductor will be described with reference to FIGS. 10A, 10B, 11A, 11B, and 11C. 10 (a), 10 (b), 11 (a), 11 (b) and 11 (c) are examples of the electronic component mounting substrate of the present disclosure. In Figs. 10A, 10B, 11A, 11B, and 11C, 11 is an insulating layer, and 12 is a conductor. In these descriptions, as shown in FIG. 10 (a), in the conductor 12, the side of the insulating layer 11 (the side close to the insulating layer 11) faces the bottom face and the bottom face (( The side which is far from the insulating layer) is called the side surface of the upper surface (normal surface), the upper surface, and the bottom surface. In the insulating layer 11, the side on which the conductor 12 is placed is called a surface, and the opposite surface is called the back surface. do.

The conductor 12 may be press-fitted until a part of the bottom and side surfaces of the conductor 12 is lower than the surface of the insulating layer 11 (FIG. 10A). Since all of the bottom surface and part of the side surface of the conductor 12 are in close contact with the insulating layer 11, the peeling strength between the insulating layer 11 and the conductor 12 is improved. Moreover, you may press-in the conductor 12 to the position where the upper surface of the conductor 12 becomes the same surface as the surface of the insulating layer 11 (FIG. 10 (b)). Since all of the bottom and side surfaces of the conductor 12 are in close contact with the insulating layer 11, the peeling strength between the insulating layer 11 and the conductor 12 is further improved.

In addition, although FIG. 10 (a) showed the example in which the side surface arrange | positioned at the both sides of the bottom surface was embedded together in the insulating layer 11, this indication is not limited to this, For example, it is arrange | positioned at the both sides of the bottom surface, Only one side of the side surface may be embedded in the insulating layer 11. In FIG. 10A, the upper surface of the conductor 12 is widened in the x-axis direction, but the present disclosure is not limited thereto, and the upper surface of the conductor 12 may be inclined with respect to the x-axis direction.

In addition, although the cross-sectional shape of the conductor 12 was shown in FIG. 10A and FIG. 10B, the cross-sectional shape of the conductor 12 which concerns on this indication is arbitrary. For example, the upper surface of the conductor 12 may be curved, or the boundary between the side surface and the upper surface may form a continuous curve.

Not only the bottom and side surfaces of the conductor 12, but also the top surface 12 may be press-fitted until the top surface becomes a position lower than the surface of the insulating layer 11 (Figs. 11 (a) and 11 (b)). , FIG. 11 (c)). In FIG. 11A, the conductor 12 is press-fitted until the upper surface of the conductor 12 is lower than the surface of the insulating layer 11, but the upper surface of the conductor 12 is exposed. Since all of the bottom and side surfaces of the conductor 12 are in close contact with the insulating layer 11, the peeling strength between the insulating layer 11 and the conductor 12 is further improved. In FIG. 11B, the conductor 12 is press-fitted until the upper surface of the conductor 12 becomes a lower position than the surface of the insulating layer 11, but a part of the upper surface of the conductor 12 is exposed. have. Since all of the bottom, all of the side surfaces, and some of the upper surface of the conductor 12 are in close contact with the insulating layer 11, the peeling strength between the insulating layer 11 and the conductor 12 is further improved. In FIG. 11C, the conductor 12 is press-fitted until the upper surface of the conductor 12 is at a position lower than the surface of the insulating layer 11, and the insulating layer 11 is applied to the upper surface of the conductor 12. Buried in. Since all of the bottom, all of the side, and all of the upper surface of the conductor 12 are in close contact with the insulating layer 11, the peeling strength between the insulating layer 11 and the conductor 12 is further improved.

In addition, in FIG.10 (a), FIG.10 (b), and FIG.11 (a), the three surfaces of the conductor 12 are in close contact with the insulating layer 11. In the case where the y-z plane has the same structure, five surfaces of the conductor 12 are in close contact with the insulating layer 11. In this manner, in addition to the bottom surface of the conductor 12 widening in the x-axis direction, part or all of the side surfaces of the conductor 12 widening in the y-axis direction are in close contact with the insulating layer 11, Peel strength can be raised with respect to the applied x and z-axis loads.

In addition, in FIG.11 (b) and FIG.11 (c), the four surface of the conductor 12 is in close_contact with the insulating layer 11. In the case where the y-z plane has the same structure, the six surfaces of the conductor 12 are in close contact with the insulating layer 11. Thus, in addition to the bottom face of the conductor 12 widening in the x-axis direction, part or all of the side surface of the conductor 12 widening in the y-axis direction, and the part of the upper surface of the conductor 12 widening in the x-axis direction Or since all are in close contact with the insulating layer 11, the peeling strength can be raised with respect to the load of the x, y, z-axis direction applied to the conductor 12. FIG.

10 and 11 show an example in which the bottom surface of the conductor 12 is in close contact with the insulating layer 11, the present disclosure is not limited thereto. For example, in the present disclosure, in FIG. 10A, FIG. 10B, and FIG. 11A, a part or all of the bottom surface of the conductor 12 is formed on the rear surface of the insulating layer 11. It also includes the form in which two surfaces of the conductor 12 exposed are in close contact with the insulating layer 11. In the case where the y-z plane has the same structure, the four surfaces of the conductor 12 are in close contact with the insulating layer 11. In this case, part or all of the side surfaces of the conductors 12 extending in the y-axis direction are in close contact with the insulating layer 11, so that the peel strength is applied to the loads in the x- and z-axis directions applied to the conductors 12. It can increase.

In addition, in FIG.11 (b), the form in which the three surfaces of the conductor 12 are in close contact with the insulating layer 11 in which the whole bottom surface of the conductor 12 is exposed to the back surface of the insulating layer 11 is also included. do. In the case where the y-z plane has the same structure, five surfaces of the conductor 12 are in close contact with the insulating layer 11. In this case, part of the upper surface of the conductor 12 widening in the x-axis direction, part or all of the side surface of the conductor 12 widening in the y-axis direction are in close contact with the insulating layer 11, so that the conductor 12 Peel strength can be raised with respect to the applied x, y, and z-axis loads.

In addition, in FIG. 11B, the four surfaces of the conductors 12, in which a part of the bottom surface of the conductor 12 is exposed on the back surface of the insulating layer 11, are also included in close contact with the insulating layer 11. do. In the case where the y-z plane has the same structure, the six surfaces of the conductor 12 are in close contact with the insulating layer 11. In this case, part of the upper surface of the conductor 12 widening in the x-axis direction, all of the side surfaces of the conductor 12 widening in the y-axis direction, and a part of the bottom surface of the conductor 12 widening in the x-axis direction are insulated. Since it adheres to (11), peel strength can be raised with respect to the load of the x, y, z-axis direction applied to the conductor 12. As shown in FIG.

Next, the example in which the board | substrate for electronic component mounting is a multilayer board | substrate with which the combined layer of an insulating layer and a conductor is formed on an insulating layer is demonstrated. In the following examples, the insulating layer is an insulating layer included in at least one combination layer, and at least a part of the conductor contained in the at least one combination layer is embedded in the insulating layer. Specifically, the insulating layer, the conductor formed in the said insulating layer, and the combination of the insulating layer and the conductor formed in the said insulating layer in the upper layer of the said conductor and the said insulator substrate are each provided 1 or more sets, and it is at least among the said conductors. One explains the board | substrate for mounting electronic components embedded in the said insulating layer or the insulating layer.

12 (a), 12 (b), 12 (c), 13 (a), 13 (b) and 13 (c), 11a represents a laminated insulating layer, 12 is a conductor, 14 is a laminated insulating layer. 12 and 13, as an example of the combination of the laminated insulating layer 14 and the conductor 12, a combination layer of the laminated insulating layer 14-1 and the conductor 12-1 and the laminated insulating layer 14-. The example which forms the combined layer of 2) and the conductor 12-2, and the combined layer of the laminated insulating layer 14-3 and the conductor 12-3 is shown. The laminated insulating layers 11a and 14 constitute an insulating layer.

In a conductor formation process or a 2nd conductor formation process, a conductor is formed on the laminated insulation layer 11a or on each laminated insulation layer 14 (FIG. 12A, FIG. 12B, FIG. 12 (c), FIG. 13 (a), FIG. 13 (b), and FIG. 13 (c)). In order to form a conductor in the combination layer, the conductor 12 is formed on the laminated insulating layer 11a (conductor formation step). In addition, a laminated insulating layer 14 is formed on the conductor 12 and the laminated insulating layer 11a, and a conductor is further formed on the laminated insulating layer 14 (second conductor forming step). The second conductor forming step is repeated as many times as necessary.

The material of the laminated insulating layer 14 may be the same as that applicable to the laminated insulating layer 11a. The same is true in any of the following embodiments.

In the press-fitting process in which the conductor 12 is press-fitted or sinked into the uppermost laminated insulating layer 14, after forming the uppermost laminated insulating layer 14 (FIG. 12B), the uppermost conductor 12 ) Is pressed into the laminated insulating layer 14 or allowed to sink (FIG. 12C).

In a press-in step of press-fitting or sinking the conductor 12 into the laminated insulating layer 11a, or a press-pressing step of press-pressing or sinking the conductor 12 into the intermediate layer of insulating layer 14, the laminated insulating layer ( After the conductor 12 is formed in 11a) or after the laminated insulating layer 14 is formed and the conductor 12 is formed, the conductor 12 is mechanically bonded to the laminated insulating layer 11a or the laminated insulating layer 14. It is press-fitted in (FIG. 13A). In the final second conductor forming step, the conductor 12 is formed on the uppermost laminated insulating layer 14 (Fig. 13 (b)), and in the press-fitting step, the uppermost conductor 12 is laminated insulated at the uppermost layer. Mechanically press or sink into layer 14 (FIG. 13C).

In order to form the conductor 12 in the conductor forming step and the second conductor forming step, the steps shown in Figs. 1A to 1C, or Figs. 2A to 2D The process shown to can be applied.

In the press-fitting step, when the conductor 12 is press-fitted or settled in the laminated insulating layer 11a or the laminated insulating layer 14, the laminated insulating layer 11a, the laminated insulating layer 14, and the conductor 12 are pressed. You may heat in at least any of. Heating can be realized by placing a heater, irradiating infrared rays, or letting hot air flow. The conductor 12 may be mechanically press-fitted by the panel heated by the heater. The heating order can be the same as that shown in Figs. 4, 5, 6, 7, and 8.

In the board | substrate for electronic component mounting of this indication, the laminated insulating layer 11a and the laminated insulating layer 14 may be integrated. Alternatively, when there are a plurality of laminated insulating layers 14 adjacent to each other, adjacent laminated insulating layers 14 may be integrated with each other.

In the press-fitting step, the state after the press-in of the conductor 12 into the laminated insulating layer 14 is shown in Figs. 10 (a), 10 (b), 11 (a), 11 (b), It is the same as that of FIG. The state after the press-in of the conductor 12 to the laminated insulating layer 14 is shown in FIG. 14 (a), FIG. 14 (b), FIG. 15 (a), FIG. 15 (b), and FIG. 15 (c). Explain. 14 (a), 14 (b), 15 (a), 15 (b) and 15 (c) are examples of the electronic component mounting substrate of the present disclosure. In FIGS. 14A, 14B, 15A, 15B, and 15C, 12 is a conductor, and 14 is a laminated insulating layer. In this description, as shown in Fig. 14A, in the conductor 12, the side of the laminated insulating layer 11a (the side close to the laminated insulating layer 11a) faces the bottom face and the bottom face ( The side sandwiched from the laminated insulating layer 11a to the upper surface, the upper surface and the bottom surface is called a side surface, and even the laminated insulating layer 14 is called the upper surface from the laminated insulating layer 11a.

The conductor 12 may be press-fitted until a part of the bottom and side surfaces of the conductor 12 is lower than the upper surface of the laminated insulating layer 14 (FIG. 14A). Since all of the bottom surface and part of the side surface of the conductor 12 are in close contact with the laminated insulating layer 14, the peeling strength between the laminated insulating layer 14 and the conductor 12 is improved. In addition, the conductor 12 may be press-fitted to a position where the upper surface of the conductor 12 is flush with the upper surface of the laminated insulating layer 14 (FIG. 14B). Since all of the bottom and side surfaces of the conductor 12 are in close contact with the laminated insulating layer 14, the peeling strength between the laminated insulating layer 14 and the conductor 12 is further improved.

Not only the bottom and side surfaces of the conductor 12 but also the top surface 12 may be press-fitted until the top surface becomes a lower position than the top surface of the laminated insulating layer 14 (FIGS. 15A and 15B). ), Figure 15 (c)). In FIG. 15A, the conductor 12 is press-fitted until the upper surface of the conductor 12 is lower than the upper surface of the laminated insulating layer 14, but the upper surface of the conductor 12 is exposed. . Since all of the bottom and side surfaces of the conductor 12 are in close contact with the laminated insulating layer 14, the peeling strength between the laminated insulating layer 14 and the conductor 12 is further improved. In FIG. 15B, the conductor 12 is press-fitted until the upper surface of the conductor 12 is lower than the upper surface of the laminated insulating layer 14, but part of the upper surface of the conductor 12 is exposed. It is. Since all of the bottom, all of the side surfaces, and some of the upper surface of the conductor 12 are in close contact with the laminated insulating layer 14, the peeling strength between the laminated insulating layer 14 and the conductor 12 is further improved. In FIG. 15C, the conductor 12 is press-fitted until the upper surface of the conductor 12 is at a position lower than the upper surface of the laminated insulating layer 14, and the laminated insulating layer (to the upper surface of the conductor 12) ( Buried in 14). Since all of the bottom, all of the side, and all of the upper surface of the conductor 12 are in close contact with the laminated insulating layer 14, the peeling strength between the laminated insulating layer 14 and the conductor 12 is further improved.

By press-fitting or sinking the conductor 12 of the uppermost layer into the laminated insulating layer 14, the peeling strength between the laminated insulating layer 14 and the conductor 12 improves in the board | substrate for electronic component mounting as a final product. do. In the manufacturing process of the board | substrate for electronic component mounting, the conductor other than the conductor 12 of the uppermost layer is press-fitted or submerged in the laminated insulating layer 11a or the laminated insulating layer 14, and the laminated insulating layer 11a or lamination | stacking is carried out. Peel strength between the insulating layer 14 and the conductor 12 is improved, and peeling of a conductor in a manufacturing process can be prevented.

In a conductor formation process and a 2nd conductor formation process, it has a process to press-fit. In the indentation step, a VIA forming step of forming a VIA which is an example of a conductor part that electrically connects the conductors 12 formed in different layers among the conductors 12 formed in the combination layer may be included. After the VIA forming process, the conductor 12 is pressed into the laminated insulating layer 14 or allowed to sink.

The VIA which is an example of the conductor part which electrically connects the conductors 12 formed in the different layer among the conductors 12 formed in the combination layer in the laminated insulation layer 14 is demonstrated. The VIA formation process is shown to FIG. 16A, FIG. 16B, FIG. 16C, and FIG. 16D. In Figs. 16A, 16B, 16C, and 16D, 11a is a laminated insulating layer, 12 is a conductor, 14 is a laminated insulating layer, and 15 is a VIA.

In the conductor forming step and the second conductor forming step, the conductor 12, the laminated insulating layer 14, and the conductor 12 are sequentially formed on the laminated insulating layer 11a (Figs. 16 (a) and 16). (b)). The conductors 12 formed in the different layers are electrically connected to the VIA 15 (Fig. 16 (c)). After that, when the conductor 12 is mechanically press-fitted or settled in the laminated insulating layer 14, the VIA 15 is compressed, and the anchor effect is increased, and the laminated insulating layer 14 and the conductor 12 are separated. The peel strength of the is improved. Although the VIA 15 which electrically connects the conductor 12 on the laminated insulation layer 11a and the conductors 12 on the laminated insulation layer 14 was demonstrated here, the conductor 12 on the laminated insulation layer 14 was demonstrated. The same applies to the VIA 15 that electrically connects the conductors 12 on the multilayer insulating layer 14). The same applies to the VIA 15 which electrically connects the uppermost conductor 12 and the lower conductors 12 to each other.

In the above, the conductor 12 is mechanically press-fitted or settled in the laminated insulating layer 11a or the laminated insulating layer 14 after the VIA forming step, but the conductor 12 is laminated in the laminated insulating layer 11a or laminated insulation. It goes without saying that the VIA 15 may be formed after mechanically indenting or sinking the layer 14.

In each said embodiment, it demonstrated while showing one side of a laminated insulation layer, but not only applies to a single-sided board | substrate, In the case of a double-sided board or a multilayer board | substrate, the technique of this indication can be applied to each side of both sides of a laminated insulation layer. Can be. In the case of a double-sided board or a multi-layer board, the upper layer or the upper surface in the present embodiment may be considered to be the upper layer or the upper surface of the layer or the surface far from the laminated insulating layer.

In the case of a multilayer board | substrate, any of the conductors of the laminated insulating layer, the conductor of the outermost layer farthest from a laminated insulating layer, and the conductor of the arbitrary layer which is a layer between a laminated insulating layer and an outermost layer is made into a laminated insulating layer or a laminated insulating layer It may be pressed in or allowed to sink. For example, the conductor of the outermost layer is press-fitted or sinked, and the conductor of the intermediate layer between the laminated insulation layer and the outermost layer is press-fitted or sinked, or the intermediate layer between the laminated insulation layer and the outermost layer. Both indented or submerged conductors are included.

In the case of a double-sided board or a multilayer board, when the conductors on both sides are press-fitted or sinked, pressure may be applied to both conductors from both sides at the same time to press-fit or sink.

In addition, when we make thin printed board, copper foil is easy to be damaged, and there is phenomenon that there is inevitable use of copper foil having carrier, and this phenomenon is price of copper foil having carrier first, and second defective rate There was also a problem that the demand for control chart of the manufacturing process was high. According to the present disclosure, even if a copper foil having a carrier is not used, a single layer printed board or a multilayer printed board having a thin substrate thickness can be produced. In addition, the build-up method by making a VIA or the through-hole method by making a through hole can also be utilized in the technique of this indication.

(2nd embodiment)

In 1st Embodiment, the adhesion layer (not shown) with high adhesiveness with the conductor 12 may be provided in the surface which contact | connects the conductor 12 among the insulating layers 11. The adhesive layer is any material having high insulating property with high adhesion to the insulator layer 11 and the conductor 12. In this case, the manufacturing method of the board | substrate for electronic component mounting which concerns on this indication further includes an adhesion layer formation process before a conductor formation process.

In the adhesion layer forming step, the adhesion layer is formed on the insulating layer 11. In a conductor formation process, the conductor 12 is formed in the upper surface of an adhesion layer. The adhesion layer is formed in at least a part of the region where the conductors 12 on the insulating layer 11 are arranged. It is preferable that the adhesion layer is formed in the whole area | region where the conductor 12 is arrange | positioned, and may be formed in the whole insulating layer 11. As shown in FIG.

The adhesive layer is any material having higher adhesion to the conductor 12 than the insulating layer 11. The adhesion layer is disposed at least in part between the insulating layer 11 and the conductor 12. If the adhesion layer is arrange | positioned at least in part between the insulating layer 11 and the conductor 12, the adhesive strength of the insulating layer 11 and the conductor 12 can be improved, and the insulating layer 11 and the conductor 12 will be improved. It may be arrange | positioned in the whole area | region between and. The adhesion layer contains a substance that enhances the adhesion strength between the insulating layer 11 and the conductor 12. The substance which raises adhesive strength may use what kind of chemical interaction, physical interaction, and a mechanical bond. As mechanical coupling, the unevenness demonstrated in 2nd Embodiment mentioned later can be illustrated, for example.

As a substance which raises adhesive strength by chemical interaction, the substance etc. which are used as an adhesive agent may be contained in one part or all part of an adhesion layer. For example, as the resin material of the adhesive layer by some or all of the insulating materials, in addition to polyimide resin, epoxy resin, phenol resin, cyanate resin, etc., the conductor 12 and the insulating layer 11, such as inorganic materials, may be used. Whatever may be sufficient as the substance with high adhesiveness with respect to both. Inorganic substances, such as a metal oxide, a metal nitride, a metal carbide, and a redox agent, may be contained in some or all.

As a substance which improves the adhesive strength by physical interaction, at least any one of a reducing agent having a reducing action and an oxidizing agent having an oxidizing action may be contained in part or all of the adhesive layer. The reducing agent has a function of reducing a substance contained in at least any one of the conductor 12, the insulating layer 11, and the adhesion layer. The oxidant has an effect of oxidizing a substance contained in at least any one of the conductor 12, the insulating layer 11, and the adhesion layer. The reducing agent and the oxidizing agent may be reacted not only with the conductor 12, the insulating layer 11, and the adhesion layer, but also by a single or mutual combination with an environment or other catalyst such as air or water.

The reducing agent may be contained in the whole adhesion layer, may be included only in the surface of the conductor 12 side of an adhesion layer, and may be included only in the surface of the insulating layer 11 side. The same applies to the oxidizing agent. For example, the reducing agent may be contained in the surface of the conductor 12 side of the adhesion layer, and the oxidizing agent may be contained in the surface of the insulating layer 11 side of the adhesion layer. The proportion of the reducing agent contained in the adhesion layer is arbitrary, and may be a small amount as long as there is a property to reduce. The same applies to the oxidizing agent.

The reducing agent contained in the surface on the insulating layer 11 side of the adhesion layer may be different from or the same as the reducing agent contained in the surface of the conductor 12 side of the adhesion layer. As another example, a reducing agent suitable for the reduction of the conductor 12 is included on the conductor 12 side of the adhesion layer, and a reducing agent suitable for the insulating layer 11 is included on the insulating layer 11 side of the adhesion layer. It is also possible to adopt a configuration. As a similar example, if the substance which functions as a reducing agent is contained between the insulating layer 11 and the conductor 12, the contact bonding layer which concerns on this indication is provided. The same is true for oxidants.

In the example of the multilayer board | substrate shown in FIGS. 12-13, an adhesion layer can be provided in a combination layer. For example, an adhesion layer (not shown) is provided between the insulating layer 11 and the conductor 12 formed thereon, and between the insulating layer 14-1 and the conductor 12-1 constituting the combined layer. Prepare. In addition, an adhesion layer (not shown) is formed between the conductor 12-1 formed on the insulating layer 14-1 constituting the combination layer and the insulating layer 14-2 formed thereon. You may also In this case, instead of the combination layer of the insulating layer 14-2 and the conductor 12-2, the combination layer of the contact | adhesion layer and the conductor 12-2 may be formed.

The manufacturing method of the board | substrate for electronic component mounting which concerns on this embodiment may further have the indentation process demonstrated in 1st Embodiment after a conductor formation process. Thereby, peeling strength can be improved further.

(Third embodiment)

17 shows an example of an electronic component mounting board according to the embodiment of the present disclosure. As for the board | substrate for electronic component mounting which concerns on this embodiment, the conductor 12 is formed on the insulating layer 11. The conductor 12 includes the electroless plating layer 21 in the lowermost layer on the insulating layer 11 side. For example, as for the conductor 12, the electroless plating layer 21 and the electrolytic plating layer 22 are laminated | stacked in order from the lowest layer on the insulating layer 11 side. As described above, the insulating layer 11 and the electroless plating layer 21 contact each other, whereby the adhesion strength between the insulating layer 11 and the conductor 12 can be increased.

The electroless plating layer 21 is an arbitrary conductor formed by any method other than electrolytic plating. In FIG. 17, although the electroplating layer 22 is laminated | stacked on the electroless plating layer 21, the whole of the conductor 12 in which the electroplating layer 22 is not arrange | positioned is the electroless plating layer 21. In FIG. It may also be formed in the form.

18, the enlarged view of the boundary part of the insulating layer 11 and the conductor 12 is shown. FIG. 18B shows the cross-sectional shape at the surface 11U of the insulating layer 11, and FIG. 18A shows the A-A 'cross-sectional shape. The insulating layer 11 has irregularities on the surface 11U on the conductor 12 side. Unevenness | corrugation may be a recessed part, convex part, or both.

In the present disclosure, irregularities are formed on the surface 11U of the insulating layer 11, and the electroless plating layer 21 is formed thereon. For this reason, as shown in FIG. 19, the electroless plating layer 21 grows from the lower part of the conductor 12 arrange | positioned at the insulating layer 11 side, and is in direct contact with the surface 11U of the insulating layer 11. . Here, the convex parts shown at 112-6 and 112-9 may or may not be formed.

In the case where the convex shape is formed on the conductor 12 in order to obtain the anchor effect, a granular material such as Ni or Fe for forming the convex shape is formed between the surface U of the adhesion layer and the electroless plating layer 21. Included. In addition, since this indication forms an unevenness | corrugation on the surface of an adhesion layer, the granular material for forming a convex shape in the conductor 12 is not contained. For this reason, content of the substance different from the electroless plating layer 21 in the lowest layer of the conductor 12 is 30% or less. For example, in the lowermost layer of the conductor 12 of the present disclosure, the electroless plating layer 21 is formed of a single material. Here, a "single substance" includes a metal and an alloy. In addition, in the conductor convex parts from the conductor 12 side to the adhesion layer side of this indication, the conduction part in the adhesion layer like the tunnel 113 shown in FIG. 22 is not formed. In other words, the electroless plating layer 21 is formed only on one side of the surface of the adhesion layer.

When an anchor is formed using the convex shape formed in the conductor 12, the conductor 12 grows from the position of the conductor 12 toward the center direction of an adhesion layer. For this reason, the conductor 12 becomes thinner toward the center direction of an adhesion layer from the surface vicinity of the adhesion layer in which the conductor 12 is arrange | positioned. In contrast, the present disclosure forms concavities and convexities on the surface of the adhesive layer, so that not only the shape of the conductor 12 is tapered from the vicinity of the surface of the adhesive layer toward the insulating layer 11, but also the concave portions 111-11 of FIG. 18. As shown in 1, 111-3, and 111-6, the shape which spreads toward the insulating layer 11 from the vicinity of the surface of the adhesion layer 21 may be sufficient.

As shown in FIG. 20, the recesses 111-8 and 111-9 in FIG. 18 may be formed obliquely toward the center direction of the insulating layer 11 from the vicinity of the surface 11U of the insulating layer 11. . In this case, it is preferable that the distance between the recessed part 111-8 and the recessed part 111-9 is closer to the deeper side of the insulating layer 11 than near the surface 11U. Thereby, the insulating layer 11 is attracted to the recessed part 111-8 and the recessed part 111-9, and the peeling strength of the conductor 12 and the insulating layer 11 can be improved more.

In addition, since this indication forms an unevenness | corrugation on the surface 11U of the insulating layer 11, the regularity which the arrangement | positioning of the unevenness | corrugation in the surface 11U of the insulating layer 11 originates in the uneven | corrugated formation method is carried out. Have

When the unevenness is formed by using the uneven shape formed on the plane or on the roll, the uneven shape of the plane or the roll appears on the surface 11U as it is. For example, when a concave-convex shape includes a straight line having a constant width or a constant interval, as shown in numerals 111-8, 111-9 and FIG. Recesses or convexities remain. When the unevenness is formed by cutting the surface 11U, a linear mark remains in the cutting direction as shown in FIGS. 21B and 21C.

When uneven | corrugated is formed using a foamable chemical | medical agent, the marks of circular bubbles remain as shown to 111-1 to 111-7 shown in FIG. 18, and (d) of FIG. The inner diameters of the recesses 111-1 to 111-7 may be constant or different. Moreover, like the recessed part 111-1, there exists also the double circular shape in which the convex part 112-1 is formed in the recessed part 111-1. This convex part 112-1 may be formed also in the recessed parts 111-2 to 111-7. In addition, the circle | round | yen contained in unevenness | corrugation may be formed not only in a recess but a convex part. In addition, the cross-sectional shape of the unevenness shown in each of FIGS. 18A and 18B is not limited to the shape described above, and includes any shape formed when the unevenness is formed. For example, a wedge shape, a hook shape, a trapezoid, a pendulum, a trapezoid having two peaks, and the like can be exemplified.

Even if the regularity of the unevenness is not seen in a narrow range, regularity can be found by including a wide range. In particular, since the substrate for mounting an electronic component is separated into chips and mounted on an electronic component, etc., depending on the method of forming the unevenness, the regularity of the unevenness may not appear within one chip. In this case, traces of the asperity forming material may appear for the first time in any number of chips of two or more.

With reference to FIG. 22, the manufacturing method of the board | substrate for electronic component mounting which concerns on this indication is demonstrated. The manufacturing method of the board | substrate for electronic component mounting which concerns on this embodiment has an uneven | corrugated formation process before a conductor formation process.

In the uneven | corrugated formation process, the insulating layer 11 is prepared (FIG. 22 (a)), and unevenness | corrugation is formed in the surface 11U of the insulating layer 11 (FIG. 22 (b)). Uneven | corrugated formation is performed in the whole area | region where the wiring pattern of the conductor 12 can be formed among 11U of surfaces. In the case where the unevenness is formed on the entire surface 11U, the region shown in FIG. 18 is also shown in the region where the conductor 12 on the side of the surface 11U on which the conductor 12 of the insulating layer 11 is present is not disposed. The same unevenness is formed.

The method of forming the unevenness is arbitrary, and for example, the physical shape such as transferring the uneven shape formed on the plane or the roll onto the surface 11U, or embedding an insulating sheet having the uneven shape on the surface 11U, or the like. Mechanical formation, such as cutting the surface 11U by a formation, a brush, etc., chemical formation, such as dissolving or swelling the surface 11U using a chemical | medical agent, can be illustrated, and these may be combined. In addition, the uneven | corrugated shape of the surface 11U of the insulating layer 11 may differ in the area | region where the conductor 12 is arrange | positioned, and the area | region which is not.

The conductor forming step is as described in the first embodiment described above, but the present embodiment differs in that the electroless plating layer 21 is provided. The electroless plating layer 21 is formed (FIG. 22C), the electrolytic plating layer 22 is formed (FIG. 22D), and the electroless plating layer 21 is removed (FIG. 22E). )). Formation of the electroless plating layer 21 can illustrate coating of a liquid or paste-like conductor other than chemical plating. The electroless plating layer 21 is formed in the entire region where the wiring pattern of the conductor 12 can be formed in the surface 11U. The electroplating layer 22 is formed in the shape of a wiring pattern. Removal of the electroless plating layer 21 removes the electroless plating layer 21 formed in regions other than the wiring pattern, leaving the electrolytic plating layer 22. At this time, the edge (12E shown in FIG. 17) of the conductor 12 becomes round. In the present disclosure, since the conductors 12 are grown from the insulating layer 11 side, in the cross section perpendicular to the insulating layer 11, the edges of the upper surface of the conductor 12 facing the surface of the insulating layer 11 side. Is rounded.

In addition, the area | region which forms unevenness | corrugation among the surface 11U of the insulating layer 11, and the area | region which forms the electroless plating layer 21 are only the area | regions in which the wiring pattern of the conductor 12 is formed among the surface 11U. You may also

In addition, the electroless plating layer 21 may be directly formed in the shape of a wiring pattern without forming the electrolytic plating layer 22. In this case, the entire conductor 12 is composed of the electroless plating layer 21.

In addition, in this embodiment, although the single-sided board | substrate was illustrated as an example of the board | substrate for electronic component mounting which concerns on this indication, this indication is not limited to this. For example, the board for mounting electronic components according to the present disclosure may be a double-sided board. In this case, the structures of the insulating layer 11 and the conductor 12 described in this embodiment may be formed only on one side, or may be formed on both sides. In addition, the board | substrate for electronic component mounting which concerns on this indication may be a multilayer board | substrate. In this case, the structures of the insulating layer 11 and the conductor 12 described in this embodiment should just be included in at least one layer of a multilayer substrate.

As described above, in the present embodiment, the conductor 12 includes the electroless plating layer 21 at the lowermost layer on the insulating layer 11 side, and the insulating layer 11 and the electroless plating layer 21 are in contact with each other. . For this reason, this embodiment can provide the board | substrate for mounting electronic components with strong peeling strength.

In addition, although the application example to 1st embodiment was demonstrated in this embodiment, you may apply this embodiment to 2nd embodiment. In this case, the unevenness may be the surface of the adhesion layer in contact with the conductor 12, the surface of the adhesion layer in contact with the insulation layer 11, or the surface 11U of the insulation layer 11 in contact with the adhesion layer. It may be.

(4th embodiment)

Next, 4th Embodiment is described. The conductor 12 of this embodiment has a conductor recessed part (concave part) 200 in a side surface.

The conductor recess 200 may be formed by using a resist material containing the particulate matter 250. A specific example is shown.

First, the resist layer 290 is formed using the resist material containing the granular material 250 (see FIG. 23A).

Thereafter, the portion in which the conductor 12 is provided in the resist layer 290 is removed by etching or the like (see FIG. 23B). At this time, the particulate matter 250 is not removed by selecting an edging agent. In addition, the particulate matter 250 contained in the resist layer 290 is removed together with the resist layer 290.

Thereafter, plating is performed by electroless plating, electrolytic plating, or the like in a state where the particulate matter 250 is exposed from the side surface of the opening 295 provided in the resist layer 290, thereby forming the conductor 12. As a result, the conductor 12 which has the conductor recessed part 200 is formed (refer FIG. 23 (c)).

Thereafter, the resist layer 290 and the particulate matter 250 are removed by etching or the like. Also at this time, the granular material 250 contained in the resist layer 290 is removed together with the resist layer 290 (see FIG. 23D).

Subsequently, the conductor 12 having the conductor recess 200 is pressed into the insulating layer 11 in a semi-cured state (see FIG. 23E), and then the insulating layer 11 is cured.

By going through the above process, a part of the insulating layer 11 is located in the conductor recessed part 200 of the conductor 12, and the adhesive force with respect to the insulating layer 11 of the conductor 12 can be improved. .

(5th embodiment)

Next, 5th Embodiment is described. The side surface of the conductor 12 of this embodiment has a conductor convex part (convex part) 210. In addition, the convex part 210 and the concave part 200 may be provided in the side surface of the conductor 12 in mixture.

The conductor convex portion 210 may be formed by using a resist material containing the particulate matter 250. A specific example is shown.

First, the resist layer 290 is formed using the resist material containing the granular material 250 (see FIG. 24A).

Thereafter, the portion in which the conductor 12 is provided in the resist layer 290 is removed by etching or the like (see FIG. 24B). At this time, the particulate matter 250 is removed by selecting an edging agent or the like. In addition, the particulate matter 250 contained in the resist layer 290 is removed together with the resist layer 290.

Thereafter, plating is performed by electroless plating, electrolytic plating, or the like to form the conductor 12 (see FIG. 24C). As a result, the conductor 12 having the conductor convex portion 210 is formed.

Thereafter, the resist layer 290 is removed by etching or the like (see FIG. 24D). At this time, the particulate matter 250 contained in the resist layer 290 is removed together with the resist layer 290.

Subsequently, the conductor 12 having the conductor convex portion 210 is pressed into the insulating layer 11 in a semi-cured state, and then the insulating layer 11 is cured (see FIG. 24E).

By passing through the above processes, the conductor convex part 210 will be located in the insulating layer 11, and the adhesive force with respect to the insulating layer 11 of the conductor 12 can be improved.

(6th Embodiment)

In this embodiment, the application example of the board | substrate for electronic component mounting which concerns on this indication is demonstrated. The electronic component which concerns on this embodiment is equipped with the electronic component mounting board which concerns on this indication, and performs a predetermined process using the electronic component mounting board which concerns on this indication. The processing is any processing by the electronic component.

In the electronic device according to the present embodiment, the electronic component according to the present disclosure is used for at least one of the mounted electronic components. In the mounting apparatus according to the present embodiment, the electronic component or the electronic device according to the present disclosure is used for at least one of the mounted electronic component and the electronic device.

The present disclosure is applicable to all devices including the board for mounting electronic components. Examples of devices to which the present disclosure can be applied include, for example, automobiles, home appliances, communication devices, control devices, sensors, robots, drones, airplanes, spacecrafts, ships, production machines, construction machines, test machines, and surveying machines. , Computer-related products, digital devices, games and watches.

The apparatus is equipped with arbitrary functions according to the apparatus. The electronic component mounting board which concerns on this indication is used for electronic devices, such as an electronic chip used when performing this function. Since the peeling strength can be improved for the board | substrate for electronic component mounting which concerns on this indication, the reliability of an electronic component, an electronic device, and an apparatus can be improved.

The board | substrate for electronic component mounting of this indication, and its manufacturing method can be mounted in various electronic devices, or it can apply to manufacture of an electronic device.

11: insulation layer
12: conductor
121: metal foil
122: metal plating
13: pattern resist
14: insulation layer
15: VIA
11U: surface
111-1 to 111-9: recess
112-1, 112-6, 112-9: convex
113: tunnel
21: electroless plating layer
22: electrolytic plating layer

Claims (12)

With insulation layer,
A conductor provided in the insulating layer,
The said conductor is a board | substrate characterized in that at least one part of a bottom face and a side surface is located in the back surface side rather than the surface of the said insulating layer. The method of claim 1,
The whole side surface of the said conductor is located in the back surface side rather than the surface of the said insulating layer, The board | substrate characterized by the above-mentioned. The method according to claim 1 or 2,
And a top surface of the conductor and a surface of the insulating layer are located at the same height in the thickness direction. The method according to claim 1 or 2,
The top surface of the said conductor is located in the back surface side rather than the surface of the said insulating layer, The board | substrate characterized by the above-mentioned. The method according to any one of claims 1 to 4,
And said side surface of said conductor has a recess. The method according to any one of claims 1 to 5,
The side surface of the conductor has a convex portion. The method according to any one of claims 1 to 6,
The insulating layer has a plurality of laminated insulating layers laminated,
The conductor is provided on at least one of the laminated insulating layers,
The said board | substrate is at least one part of a bottom face and a side surface is located in the back surface side rather than the surface of the said laminated insulation layer, The board | substrate characterized by the above-mentioned. The method of claim 7, wherein
The one or more said conductors have a top surface located on the surface side rather than the surface of the laminated insulating layer provided with the conductors,
The top surface and the side surface of the said conductor are embed | buried in the other laminated insulation layer laminated | stacked on any one said laminated insulation layer, The board | substrate characterized by the above-mentioned. The method according to claim 7 or 8,
A conductor provided in one laminated insulating layer and a conductor provided in another laminated insulating layer laminated on the one laminated insulating layer are connected via a conductor portion. The method according to any one of claims 1 to 9,
The insulating layer has an adhesive layer,
The said conductor is provided in the said contact layer, The board | substrate characterized by the above-mentioned. The substrate of any one of Claims 1-10,
An electronic component provided on the substrate,
The electronic component is provided in the conductor. The mounting apparatus provided with the electronic device of Claim 11.

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