CN110915307B - Substrate for mounting electronic component and method for manufacturing the same - Google Patents

Abstract

The substrate of the present invention comprises: an insulating layer (11); and a conductor (12) arranged on the insulating layer (11). Wherein, at least a part of the bottom surface and the side surface of the conductor (12) is closer to the back side of the insulating layer (11) than the front side of the insulating layer (11).

Description

Substrate for mounting electronic components and manufacturing method thereof

technical field

The present invention relates to a substrate for mounting electronic components and a manufacturing method thereof.

Background technique

In recent years, along with the trend of high-density mounting of electronic devices, the industry has generally demanded that higher density, smaller, thinner, and multi-layered conductors can also be realized on substrates for mounting electronic components. However, when the conductors are mounted at a high density or miniaturized, once the adhesion between the insulating layer and the conductors formed on the insulating layer is not sufficiently ensured, it is impossible to ensure sufficient contact between the insulating layer and the conductor formed on the insulating layer. Adhesion between conductors. In addition, when there are multiple layers of conductors in the insulating layer, the adhesion between the insulating layer and the conductors will also be insufficient.

Patent Document 1 proposes a technology for improving the adhesion between the insulating layer and the conductor. Specifically, when the conductor is formed by a semi-additive method (Semi-additive method), the insulating layer is heated to improve the adhesion. Adhesion between insulating layer and conductor.

【Prior technical literature】

[Patent Document 1] JP-A-2012-169600

However, when it is desired to produce a thinner printed circuit board or to make the front surface of the insulating layer and the conductor adhere to each other by the semi-additive method, it is impossible to ensure sufficient adhesion between the insulating layer and the conductor. In addition, when the insulating layer is thin, it is easy to cause the conductor to peel off. When the adhesion between the insulating layer and the conductor is insufficient, the printed circuit board cannot be manufactured originally, and even if the printed circuit board is manufactured, the problem of low yield cannot be avoided.

In view of the above circumstances, the present invention aims to provide a substrate for mounting electronic components capable of improving adhesion.

Contents of the invention

The present invention achieves the above object by embedding the conductor formed on the insulating layer into the insulating layer. When the combination layer of the insulating layer and the conductor is formed as one layer or more on the insulating layer, at least a part of the conductor contained in at least one combination layer is buried toward the direction of the insulating layer.

The substrate for mounting electronic components described in the present invention may be any substrate as long as it can mount electronic components and has a conductor formed on an insulating layer. In the present invention, a substrate on which a conductor is formed on an insulating layer is referred to as an electronic component mounting substrate. Furthermore, the present invention includes electronic components, electronic modules, and mounting devices mounted on the substrate for mounting electronic components according to the present invention. For example, the mounting device according to the present invention is any device including the substrate for mounting electronic components according to the present invention and an electronic component to which a predetermined process is performed using the substrate for mounting electronic components. Therefore, the present invention can be applied to all electronic components, electronic modules, and devices that operate using the substrate for mounting electronic components.

Invention effect

According to the present invention, since at least a part of the conductor is buried in the insulating layer, the adhesiveness of the substrate for mounting electronic components, that is, the peel strength can be improved. In this way, the present invention can improve the durability of the substrate for mounting electronic components while preventing a decrease in yield when manufacturing the substrate for mounting electronic components, thereby improving the quality of the substrate for mounting electronic components as a whole. Furthermore, the present invention can improve the reliability of electronic parts, electronic modules, and devices that operate using the wiring board of the present invention.

Description of drawings

FIG. 1 is an explanatory view for explaining a conductor forming process of forming a conductor on an insulating layer.

FIG. 2 is an explanatory diagram for explaining a conductor forming step of forming a conductor on an insulating layer.

FIG. 3 is an explanatory diagram for explaining a press-fitting process for pressing or sinking a conductor into an insulating layer.

Fig. 4 is a diagram for explaining a heating step.

Fig. 5 is a diagram for explaining a heating step.

Fig. 6 is a diagram for explaining a heating step.

Fig. 7 is a diagram for explaining a heating step.

Fig. 8 is a diagram for explaining a heating step.

Fig. 9 is an explanatory schematic diagram at the time of heating.

Fig. 10 is a diagram for explaining the state after the conductor press-fitting step.

Fig. 11 is a diagram for explaining the state after the conductor pressing step.

FIG. 12 is an explanatory diagram for explaining a press-fitting process for pressing or sinking a conductor into an insulating layer.

FIG. 13 is an explanatory diagram for explaining a press-fitting process for pressing or sinking a conductor into an insulating layer.

Fig. 14 is a diagram for explaining the state after the conductor press-fitting step.

Fig. 15 is a diagram for explaining the state after the conductor pressing step.

FIG. 16 is a diagram for explaining a VIA forming step.

17 is a cross-sectional view showing an example of the electronic component mounting substrate according to the second embodiment.

Fig. 18 is a cross-sectional view showing an example of a boundary portion between an electroless plating layer and a conductor.

Fig. 19 is an enlarged view showing unevenness of the first example.

Fig. 20 is an enlarged view showing a second example of concavities and convexities.

FIG. 21 is a schematic diagram showing the regularity of irregularities on the front surface of the insulating layer.

22 is an explanatory diagram of a method of manufacturing the electronic component mounting substrate according to the third embodiment.

23 is a cross-sectional view showing an example of a manufacturing method for manufacturing a conductor having a conductor recess.

24 is a cross-sectional view illustrating an example of a manufacturing method for manufacturing a conductor having a conductor protrusion.

Detailed ways

Hereinafter, embodiments in the present invention will be described with reference to the drawings. The embodiments described below are merely examples of the present invention, and the present invention is not limited by the following embodiments. In addition, the same code|symbol is shown about the component with the same code|symbol in this invention and drawing.

(first embodiment)

In this embodiment mode, the case where the insulator layer is an insulating layer will be described. The method of manufacturing an electronic component mounting substrate according to the present embodiment includes a conductor forming step and a press-fitting step described below in this order. In this way, the present invention can improve the adhesion between the insulating layer and the conductor, that is, improve the peel strength.

A conductor forming process for forming a conductor on an insulating layer in the present invention is shown in FIGS. 1( a ) to 1 ( c ). In FIGS. 1( a ) to 1 ( c ), 11 denotes an insulating layer, 12 denotes a conductor, 121 denotes a metal foil, and 122 denotes metal plating. In addition, the up-down direction in FIG. 1 is the thickness direction of a board|substrate, the upper end surface in a drawing is a front surface, and the lower end surface is a back surface.

The insulating layer 11 is an insulator that can be used for a printed circuit board. The material used for the insulating layer 11 may be, for example, resin, or any material such as insulating glass or ceramics. The insulating layer 11 may mix two or more insulating substances. For example, a fibrous or granular insulator may be contained in the insulating layer 11 .

The insulating layer 11 may be an insulator obtained by mixing a base material with a resin. The resin is preferably a thermosetting resin or an ultraviolet curable resin. A thermoplastic resin can also be used if it has a certain heat resistance. Examples of thermosetting resins include polyimide resins, epoxy resins, phenol resins, and cyanate resins. The heat distortion temperature of the thermoplastic resin only needs to be greater than or equal to 50 degrees. The higher the deformation temperature, the better. Examples of the substrate include glass fibers, ceramic particles, and cellulose fibers, and natural objects such as spider web fibers may also be used. The base material may also not be limited to the above-mentioned materials. In addition, a prepreg obtained by impregnating and semi-curing the above-mentioned resin may be laminated on a glass cloth, and the insulating layer may be constituted after heating and pressing. This is also the same in any of the following embodiments.

The conductor 12 is a conductor layer formed of any material that can be used as a conductor of a printed circuit board, including metal foil, metal plating, and rolled plate. The material of the metal foil 121 and the metal plating 122 constituting the conductor 12 may be any metal, alloy or paste having conductivity. Alternatively, any substance other than metal such as carbon or ceramics can be used as part or all of the conductor 12 as long as it has conductivity. As the metal used for the conductor 12, copper, gold, silver, aluminum, nickel, or an alloy or paste containing the most of these metals in terms of mass % may be exemplified, but not limited thereto. This is also the same in any of the following embodiments.

First, metal plating is performed on the metal foil 121 laid on the insulating layer 11 ( FIG. 1( a )) ( FIG. 1( b )). Next, a patterned conductor 12 is formed on the insulating layer 11 by using a recognized panel plating method and a pattern plating method ( FIG. 1( c )). The conductor 12 thus formed includes a metal foil and a metal plating layer plated on the metal foil.

Another conductor forming process for forming a conductor on an insulating layer in the present invention is shown in FIGS. 2( a ) to 2 ( d ). This manufacturing method is called a semi-additive method. In FIGS. 2(a) to 2(d), 11 denotes an insulating layer, 12 denotes a conductor, and 13 denotes a pattern resist.

Examples of the material of the pattern resist 13 include photosensitive dry film, liquid resist, and ED resist, but are not limited thereto. This also applies to any of the following embodiments. These materials are either photocurable or photodissolvable.

Next, a pattern resist is applied on the insulating layer 11 (FIG. 2(a)), and finally the pattern resist is removed except for the conductor portion (FIG. 2(b)). Then, a conductor is grown by electroless plating on the remaining portion other than the pattern resist 13 (FIG. 2(c)). Next, the pattern resist 13 is removed, leaving the conductor 12 . At this time, as shown in FIG. 17 described later, corners 12E of the upper end surface (top surface) of conductor 12 have a circular arc shape in a cross section perpendicular to insulating layer 11 . In this conductor forming step, the patterned conductor 12 is formed on the insulating layer 11 . In addition, this conductor forming process is not limited to the above-mentioned method.

FIG. 3( a ) to FIG. 3( b ) show the pressing-in process of pressing the conductor in the present invention into the insulating layer. In FIGS. 3( a ) to 3 ( b ), 11 denotes an insulating layer, and 12 denotes a conductor. Once the conductor 12 (Fig. 3(a)) formed on the front side of the insulating layer 11 is mechanically pressed into the direction of the insulating layer 11, a part of the conductor 12 will be buried in the front side of the insulating layer 11 (Fig. 3(b) ). Fig. 3(b) is an example of a substrate for mounting electronic components in the present invention. The operation of mechanical pressing is to press the whole or part of the conductor 12 formed on the front surface of the insulating layer 11 into the insulating layer 11 by using a punching machine with a plane as the pressing surface, for example.

By pressing the conductor 12 into the insulating layer 11, not only the bottom surface of the conductor 12, but also at least a part of the side surface of the conductor 12 will be closely adhered to the insulating layer 11, thereby improving the peeling strength between the insulating layer 11 and the conductor 12.

The method of realizing the electronic component mounting substrate in which the conductor 12 is buried in the insulating layer 11 is not limited to the mechanical burying of the conductor 12 in the insulating layer 11 . For example, in the press-in process, both or any one of the conductor 12 and the insulating layer 11 may be heated, and the conductor 12 is sunk into the insulating layer 11 . In this way, the conductor 12 can be buried in the insulating layer 11 without applying a force to the conductor 12 .

At this time, although it is not necessary to press the conductor 12 into the insulating layer 11 , it is also possible to press the conductor 12 into the insulating layer 11 with a relatively weak force. In this way, the position of the upper end surface that is the top surface of the conductor 12 can be easily controlled. As described above, the press-fitting in the present invention also includes press-fitting with a weak force. Next, as an example of the press-in process, in addition to the step of mechanically pressing the conductor 12 into the insulating layer 11 in the press-in process, it also includes heating both the conductor 12 or the insulating layer 11 or one of them. An example of the heating step will be described.

In the press-fitting step, when the conductor 12 is mechanically pressed into the insulating layer 11 , both or either one of the conductor 12 and the insulating layer 11 may be heated. This is useful when the insulation is too hard or if you want to increase the peel strength even further. Heating is achieved by pressing a heater, irradiating LED light and infrared rays, or hot air blowing. The conductor 12 may be mechanically press-fitted using a panel heated by a heater.

Figure 4, Figure 5, Figure 6, Figure 7, Figure 8 show the heating steps. In FIG. 4 , FIG. 5 , FIG. 6 , FIG. 7 , and FIG. 8 , 11 denotes an insulating layer, and 12 denotes a conductor. In FIG. 4, FIG. 5, FIG. 6, FIG. 7, and FIG. 8, (a), (b), and (c) show the order. As the heat heating step, heating may be performed first ( FIG. 4( b )), followed by mechanically pressing ( FIG. 4( c )) while heating. It may be a step of heating first (FIG. 5(b)), and then mechanically pressing (FIG. 5(c)) after the heating is stopped. A step of simultaneously performing heating and mechanical pressing ( FIG. 6( b )) may also be used. It may also be a step of performing mechanical pressing first ( FIG. 7( b )), and heating while mechanically pressing ( FIG. 7( c )). It is also possible to perform mechanical pressing first ( FIG. 8( b )), and then heat ( FIG. 8( c )) after the mechanical pressing is stopped.

Figure 9(a) shows the schematic diagram during heating. Since the conductor 12 is metal and the insulating layer 11 is resin, the expansion rate of the conductor 12 is greater than that of the insulating layer 11 . Therefore, by heating at an appropriate temperature, the conductor 12 adheres closely to the insulating layer 11, and an anchoring effect can be obtained. Afterwards, even if the heat is removed ( FIG. 9( b )), the adhesion between the conductor 12 and the insulating layer 11 will be improved compared with that before heating. Therefore, the peel strength between the insulating layer 11 and the conductor 12 is increased.

In the press-fit process, the state of the conductor after press-fit will be described with reference to FIGS. 10(a), 10(b), 11(a), 11(b), and 11(c). 10( a ), FIG. 10( b ), FIG. 11( a ), FIG. 11( b ), and FIG. 11( c ) are examples of electronic component mounting substrates in the present invention. In FIG. 10( a ), FIG. 10( b ), FIG. 11( a ), FIG. 11( b ), and FIG. 11( c ), 11 denotes an insulating layer, and 12 denotes a conductor. In these descriptions, as shown in FIG. 10( a), the surface on the side of the insulating layer 11 (not shown) (the side close to the insulating layer 11 ) on the conductor 12 is referred to as the bottom surface, and the bottom surface will be referred to as the bottom surface. The surface on one side (the side away from the insulating layer 11) is called the upper end surface (top surface), the side sandwiched by the upper end surface and the bottom surface is called the side surface, and the surface on the insulating layer 11 carrying the conductor 12 is called the top surface. The front is called the front, and the opposite side is called the back.

The conductor 12 can be press-fitted until the bottom surface and a part of the side surface of the conductor 12 are lower than the front surface of the insulating layer 11 ( FIG. 10( a )). Since the entire bottom surface and part of the side surfaces of the conductor 12 are in close contact with the insulating layer 11 , the peel strength between the insulating layer 11 and the conductor 12 is improved. Alternatively, the conductor 12 may be pressed until the upper end surface of the conductor 12 is on the same surface as the front surface of the insulating layer 11 ( FIG. 10( b )). Since the entire bottom surface and the entire side surface of the conductor 12 are closely attached to the insulating layer 11, the peel strength between the insulating layer 11 and the conductor 12 is further improved.

In addition, in FIG. 10( a ), although it is illustrated that the side faces arranged on both sides of the bottom surface are commonly buried in the insulating layer 11, the present invention is not limited thereto, and for example, only one side face arranged on both sides of the bottom surface may be used. The insulating layer 11 is buried. Although the upper end surface of the conductor 12 expands in the x-axis direction in FIG. 10( a ), the present invention is not limited thereto, and the upper end surface of the conductor 12 may also be inclined in the x-axis direction.

10( a ) and FIG. 10( b ) illustrate that the cross-sectional shape of the conductor 12 is a square, but the cross-sectional shape of the conductor 12 according to the present invention may be any shape. For example, the upper end surface of the conductor 12 may be curved, and the boundary between the side surface and the upper end surface may also form a continuous curve.

Not only the bottom surface and side surfaces of the conductor 12, but also the conductor 12 can be press-fitted until its upper end surface becomes lower than the front surface of the insulating layer 11 (Fig. 11(a), Fig. 11(b), Fig. 11(c)). In FIG. 11( a ), the conductor 12 is pressed until its upper end surface is lower than the front surface of the insulating layer 11 , but the upper end surface of the conductor 12 is exposed. Since the entire bottom surface and the entire side surface of the conductor 12 are closely adhered to the insulating layer 11 , the peeling strength between the insulating layer 11 and the conductor 12 is further improved. In FIG. 11( b ), conductor 12 is pressed until its upper end surface is lower than the front surface of insulating layer 11 , but part of the upper end surface of conductor 12 is exposed. Since the entire bottom surface, the entire side surface and a part of the upper end surface of the conductor 12 are in close contact with the insulating layer 11, the peel strength between the insulating layer 11 and the conductor 12 is further improved. In FIG. 11( c ), the conductor 12 is pressed until the upper end surface of the conductor 12 is lower than the front surface of the insulating layer 11 to bury the upper end surface of the conductor 12 in the insulating layer 11 . Since the entire bottom surface, the entire side surface and the entire upper end surface of the conductor 12 are in close contact with the insulating layer 11 , the peeling strength between the insulating layer 11 and the conductor 12 is further improved.

In addition, in FIG. 10( a ), FIG. 10( b ), and FIG. 11( a ), three surfaces of the conductor 12 are in close contact with the insulating layer 11 . When having the same structure also in the yz plane, the five surfaces of the conductor 12 are in close contact with the insulating layer 11 . Therefore, in addition to the bottom surface of the conductor 12 extending in the x-axis direction, a part or the entire side surface of the conductor 12 extending in the y-axis direction is also in close contact with the insulating layer 11. Therefore, with respect to the x, The load in the z-axis direction can increase the peel strength.

In FIG. 11( b ) and FIG. 11( c ), the four surfaces of the conductor 12 are in close contact with the insulating layer 11 . When having the same structure also in the yz plane, the six surfaces of the conductor 12 are in close contact with the insulating layer 11 . Therefore, in addition to the bottom surface of the conductor 12 extending in the x-axis direction, a part or the entire side surface of the conductor 12 extending in the y-axis direction and a part or the entire upper end surface of the conductor 12 extending in the x-axis direction are also insulated from Since the layers 11 are in close contact, the peel strength can be improved against the loads in the x-, y-, and z-axis directions applied to the conductor 12 .

In FIG. 10 and FIG. 11 , although the bottom surface of the conductor 12 is exemplified in close contact with the insulating layer 11 , the present invention is not limited thereto. For example, in Fig. 10 (a), Fig. 10 (b), Fig. 11 (a), the present invention also includes a part or whole bottom surface of conductor 12 exposed on the back side of insulating layer 11, two faces of conductor 12 and insulating layer 11 dense form. When having the same structure also in the yz plane, the four surfaces of the conductor 12 are in close contact with the insulating layer 11 . At this time, since a part or the entire side surface of the conductor 12 extending in the y-axis direction is in close contact with the insulating layer 11, the peel strength can be improved against the loads applied to the conductor 12 in the x- and z-axis directions.

In addition, in FIG. 11( b ), the entire bottom surface of the conductor 12 is exposed on the back surface of the insulating layer 11 and the three surfaces of the conductor 12 are in close contact with the insulating layer 11 . When having the same structure also in the yz plane, the five surfaces of the conductor 12 are in close contact with the insulating layer 11 . At this time, since the upper end surface of a part of the conductor 12 extending in the x-axis direction and a part or the entire side surface of the conductor 12 extending in the y-axis direction are in close contact with the insulating layer 11, relative to the x applied to the conductor 12, , y, and z-axis directions can increase the peel strength.

In FIG. 11( b ), a part of the bottom surface of the conductor 12 is exposed on the back surface of the insulating layer 11 , and the four surfaces of the conductor 12 are in close contact with the insulating layer 11 . When having the same structure also in the yz plane, the six surfaces of the conductor 12 are in close contact with the insulating layer 11 . At this time, since the upper end surface of a part of the conductor 12 extending in the x-axis direction, the entire side surface of the conductor 12 extending in the y-axis direction, and the bottom surface of a part of the conductor 12 extending in the x-axis direction are in close contact with the insulating layer 11. , Therefore, with respect to the loads in the x, y, and z axis directions applied to the conductor 12, the peel strength can be improved.

Next, an electronic component mounting substrate will be described as an example of a multilayer substrate in which a combination layer of an insulating layer and a conductor is formed on the insulating layer. The insulating layer in the example described below is contained in at least one built-up layer, and at least a part of the conductor contained in the at least one built-up layer is buried in the insulating layer. Specifically, the substrate for mounting electronic components to be described below includes: an insulating layer; a conductor formed on the insulating layer; and at least one set of insulating layers and layers formed on the conductor and the insulating substrate. A combination of conductors on said insulating layer, wherein at least one of said conductors is buried in said insulating layer or in said insulating layer.

In Fig. 12(a), Fig. 12(b), Fig. 12(c), Fig. 13(a), Fig. 13(b), and Fig. 13(c), 11a represents a laminated insulating layer, 12 represents a conductor, and 14 Indicates stacked insulating layers. In FIG. 12 and FIG. 13, as a combination example of the laminated insulating layer 14 and the conductor 12, a combination layer of the laminated insulating layer 14-1 and the conductor 12-1, a laminated insulating layer 14-2 and the conductor 12 are shown. 12-2, and a laminated insulating layer 14-3 and conductor 12-3. The stacked insulating layers 11a, 14 constitute an insulating layer.

In the conductor forming step or the second conductor forming step, a conductor is formed on the laminated insulating layer 11a or each laminated insulating layer 14 (FIG. 12(a), FIG. 12(b), FIG. 12(c), FIG. 13(a) ), Figure 13(b), Figure 13(c)). In order to form a conductor on the buildup layer, a conductor 12 is formed on the laminated insulating layer 11a (conductor forming step). Further, the laminated insulating layer 14 is formed on the upper layer of the conductor 12 and the laminated insulating layer 11a, and then a conductor is further formed on the laminated insulating layer 14 (second conductor forming process), and the second conductor forming process is performed according to Repeat as many times as needed.

The material of the laminated insulating layer 14 may be the same as that which can be suitably used in the laminated insulating layer 11a. This also applies to any of the following embodiments.

In the press-in process of pressing or sinking the conductor 12 into the uppermost stacked insulating layer 14, after forming the uppermost stacked insulating layer 14 (FIG. 12(b)), the uppermost The conductor 12 is pressed or sunk into the laminated insulating layer 14 (FIG. 12(c)).

In the pressing process of pressing or sinking the conductor 12 into the laminated insulating layer 14, or in the pressing process of pressing the conductor 12 into or sinking the conductor 12 into the laminated insulating layer 14 located in the middle layer, the After forming the conductor 12 on the laminated insulating layer 11a, or after forming the laminated insulating layer 14 and then forming the conductor 12, the conductor 12 is mechanically pressed into the laminated insulating layer 11a or the laminated insulating layer 14 (FIG. 13 (a)). In the final second conductor forming process, the conductor 12 is formed on the uppermost laminated insulating layer 14 (FIG. 13(b)), and in the press-in process, the uppermost conductor 12 is mechanically pressed or pressed into the uppermost layer. It sinks into the uppermost stack insulating layer 14 (FIG. 13(c)).

1(a) to FIG. 1(c), or the process shown in FIG. 2(a) to FIG. 2(d) can be applied to the conductor forming process or the second conductor forming process to form Conductor 12.

In the press-in process, when the conductor 12 is pressed or sunk into the laminated insulating layer 11a or the laminated insulating layer 14, the laminated insulating layer 11a, the laminated insulating layer 14, and the conductor 12 can be At least either one is heated. Heating can be realized by pressing a heater, irradiating infrared rays, or hot air blowing. The conductor 12 can also be pressed in mechanically using a panel heated by a heater. The heating step can be the same as the steps illustrated in FIGS. 4 , 5 , 6 , 7 , 8 .

In the electronic component mounting substrate in the present invention, the multilayer insulating layer 11 a and the multilayer insulating layer 14 may be integrated. Alternatively, when a plurality of stacked insulating layers 14 are adjacent to each other, they are integrated.

In the press-fitting process, the state after pressing the conductor 12 into the laminated insulating layer 14 is the same as that of Fig. 10(a), Fig. 10(b), Fig. 11(a), Fig. 11(b), and Fig. 11(c) .

14( a ), FIG. 14( b ), FIG. 15( a ), FIG. 15( b ), and FIG. 15( c ) show the state after the conductor 12 is pressed into the laminated insulating layer 14 . 14( a ), FIG. 14( b ), FIG. 15( a ), FIG. 15( b ), and FIG. 15( c ) are examples of electronic component mounting substrates in the present invention. In Fig. 14(a), Fig. 14(b), Fig. 15(a), Fig. 15(b), and Fig. 15(c), 12 denotes a conductor, and 14 denotes a laminated insulating layer. In these descriptions, as shown in FIG. 14(a), the surface of the conductor 12 on the side closer to the laminated insulating layer 11a (the side closer to the laminated insulating layer 11a) is referred to as the bottom surface, and the surface relative to the bottom surface is referred to as the bottom surface. The surface on one side (the side away from the laminated insulating layer 11a) is called the upper end surface, and the surface on the side sandwiched between the upper end surface and the bottom surface is called the side surface. The surface on one side of the layer 11a is referred to as an upper end surface.

The conductor 12 can be press-fitted until the bottom surface and a part of the side surface of the conductor 12 are lower than the upper end surface of the laminated insulating layer 14 ( FIG. 14( a )). Since the entire bottom surface and part of the side surfaces of the conductor 12 are in close contact with the laminated insulating layer 14 , the peel strength between the laminated insulating layer 14 and the conductor 12 is improved. Alternatively, the conductor 12 may be press-fitted until the upper end surface thereof is flush with the upper end surface of the laminated insulating layer 14 ( FIG. 14( b )). Since the entire bottom surface and the entire side surface of the conductor 12 are in close contact with the laminated insulating layer 14 , the peel strength between the laminated insulating layer 14 and the conductor 12 is further improved.

Not only the bottom surface and the side surface of the conductor 12, but also the conductor 12 can be pressed until its upper end surface becomes lower than the upper end surface of the laminated insulating layer 14 (Fig. 15(a), Fig. 15(b), Fig. 15(c) )). In FIG. 15( a ), the conductor 12 is pressed until its upper end surface is lower than the upper end surface of the laminated insulating layer 14 , but the upper end surface of the conductor 12 is exposed. Since the entire bottom surface and the entire side surface of the conductor 12 are in close contact with the laminated insulating layer 14 , the peel strength between the laminated insulating layer 14 and the conductor 12 is further improved. In FIG. 15( b ), although the conductor 12 is pressed until the upper end surface of the conductor 12 is lower than the upper end surface of the laminated insulating layer 14 , a part of the upper end surface of the conductor 12 is exposed. Since the entire bottom surface, the entire side surface, and a part of the upper end surface of the conductor 12 are in close contact with the laminated insulating layer 14 , the peel strength between the laminated insulating layer 14 and the conductor 12 is further improved. In FIG. 11( c ), the conductor 12 is pressed until the upper end surface of the conductor 12 becomes lower than the upper end surface of the laminated insulating layer 14 , and is buried in the laminated insulating layer 14 up to the upper end surface of the conductor 12 . Since the entire bottom surface, the entire side surface and the entire upper end surface of the conductor 12 are in close contact with the laminated insulating layer 14 , the peel strength between the laminated insulating layer 14 and the conductor 12 is further improved.

By pressing or sinking the uppermost conductor 12 into the laminated insulating layer 14, the peel strength between the laminated insulating layer 14 and the conductor 12 can be improved in the electronic component mounting substrate as a final product. By pressing or sinking conductors other than the uppermost layer conductors into the laminated insulating layer 11a or the laminated insulating layer 14, it is possible to lift the laminated insulating layer 11a or the laminated insulating layer 14 during the manufacturing process of the substrate for mounting electronic components. The peel strength between 14 and conductor 12 can prevent the conductor from peeling off during the manufacturing process.

A press-fitting step is included in the conductor forming step or the second conductor forming step. This press-fitting step may include a VIA forming step of forming a VIA that electrically connects conductors 12 formed on different layers among the conductors 12 formed on the buildup layer, which is a part of the conductor portion. After the VIA formation process, the conductor 12 is pressed or sunk into the stack insulating layer 14 .

Next, the VIA, which is a part of the conductor part, and electrically connects the conductors 12 formed on different layers among the conductors 12 formed on the composite layer by the laminated insulating layer 14, will be described. The VIA formation process is shown in FIG. 16( a ), FIG. 16( b ), FIG. 16( c ), and FIG. 16( d ). In FIG. 16(a), FIG. 16(b), FIG. 16(c), and FIG. 16(d), 11a denotes a laminated insulating layer, 12 denotes a conductor, 14 denotes an insulating layer, and 15 denotes a VIA.

In the conductor forming step or the second conductor forming step, the conductor 12, the laminated insulating layer 14, and the conductor 12 are sequentially formed on the laminated insulating layer 11a (FIG. 16(a), FIG. 16(b)). Conductors 12 formed on different layers are electrically connected through VIA15 ( FIG. 16( c )). Afterwards, if the conductor 12 is mechanically pressed or sunk into the laminated insulating layer 14 , the VIA 15 is compressed, thereby improving the anchoring effect and increasing the peel strength between the laminated insulating layer 14 and the conductor 12 . Although the VIA that electrically connects the conductor 12 on the laminated insulating layer 11a and the conductor 12 on the laminated insulating layer 14 to each other has been described here, this is not the case for connecting the conductor 12 on the laminated insulating layer 14 to the laminated insulating layer. Conductor 12 on 14 is also the same with respect to VIA 15 for electrical connection. The same applies to the VIA that electrically connects the uppermost conductor 12 and the lower conductor 12 to each other.

In the above, although the conductor 12 is mechanically pressed into the laminated insulating layer 11a and the laminated insulating layer 14 after the VIA forming process, the conductor 12 may be mechanically pressed into the laminated insulating layer 11a and the laminated insulating layer 14 in advance. VIA15 is formed after insulating layer 14 is formed.

In each of the above-mentioned embodiments, although one side of the laminated insulating layer is shown and described, this description is not only applicable to a single-sided substrate. In the case of a double-sided substrate or a multilayer substrate, the present invention The technique of can also be applied to each of the two sides of the laminated insulating layer. In the case of a double-sided substrate or a multilayer substrate, the upper layer or upper end surface in this embodiment can also be regarded as the upper layer or upper end surface on the side farther from the stacked insulating layer.

In the case of a multilayer substrate, the conductor on the laminated insulating layer, the conductor of the outermost layer farthest from the laminated insulating layer, and any layer between the laminated insulating layer and the outermost layer may be Arbitrary conductors pressed or sunk into laminated insulation. For example, conductors pressed or sunk into the outermost layer are also included, and conductors of intermediate layers between the laminated insulation layer and the outermost layer are also pressed into or sunk, or pressed or sunk into the laminated insulation layer Any form of conductor in the intermediate layer between the outermost layer and the outermost layer.

In the case of double-sided substrates or multi-layer substrates, when pressing or sinking the conductors on both sides, it is also possible to apply pressure to the conductors simultaneously from both sides to press them in.

In addition, in the production of thinner printed circuit boards, the copper foil is easily damaged, and the current situation of using copper foil with a carrier has to be used. This situation also has these problems: the first is the high price of the copper foil with a carrier, and the second is that The defective rate is high, and the third is the high requirement for the management degree of the manufacturing process. According to the present invention, even without using a copper foil with a carrier, it is possible to manufacture a one-layer printed circuit board or a multilayer printed circuit board having a relatively thin substrate thickness. In addition, the technology of the present invention can also use a build-up process by manufacturing a VIA or a via method by manufacturing a through-hole.

(second embodiment)

In the first embodiment, an adhesive layer (not shown) having high adhesion may be provided on the surface of the insulating layer 11 that is in contact with the conductor 12 . The adhesive layer is an arbitrary insulating material that exhibits high adhesion between the insulating layer 11 and the conductor 12 . In this case, the manufacturing method of the board|substrate for mounting electronic components which concerns on this invention further includes the adhesive layer formation process.

In the adhesive layer forming step, an adhesive layer is formed on the insulating layer 11 . In the conductor forming step, the conductor 12 is formed on the upper end surface of the adhesive layer. The adhesive layer is formed on at least a part of the region where the conductor 12 is arranged on the insulating layer 11 . Ideally, the adhesive layer is formed over the entire region where the conductor 12 is arranged, but may be formed over the entire insulating layer 11 .

The adhesive layer is any material having insulating properties that is more adhesive to the conductor 12 than the insulating layer 11 . The adhesive layer is arranged on at least a part between the insulating layer 11 and the conductor 12 . If the adhesive layer is arranged on at least a part between the insulating layer 11 and the conductor 12, the adhesion strength between the insulating layer 11 and the conductor 12 can be improved, and the adhesive layer can also be arranged on the entire area between the insulating layer 11 and the conductor 12. superior. The adhesive layer contains a substance that increases the adhesive strength between the insulating layer 11 and the conductor 12 . The substance that improves the adhesion strength may use any of chemical interaction, physical interaction, and mechanical bonding. As a mechanical connection, for example, unevenness described in the third embodiment described later can be exemplified.

As a substance that enhances the adhesion strength by chemical interaction, a substance used as an adhesive may be contained in a part or the whole of the adhesion layer. For example, as the resin material of the adhesive layer composed of a part or all of an insulating material, in addition to polyimide resin, epoxy resin, phenolic resin, cyanate resin, etc., inorganic materials may be used for the conductor 12. Any substance with high adhesion to both sides of the insulating layer 11 . Part or all of inorganic substances such as metal oxides, metal nitrides, metal carbides, oxidizing agents, and reducing agents may be included.

At least either one of a reducing agent having a reducing effect and an oxidizing agent having an oxidizing effect may be contained in a part or the entirety of the adhesive layer as a substance that increases the adhesive strength through physical interaction. The reducing agent has the function of reducing substances contained in at least one of the conductor 12, the insulating layer 11, and the adhesive layer. The oxidizing agent has a function of oxidizing a substance contained in at least one of the conductor 12, the insulating layer 11, and the adhesive layer. The reducing agent and the oxidizing agent can not only react with the conductor 12, the insulating layer 11, and the adhesive layer, but also react with the surrounding environment such as air or water, and other catalysts alone or in combination with each other.

The reducing agent may be contained in the entire adhesive layer, may be contained only in the front surface of the adhesive layer on the conductor 12 side, or may be contained only in the front surface of the insulating layer 11 side. The same is true for oxidizing agents. For example, a reducing agent may be contained on the surface of the adhesive layer on the conductor 12 side, and an oxidizing agent may be contained on the surface of the adhesive layer on the insulating layer 11 side. The ratio of the reducing agent contained in the adhesive layer is arbitrary, and a small amount may be used as long as it has a reducing property. The same is true for oxidizing agents.

The reducing agent contained in the surface of the adhesive layer on the insulating layer 11 side may be different from the reducing agent contained in the surface of the adhesive layer on the conductor 12 side, or may be the same. As a different example, for example, a structure may be adopted in which a reducing agent suitable for reduction of the conductor 12 is contained on the conductor 12 side of the adhesive layer, and a reducing agent suitable for the insulating layer 11 is contained on the insulating layer 11 side of the adhesive layer. As a similar example, for example, as long as a substance functioning as a reducing agent is contained between the insulating layer 11 and the conductor 12, the adhesive layer according to the present invention is provided. The same is true for oxidizing agents.

In the example of the multilayer substrate shown in FIGS. 12 to 13 , an adhesive layer can be provided on the buildup layer. For example, an adhesive layer (not shown) is provided between the insulating layer 11 and the conductor 12 formed on the insulating layer, and between the insulating layer 14-1 constituting a composite layer and the conductor 12-1. An adhesive layer (not shown) may be provided between the conductor 12-1 formed on the insulating layer 14-1 constituting the composite layer and the insulating layer 14-2 formed on the conductor 12-1. In this case, instead of the combined layer of the insulating layer 14-2 and the conductor 12-2, a combined layer of the adhesive layer and the conductor 12-2 may be formed.

The method of manufacturing an electronic component mounting substrate according to this embodiment may further include the press-fitting step described in the first embodiment after the conductor forming step. By doing so, it is possible to further increase the peel strength.

(third embodiment)

FIG. 17 shows an example of a substrate for mounting electronic components according to an embodiment of the present invention. In the electronic component mounting substrate according to the present embodiment, the conductor 12 is formed on the insulating layer 11 . The lowermost layer on the side of the insulating layer 11 of the conductor 12 includes an electroless plating layer 21 . For example, the conductor 12 has an electroless plating layer 21 and an electrolytic plating layer 22 laminated in order from the bottom layer on the insulating layer 11 side. In this way, since the insulating layer 11 is in contact with the electroless plating layer 21, the adhesion strength of the insulating layer 11 and the conductor 12 can be improved.

The electroless plating layer 21 is an arbitrary conductor formed by an arbitrary method of electroless plating. In FIG. 17 , although the electrolytic plating layer 22 is laminated on the electroless plating layer 21, the electrolytic plating layer 22 may not be arranged, and the whole conductor 12 may be made of the electroless plating layer 21. the way it was formed.

FIG. 18 shows an enlarged view of the insulating layer 11 and the boundary portion of the conductor 12 . Fig. 18(b) shows the cross-sectional shape of the front surface 11U of the insulating layer 11, and Fig. 18(a) shows the AA' cross-sectional shape. The insulating layer 11 has irregularities on the front surface 11U on the conductor 12 side. The unevenness may be a concave portion, a convex portion, or both.

In the present invention, unevenness is formed on the front surface 11U of the insulating layer 11, and the electroless plating layer 21 is formed thereon. Therefore, as shown in FIG. 19, the electroless plated layer 21 grows from the lower portion of the conductor 12 disposed on the insulating layer 11 side, and directly contacts the front surface 11U of the insulating layer 11. Here, the convex parts shown by the code|symbol 112-6 and 112-9 may be formed, and the convex part shown by the code|symbol 112-6 and 112-9 may not be formed.

When forming a convex shape on the conductor 12 to obtain an anchoring effect, between the front surface of the adhesive layer and the electroless plating layer 21, granular substances such as Ni or Fe are contained for forming the convex shape. On the other hand, in the present invention, since the unevenness is formed on the front surface of the adhesive layer, no particulate matter for forming the convexity on the conductor 12 is included. Therefore, the content of the substance different from the electroless plating layer 21 in the lowermost layer of the conductor 12 is 30% or less. For example, the electroless plating layer 21 of the lowest layer of the conductor 12 in this invention may be formed from a single substance. The [single substance] here includes metals and alloys. In addition, in the conductor protrusion from the conductor 12 side to the adhesive layer side in the present invention, as shown in the trench 133 in FIG. 18 , no conduction portion is formed in the adhesive layer. That is, the electroless plating layer 21 is formed only on the front side of the adhesive layer.

When the anchor is formed using the convex shape formed on the conductor 12, the conductor 12 grows from its own position toward the center of the adhesive layer. Therefore, the conductor 12 becomes thinner toward the center of the adhesive layer from the vicinity of the front surface 1 where its own adhesive layer is arranged. On the other hand, in the present invention, since the concavo-convex is formed on the front surface of the adhesive layer, not only the shape of the conductor 12 becomes thinner from the vicinity of the front surface of the adhesive layer toward the center of the insulating layer 11, but also the recesses 111-1, 111 shown in Fig. 18 -3, 111-6 shows a shape extending from the vicinity of the front surface of the adhesive layer toward the center of the insulating layer 11 .

As shown in FIG. 20 , recesses 111 - 8 and 111 - 9 in FIG. 18 may be formed obliquely from the vicinity of front surface 11U of insulating layer 11 toward the center of insulating layer 11 . At this time, the distance between the concave portion 111-8 and the concave portion 111-9 is preferably set so that the deeper the insulating layer 11 is, the smaller the distance between the concave portion 111-8 and the concave portion 111-9 is than the distance between the insulating layer 11. The distance near the front 11U is small. In this way, the insulating layer 11 can be clasped by the concave portion 111 - 8 and the concave portion 111 - 9 , thereby further improving the peel strength between the conductor 12 and the insulating layer 11 .

In addition, since the present invention forms the unevenness on the front surface 11U of the insulating layer 11, the arrangement of the unevenness on the front surface 11U of the insulating layer 11 has regularity due to the method of forming the unevenness.

When the unevenness formed on a flat surface or on a roller is used to form the unevenness, the unevenness of the flat surface or the roller appears directly on the front surface 11U. For example, when the concavo-convex shape contains straight lines with a certain width or a certain interval, the symbols 111-8, 111-9 shown in Figure 18 and the recesses with a certain width or a certain interval as shown in Figure 21(a) will remain. or bumps. When the surface 11U is cut to form unevenness, as shown in FIG. 21( b ) and FIG. 21( c ), linear traces are left in the cutting direction.

When the unevenness is formed using a foaming chemical, traces of circular foam are left as shown in symbols 111 - 1 to 111 - 7 shown in FIG. 18 and FIG. 21( d ). The inner diameters of the recesses 111-1 to 111-7 may be constant or different. In addition, as shown in the recessed part 111-1, there is also a double circle in which the convex part 112-1 is formed in the recessed part 111-1. The convex portion 112-1 may also be formed in the concave portions 111-2 to 111-7. In addition, the circular shape included in the unevenness may be formed not only in the concave portion but also in the convex portion. In addition, the cross-sectional shape of the concavo-convex shown in FIG. 18( a ) and FIG. 18( b ) is not limited to the above-mentioned shape, and any shape formed when forming the concavo-convex is also included. For example, a wedge shape, a hook shape, a trapezoid shape, a pendulum shape, a trapezoid shape with double peaks, and the like can be exemplified.

Even if the regularity of unevenness cannot be found in a narrow range, it can be found if it is included in a wide range. In particular, since the substrate for mounting electronic components is separated into chips and mounted on electronic components, etc., the regularity of the unevenness may not appear in one chip depending on the method of forming the unevenness. In this case, traces of the bump-forming substance will only start to show on any number of chips greater than or equal to two.

Next, a method of manufacturing an electronic component mounting substrate according to the present invention will be described with reference to FIG. 22 . The manufacturing method of the board|substrate for mounting electronic components which concerns on this embodiment has an uneven|corrugated forming process before a conductor forming process.

In the concave-convex forming step, the insulating layer 11 is first prepared (Fig. 22(a)), and then concave-convex is formed on the front surface 11U of the insulating layer 11 (Fig. 22(b)). Concave-convex formation is performed over the entire area where the wiring pattern of the conductor 12 can be formed in the front surface 11U. When the unevenness is formed on the entire front surface 11U, the unevenness shown in FIG. 18 is similarly formed on the region where the conductor 12 is not arranged on the front surface 11U side where the conductor 12 exists on the insulating layer 11 .

Any method can be used to form the unevenness, for example, physical formation such as transferring an unevenness formed on a plane or a roller to the front surface 11U, embedding an insulating sheet having unevenness in the front surface 11U, etc., or using a brush, etc. Mechanical formation such as cutting the front 11U and chemical formation such as dissolving or swelling the front 11U using chemicals may be combined. In addition, the concavo-convex shape of the front surface 11U of the insulating layer 11 may be different between the region where the conductor 12 is arranged and the region where the conductor 12 is not arranged.

The conductor forming process is the same as that described in the first embodiment, but the present embodiment is different in that the electroless plating layer 21 is provided. It is to form the electroless plating layer 21 (Fig. 22(c)), form the electrolytic plating layer 22 (Fig. 22(d)), and remove the nonelectrolytic plating layer 21 (Fig. 22(e)). As for the formation of the electroless plating layer 21 , other than electroless plating, liquid or pasty conductor coating can also be exemplified. Formation of the electroless plating layer 21 is performed on the entire area where the wiring pattern of the conductor 12 can be formed in the front surface 11U. The electrolytic plating layer 22 is formed in the shape of a wiring pattern. Removing the non-electrolytic plating layer 21 is to remove the electrolytic plating layer 21 formed in a region other than the wiring pattern while leaving the electrolytic plating layer 22 . At this time, the corners of the conductor 12 (symbol 12E shown in Fig. 17) are rounded. In the present invention, since the conductor 12 is grown from the insulating layer 11 side, the corners of the upper end surface of the conductor 12 facing the insulating layer 11 side surface are rounded in a cross section perpendicular to the insulating layer 11 .

In addition, the region where the unevenness is formed on the front surface 11U of the insulating layer 11 and the region where the electroless plating layer 21 is formed may be only the region where the wiring pattern of the conductor 12 is formed on the front surface 11U.

Instead of forming the electrolytic plating layer 22, the electroless plating layer 21 may be directly formed in the shape of a wiring pattern. At this time, the entirety of the conductor 12 is constituted by the electroless plating layer 121 .

In the present embodiment, a single-sided substrate was exemplified as an example of the electronic component mounting substrate according to the present invention, but the present invention is not limited thereto. For example, the electronic component mounting substrate according to the present invention may be a double-sided substrate. At this time, the structure of the insulating layer 11 and the conductor 12 described in this embodiment may be formed only on one side or may be formed on both sides. In addition, the electronic component mounting substrate according to the present invention may be a multilayer substrate. In this case, the structures of the insulating layer 11 and the conductor 12 described in this embodiment need only be included in at least one layer of the multilayer substrate.

As described above, the conductor 12 according to the present embodiment includes the electroless plating layer 21 on the insulating layer 11 side, and the insulating layer 11 is in contact with the electroless plating layer 121 . Therefore, this embodiment can provide the board|substrate for mounting electronic components with strong peeling strength.

In addition, although the present embodiment has been described as an application example applied to the first embodiment, the present embodiment can also be applied to the second embodiment. In this case, unevenness may be formed on the front surface in contact with conductor 12, or unevenness may be formed on the front surface of the adhesive layer in contact with insulating layer 11 or the front surface 11U of insulating layer 11 in contact with the adhesive layer.

(fourth embodiment)

Next, a fourth embodiment will be described. In this embodiment, the side surface of the conductor 12 has a conductor recess (recess) 200 .

The conductor recess 200 can be formed by using a resist containing the particulate matter 250 . Specific examples will be described below.

First, a resist layer 290 is formed using a resist containing particulate matter 250 (see FIG. 23( a )).

Thereafter, the portion on the resist layer 290 where the conductor 12 is provided is removed by etching or the like (see FIG. 23( b )). At this time, the etchant should be selected so as not to remove the particulate matter 250 at the same time. The particulate matter 250 contained in the resist layer 29 will be removed together with the resist layer 290 .

Then, electroless plating or electrolytic plating is performed with the particulate matter 250 exposed from the side of the opening 295 provided in the resist layer 290 , whereby the conductor 12 is formed. In this way, the conductor 12 having the conductor recess 200 can be formed (see FIG. 23(c)).

Then, the resist layer 290 and the particulate matter 250 are removed by etching. At this time, the particulate matter 250 contained in the resist layer 290 is removed along with the resist layer 290 (see FIG. 23( d )).

Next, after pressing the conductor 12 having the conductor recess 200 into the semi-hardened insulating layer 11 (see FIG. 23( e )), the insulating layer 11 is cured.

By implementing the above steps, a part of the insulating layer 11 can be located in the conductor recess 200 of the conductor 12 , thereby improving the adhesion between the conductor 12 and the insulating layer 11 .

(fifth embodiment)

Next, a fifth embodiment will be described. In this embodiment, the side surface of the conductor 12 has a conductor protrusion (protrusion) 210 . In addition, the side surface of the conductor 12 may also be provided with the conductor protrusion 210 and the conductor recess 200 at the same time.

The conductor protrusion 210 can be formed by using a resist containing the particulate matter 250 . Specific examples will be described below.

First, a resist layer 290 is formed using a resist containing particulate matter 250 (see FIG. 24( a )).

Thereafter, the portion where the conductor 12 is provided on the resist layer 290 is removed by etching or the like (see FIG. 24( b )). At this time, the etchant should be selected so as not to remove the particulate matter 250 at the same time. The particulate matter 250 contained in the resist layer 29 will be removed together with the resist layer 290 .

Then, electroless plating or electrolytic plating is performed to form conductor 12 (see FIG. 24( c )). In this way, the conductor 12 having the conductor protrusion 210 can be formed.

Then, the resist layer 290 and the particulate matter 250 are removed by etching (see FIG. 24( d )). At this time, the particulate matter 250 contained in the resist layer 290 will be removed together with the resist layer 290 .

Next, after pressing the conductor 12 having the conductor protrusion 210 into the insulating layer 11 in a semi-cured state (see FIG. 24( e )), the insulating layer 11 is cured.

By implementing the above steps, the conductor protrusion 210 can be located in the insulating layer 11 , thereby improving the adhesion between the conductor 12 and the insulating layer 11 .

(sixth embodiment)

In this embodiment, the application example of the board|substrate for mounting electronic components which concerns on this invention is demonstrated. The electronic component according to the present embodiment includes the electronic component mounting substrate according to the present invention, and a predetermined process is performed using the electronic component mounting substrate according to the present invention. Processing is any processing performed using electronic components.

In the electronic component according to the present embodiment, the electronic component according to the present description is used for at least one of the mounted electronic components. In the mounting device according to this embodiment, the electronic component or the electronic module according to the present invention is used for at least one of the mounted electronic component and electronic module.

The present invention can be applied to any device including a substrate for mounting electronic components. If an example of a device to which this description is applicable is given, for example, automobiles, home appliances, communication equipment, control equipment, sensors, robots, unmanned aerial vehicles, airplanes, spaceships, ships, production equipment, construction equipment, and test equipment can be exemplified. , measuring instruments, computer-related products, digital equipment, game equipment, and clocks.

Any function corresponding to the device is mounted on the device. The substrate for mounting electronic components according to the present description is used in an electronic component such as an electronic chip used to implement this function. Since the electronic component mounting substrate according to the present invention can improve the peel strength, the reliability of electronic components, electronic modules, and devices can be improved.

【Industrial Utilization Possibility】

The electronic component mounting substrate and its manufacturing method of the present invention can be mounted in various electronic devices, or can be applied to the manufacture of electronic devices.

Symbol Description

11 insulation layer

12 conductors

121 metal foil

122 metal plating

13 Pattern Resist

14 insulation layer

15 VIA

11U Front

111-1～111-9 concave part

112-1, 112-6, 112-9 convex part

113 channels

21 Electroless plating layer

22 electrolytic plating layer

Claims (10)

1. A substrate, comprising:

an insulating layer free of particulate matter; and

a conductor disposed on the insulating layer,

wherein at least a part of the bottom surface and the side surface of the conductor is closer to the back surface side of the insulating layer than to the front surface side of the insulating layer,

the side surface of the conductor has a plurality of concave portions, at least a part of the plurality of concave portions being formed in a shape expanding toward the inside of the conductor, or the side surface of the conductor has a plurality of convex portions, at least a part of the plurality of convex portions being formed in a shape expanding toward the outside,

the top surface of the conductor does not have a concave portion having a shape expanding toward the inside of the conductor and does not have a convex portion having a shape expanding toward the outside.

2. The substrate of claim 1, wherein:

wherein the entire side surface of the conductor is closer to the back surface side of the insulating layer than the front surface side of the insulating layer.

3. The substrate according to claim 1 or 2, wherein:

wherein the top surface of the conductor and the front surface of the insulating layer are at the same height in the thickness direction.

4. The substrate according to claim 1 or 2, wherein:

wherein the top surface of the conductor is closer to the back surface side of the insulating layer than the front surface side of the insulating layer.

5. The substrate according to claim 1 or 2, wherein:

wherein the insulating layer has a plurality of laminated insulating layers after being laminated,

the conductor is disposed on one or more of the laminated insulating layers,

the top surface of the conductor and the front surface of the laminated insulating layer are at the same height in the thickness direction.

6. The substrate according to claim 1 or 2, wherein:

wherein the insulating layer has a plurality of laminated insulating layers which are laminated,

the conductor is disposed on one or more of the laminated insulating layers,

the top surface of the conductor is closer to the back surface side of the laminated insulating layer than to the front surface side of the laminated insulating layer.

7. The substrate according to claim 1 or 2, wherein:

the conductor provided on one of the laminated insulating layers and the conductor provided on the other laminated insulating layer laminated on the one of the laminated insulating layers are connected to each other through a conductor portion.

8. The substrate according to claim 1 or 2, wherein:

wherein the insulating layer has an adhesion layer,

the adhesion layer is provided with the conductor.

9. An electronic device, comprising:

the substrate of claim 1 or 2; and

an electronic component disposed on the substrate,

wherein the electronic component is disposed on the conductor.

10. A mounting device, comprising:

the electronic device of claim 9.

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