KR100910687B1 - 스마트 컷 분리 후 열처리 - Google Patents
스마트 컷 분리 후 열처리 Download PDFInfo
- Publication number
- KR100910687B1 KR100910687B1 KR1020067020808A KR20067020808A KR100910687B1 KR 100910687 B1 KR100910687 B1 KR 100910687B1 KR 1020067020808 A KR1020067020808 A KR 1020067020808A KR 20067020808 A KR20067020808 A KR 20067020808A KR 100910687 B1 KR100910687 B1 KR 100910687B1
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- donor wafer
- separation layer
- separation
- recovery operation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000926 separation method Methods 0.000 title claims abstract description 111
- 238000010438 heat treatment Methods 0.000 title claims abstract description 29
- 238000002347 injection Methods 0.000 claims abstract description 61
- 239000007924 injection Substances 0.000 claims abstract description 61
- 238000011084 recovery Methods 0.000 claims abstract description 54
- 238000000034 method Methods 0.000 claims abstract description 47
- 239000004065 semiconductor Substances 0.000 claims abstract description 19
- 239000000463 material Substances 0.000 claims abstract description 13
- 229910052734 helium Inorganic materials 0.000 claims description 46
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 46
- 239000001307 helium Substances 0.000 claims description 45
- 229910052739 hydrogen Inorganic materials 0.000 claims description 40
- 239000001257 hydrogen Substances 0.000 claims description 39
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 26
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 25
- 238000002513 implantation Methods 0.000 claims description 18
- 238000005530 etching Methods 0.000 claims description 13
- 150000002431 hydrogen Chemical class 0.000 claims description 13
- 238000009792 diffusion process Methods 0.000 claims description 12
- 230000003647 oxidation Effects 0.000 claims description 11
- 238000007254 oxidation reaction Methods 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 6
- 230000008569 process Effects 0.000 claims description 6
- 239000012298 atmosphere Substances 0.000 claims description 5
- 238000003486 chemical etching Methods 0.000 claims description 5
- 230000001590 oxidative effect Effects 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 2
- 230000004888 barrier function Effects 0.000 claims description 2
- 239000012777 electrically insulating material Substances 0.000 claims description 2
- 239000012299 nitrogen atmosphere Substances 0.000 claims 1
- 230000003313 weakening effect Effects 0.000 claims 1
- 230000007547 defect Effects 0.000 abstract description 53
- 239000012212 insulator Substances 0.000 abstract description 8
- 235000012431 wafers Nutrition 0.000 description 64
- 239000013078 crystal Substances 0.000 description 15
- 230000015572 biosynthetic process Effects 0.000 description 7
- 238000005498 polishing Methods 0.000 description 7
- 230000003746 surface roughness Effects 0.000 description 7
- 239000000243 solution Substances 0.000 description 6
- 238000005259 measurement Methods 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 239000007943 implant Substances 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 238000004439 roughness measurement Methods 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 229910052732 germanium Inorganic materials 0.000 description 3
- 239000007787 solid Substances 0.000 description 3
- 230000007704 transition Effects 0.000 description 3
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 238000003776 cleavage reaction Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 2
- 238000001802 infusion Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 230000007017 scission Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- BSFODEXXVBBYOC-UHFFFAOYSA-N 8-[4-(dimethylamino)butan-2-ylamino]quinolin-6-ol Chemical compound C1=CN=C2C(NC(CCN(C)C)C)=CC(O)=CC2=C1 BSFODEXXVBBYOC-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 230000002378 acidificating effect Effects 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000005054 agglomeration Methods 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 230000010070 molecular adhesion Effects 0.000 description 1
- 125000000896 monocarboxylic acid group Chemical group 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000009304 pastoral farming Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000001314 profilometry Methods 0.000 description 1
- 238000011002 quantification Methods 0.000 description 1
- 230000000284 resting effect Effects 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
Claims (25)
- 도우너 웨이퍼로부터 반도체 재료 중에서 선택된 분리층을 포함하는 구조를 형성하는 방법으로서,(a) 도우너 웨이퍼 내에 분리층의 두께에 인접한 깊이에 취약 영역을 형성하기 위해 원자 종을 주입하는 단계;(b) 호스트 웨이퍼에 상기 도우너 웨이퍼를 본딩하는 단계;(c) 취약 영역에서 상기 도우너 웨이퍼로부터 상기 분리층을 분리하기 위해 에너지를 공급하는 단계; 및(d) 상기 분리층을 처리하는 단계를 연속으로 포함하되,상기 단계(d)는, 상기 분리층이 상기 도우너 웨이퍼의 남겨진 부분과 여전히 접촉하고 있는 동안에 사용되는 상기 분리층의 회복 동작을 포함하고, 상기 회복동작은 상기 도우너 웨이퍼의 상기 남겨진 부분과 상기 분리층의 재접착(re-adhesion) 온도보다 더 낮은 온도에서의 열처리에 의해 수행되는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 재접착 온도는 800℃인, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1 또는 2에 있어서, 상기 단계(c)는 300℃와 550℃사이를 포함하는 온도에서 수행되는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 회복 동작의 열처리에서의 회복 온도는 350℃와 800℃ 사이인, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 회복 동작의 열처리에서의 회복 온도는 550℃와 800℃ 사이인, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 회복 동작이 Ar 또는 N2 분위기를 포함하는 불활성 분위기 내에서 수행되는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 회복 동작이 산화성 분위기 내에서 수행되는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 단계(d)의 상기 회복 동작은 같은 퍼니스(furnace) 내에서 단계(c)로부터 연속적으로 수행되는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 8에 있어서, 상기 회복 동작 전에, 상기 단계(c)의 분리 온도로부터 상기 회복 동작의 열처리 온도까지의 온도 상승을 포함하는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 9에 있어서, 상기 단계(c)가 500℃에서 30분에서 2시간까지 지속되는 지속 기간 동안 수행되는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 단계(a)는 수소 또는 헬륨의 단순 주입을 포함하는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 단계(a)는 수소 및 헬륨의 공동 주입을 포함하는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 단계(d)의 상기 회복 동작은 575℃와 625℃ 사이에 포함되는 온도에서의 열처리에 의해 수행되는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 12에 있어서, 상기 도우너 웨이퍼는 SiGe 층을 포함하고, 상기 단계(a)는 상기 SiGe 층내 취약 영역(embrittlement zone)을 형성하고, 헬륨 농도 극대치가 도우너 웨이퍼 두께에서 수소 확산 영역보다 더 깊고 상기 취약 영역보다 더 깊게 위치하도록 설정된, 주입 파라미터에 따라 수행되는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 회복 동작에서의 열처리는 30분과 4시간 사이 범위의 일(one) 시간의 길이 동안 실행되는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 도우너 웨이퍼의 남겨진 부분(10')으로부터 분리층(1)의 접촉을 떼어버리게 하는 것을 가능하게 하는 단계가 상기 단계(d)의 상기 회복동작 이후 수행되는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 16에 있어서, 상기 도우너 웨이퍼의 남겨진 부분(10')으로부터 상기 분리층(1)의 접촉을 떼어버리게 한 후, 상기 단계(d)가 CMP, 화학적 에칭, 희생적 산화, 열적 어닐링(anealing) 중 적어도 하나를 더 포함하게 하는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 분리층(1)은 Si1-xGex(0<x≤1)인, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 분리층(1)은 스트레인드 Si 및 Si1-xGex(0<x≤1)인, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 19에 있어서, 상기 단계(d) 이후 상기 Si1-xGex층은 스트레인드 Si층에 대해 선택적으로 에칭되는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 분리층(1)은 Si1-xGex(0<x≤1) 및 선택적 에칭에 대한 장벽층(barrier layer)을 포함하며, 상기 단계(d)는 상기 회복 동작에 이어서, 그리고 도우너 웨이퍼의 남겨진 부분(10')으로부터 상기 분리층 (1)의 접촉을 떼어낸 이후에 수행되는 선택적인 에칭을 포함하는, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 상기 도우너 웨이퍼(10)는 벌크 Si 지지 기판, SiGe 완충 구조체 및 Si1-xGex(0<x≤1)로 이루어진 상부 층을 포함하고, 상기 호스트 웨이퍼(20)가 벌크 Si인, 분리층을 포함하는 구조를 형성하는 방법.
- 청구항 1에 있어서, 단계(b) 전에, 상기 도우너 웨이퍼(10) 상에, 또는 상기 호스트 웨이퍼(20) 상에, 또는 상기 도우너 웨이퍼(10) 및 상기 호스트 웨이퍼(20) 상에 본딩 층을 형성하는 단계를 더 포함하며, 상기 본딩층은 SiO2, Si3N4 또는 SixOyNz (0<x,y,z≤1)를 포함하는 전기적 절연 재료로 만들어지는, 분리층을 포함하는 구조를 형성하는 방법.
- 삭제
- 삭제
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0402340A FR2867307B1 (fr) | 2004-03-05 | 2004-03-05 | Traitement thermique apres detachement smart-cut |
FR0402340 | 2004-03-05 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20070088279A KR20070088279A (ko) | 2007-08-29 |
KR100910687B1 true KR100910687B1 (ko) | 2009-08-04 |
Family
ID=34855097
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020067020808A Expired - Lifetime KR100910687B1 (ko) | 2004-03-05 | 2005-03-07 | 스마트 컷 분리 후 열처리 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7285495B2 (ko) |
EP (1) | EP1726039A1 (ko) |
JP (1) | JP4876068B2 (ko) |
KR (1) | KR100910687B1 (ko) |
CN (3) | CN1930674A (ko) |
FR (1) | FR2867307B1 (ko) |
WO (1) | WO2005086228A1 (ko) |
Families Citing this family (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6717213B2 (en) * | 2001-06-29 | 2004-04-06 | Intel Corporation | Creation of high mobility channels in thin-body SOI devices |
FR2858462B1 (fr) * | 2003-07-29 | 2005-12-09 | Soitec Silicon On Insulator | Procede d'obtention d'une couche mince de qualite accrue par co-implantation et recuit thermique |
JP2007500435A (ja) * | 2003-07-29 | 2007-01-11 | エス.オー.アイ.テック、シリコン、オン、インシュレター、テクノロジーズ | 共注入と熱アニールによって特性の改善された薄層を得るための方法 |
JP4701085B2 (ja) * | 2003-12-16 | 2011-06-15 | インターナショナル・ビジネス・マシーンズ・コーポレーション | シリコン・オン・インシュレータ・ウェハを製造するための方法 |
FR2898431B1 (fr) * | 2006-03-13 | 2008-07-25 | Soitec Silicon On Insulator | Procede de fabrication de film mince |
US20070281440A1 (en) * | 2006-05-31 | 2007-12-06 | Jeffrey Scott Cites | Producing SOI structure using ion shower |
FR2914495B1 (fr) | 2007-03-29 | 2009-10-02 | Soitec Silicon On Insulator | Amelioration de la qualite d'une couche mince par recuit thermique haute temperature. |
FR2923079B1 (fr) * | 2007-10-26 | 2017-10-27 | S O I Tec Silicon On Insulator Tech | Substrats soi avec couche fine isolante enterree |
WO2009084311A1 (ja) * | 2007-12-27 | 2009-07-09 | Sharp Kabushiki Kaisha | 半導体装置、単結晶半導体薄膜付き基板及びそれらの製造方法 |
JP5303957B2 (ja) * | 2008-02-20 | 2013-10-02 | 株式会社デンソー | グラフェン基板及びその製造方法 |
US8133800B2 (en) * | 2008-08-29 | 2012-03-13 | Silicon Genesis Corporation | Free-standing thickness of single crystal material and method having carrier lifetimes |
JP5493343B2 (ja) * | 2008-12-04 | 2014-05-14 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
US20110207306A1 (en) * | 2010-02-22 | 2011-08-25 | Sarko Cherekdjian | Semiconductor structure made using improved ion implantation process |
US8558195B2 (en) | 2010-11-19 | 2013-10-15 | Corning Incorporated | Semiconductor structure made using improved pseudo-simultaneous multiple ion implantation process |
US8008175B1 (en) | 2010-11-19 | 2011-08-30 | Coring Incorporated | Semiconductor structure made using improved simultaneous multiple ion implantation process |
US8196546B1 (en) | 2010-11-19 | 2012-06-12 | Corning Incorporated | Semiconductor structure made using improved multiple ion implantation process |
CN102184882A (zh) * | 2011-04-07 | 2011-09-14 | 中国科学院微电子研究所 | 一种形成复合功能材料结构的方法 |
FR2978604B1 (fr) | 2011-07-28 | 2018-09-14 | Soitec | Procede de guerison de defauts dans une couche semi-conductrice |
FR2980916B1 (fr) * | 2011-10-03 | 2014-03-28 | Soitec Silicon On Insulator | Procede de fabrication d'une structure de type silicium sur isolant |
FR2982071B1 (fr) | 2011-10-27 | 2014-05-16 | Commissariat Energie Atomique | Procede de lissage d'une surface par traitement thermique |
CN103165512A (zh) * | 2011-12-14 | 2013-06-19 | 中国科学院上海微系统与信息技术研究所 | 一种超薄绝缘体上半导体材料及其制备方法 |
CN103165511B (zh) * | 2011-12-14 | 2015-07-22 | 中国科学院上海微系统与信息技术研究所 | 一种制备goi的方法 |
CN105140171B (zh) * | 2015-08-26 | 2018-06-29 | 中国科学院上海微系统与信息技术研究所 | 一种绝缘体上材料的制备方法 |
CN105957831A (zh) * | 2016-07-06 | 2016-09-21 | 中国科学院上海微系统与信息技术研究所 | 一种用于制造支撑衬底上的单晶材料薄层结构的方法 |
CN107195534B (zh) * | 2017-05-24 | 2021-04-13 | 中国科学院上海微系统与信息技术研究所 | Ge复合衬底、衬底外延结构及其制备方法 |
CN109427538B (zh) * | 2017-08-24 | 2021-04-02 | 中国科学院上海微系统与信息技术研究所 | 一种异质结构的制备方法 |
CN118676194A (zh) * | 2018-12-28 | 2024-09-20 | 富士电机株式会社 | 半导体装置 |
CN111722321A (zh) * | 2020-01-19 | 2020-09-29 | 中国科学院上海微系统与信息技术研究所 | 一种光膜转换器及其制备方法 |
FR3108440B1 (fr) * | 2020-03-23 | 2025-01-17 | Soitec Silicon On Insulator | Procédé de préparation d’une couche mince |
CN111834520B (zh) * | 2020-06-29 | 2021-08-27 | 中国科学院上海微系统与信息技术研究所 | 一种表面均匀性优化的压电单晶薄膜制备方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0961312A2 (en) * | 1998-05-15 | 1999-12-01 | Canon Kabushiki Kaisha | SOI Substrate formed by bonding |
JP2003506883A (ja) * | 1999-08-10 | 2003-02-18 | シリコン ジェネシス コーポレイション | 低打ち込みドーズ量を用いて多層基板を製造するための劈開プロセス |
JP2015506883A (ja) * | 2011-12-07 | 2015-03-05 | コーニンクレッカ フィリップス エヌ ヴェ | エレベータ運動検出のための方法及び装置 |
Family Cites Families (40)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4462847A (en) | 1982-06-21 | 1984-07-31 | Texas Instruments Incorporated | Fabrication of dielectrically isolated microelectronic semiconductor circuits utilizing selective growth by low pressure vapor deposition |
US4604304A (en) | 1985-07-03 | 1986-08-05 | Rca Corporation | Process of producing thick layers of silicon dioxide |
US4722912A (en) | 1986-04-28 | 1988-02-02 | Rca Corporation | Method of forming a semiconductor structure |
FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
JPH06318588A (ja) | 1993-03-11 | 1994-11-15 | Nec Corp | 半導体装置の製造方法 |
US6162705A (en) | 1997-05-12 | 2000-12-19 | Silicon Genesis Corporation | Controlled cleavage process and resulting device using beta annealing |
US5882987A (en) * | 1997-08-26 | 1999-03-16 | International Business Machines Corporation | Smart-cut process for the production of thin semiconductor material films |
JP3412470B2 (ja) * | 1997-09-04 | 2003-06-03 | 三菱住友シリコン株式会社 | Soi基板の製造方法 |
FR2773261B1 (fr) * | 1997-12-30 | 2000-01-28 | Commissariat Energie Atomique | Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions |
JP3582566B2 (ja) * | 1997-12-22 | 2004-10-27 | 三菱住友シリコン株式会社 | Soi基板の製造方法 |
FR2774510B1 (fr) * | 1998-02-02 | 2001-10-26 | Soitec Silicon On Insulator | Procede de traitement de substrats, notamment semi-conducteurs |
CN1241803A (zh) * | 1998-05-15 | 2000-01-19 | 佳能株式会社 | 半导体衬底、半导体薄膜以及多层结构的制造工艺 |
JP3358550B2 (ja) | 1998-07-07 | 2002-12-24 | 信越半導体株式会社 | Soiウエーハの製造方法ならびにこの方法で製造されるsoiウエーハ |
JP4379943B2 (ja) * | 1999-04-07 | 2009-12-09 | 株式会社デンソー | 半導体基板の製造方法および半導体基板製造装置 |
US6352942B1 (en) | 1999-06-25 | 2002-03-05 | Massachusetts Institute Of Technology | Oxidation of silicon on germanium |
DE10031388A1 (de) | 2000-07-03 | 2002-01-17 | Bundesdruckerei Gmbh | Handsensor für die Echtheitserkennung von Signets auf Dokumenten |
WO2002015244A2 (en) | 2000-08-16 | 2002-02-21 | Massachusetts Institute Of Technology | Process for producing semiconductor article using graded expitaxial growth |
US6448152B1 (en) | 2001-02-20 | 2002-09-10 | Silicon Genesis Corporation | Method and system for generating a plurality of donor wafers and handle wafers prior to an order being placed by a customer |
US6603156B2 (en) | 2001-03-31 | 2003-08-05 | International Business Machines Corporation | Strained silicon on insulator structures |
US7238622B2 (en) | 2001-04-17 | 2007-07-03 | California Institute Of Technology | Wafer bonded virtual substrate and method for forming the same |
US6593625B2 (en) | 2001-06-12 | 2003-07-15 | International Business Machines Corporation | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
US6717213B2 (en) | 2001-06-29 | 2004-04-06 | Intel Corporation | Creation of high mobility channels in thin-body SOI devices |
US6649492B2 (en) | 2002-02-11 | 2003-11-18 | International Business Machines Corporation | Strained Si based layer made by UHV-CVD, and devices therein |
US6562703B1 (en) | 2002-03-13 | 2003-05-13 | Sharp Laboratories Of America, Inc. | Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content |
FR2839385B1 (fr) | 2002-05-02 | 2004-07-23 | Soitec Silicon On Insulator | Procede de decollement de couches de materiau |
US7335545B2 (en) | 2002-06-07 | 2008-02-26 | Amberwave Systems Corporation | Control of strain in device layers by prevention of relaxation |
US7307273B2 (en) | 2002-06-07 | 2007-12-11 | Amberwave Systems Corporation | Control of strain in device layers by selective relaxation |
US7074623B2 (en) | 2002-06-07 | 2006-07-11 | Amberwave Systems Corporation | Methods of forming strained-semiconductor-on-insulator finFET device structures |
US20030227057A1 (en) | 2002-06-07 | 2003-12-11 | Lochtefeld Anthony J. | Strained-semiconductor-on-insulator device structures |
US6995430B2 (en) | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
WO2003105189A2 (en) | 2002-06-07 | 2003-12-18 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
US7018910B2 (en) | 2002-07-09 | 2006-03-28 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Transfer of a thin layer from a wafer comprising a buffer layer |
US6953736B2 (en) | 2002-07-09 | 2005-10-11 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Process for transferring a layer of strained semiconductor material |
FR2842350B1 (fr) | 2002-07-09 | 2005-05-13 | Procede de transfert d'une couche de materiau semiconducteur contraint | |
FR2842349B1 (fr) | 2002-07-09 | 2005-02-18 | Transfert d'une couche mince a partir d'une plaquette comprenant une couche tampon | |
US7297641B2 (en) | 2002-07-19 | 2007-11-20 | Asm America, Inc. | Method to form ultra high quality silicon-containing compound layers |
AU2003270040A1 (en) * | 2002-08-29 | 2004-03-19 | Massachusetts Institute Of Technology | Fabrication method for a monocrystalline semiconductor layer on a substrate |
FR2844634B1 (fr) | 2002-09-18 | 2005-05-27 | Soitec Silicon On Insulator | Formation d'une couche utile relaxee a partir d'une plaquette sans couche tampon |
US6911379B2 (en) * | 2003-03-05 | 2005-06-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming strained silicon on insulator substrate |
US20060014363A1 (en) | 2004-03-05 | 2006-01-19 | Nicolas Daval | Thermal treatment of a semiconductor layer |
-
2004
- 2004-03-05 FR FR0402340A patent/FR2867307B1/fr not_active Expired - Lifetime
-
2005
- 2005-02-16 US US11/058,992 patent/US7285495B2/en active Active
- 2005-03-07 CN CNA2005800071260A patent/CN1930674A/zh active Pending
- 2005-03-07 JP JP2007501320A patent/JP4876068B2/ja not_active Expired - Lifetime
- 2005-03-07 KR KR1020067020808A patent/KR100910687B1/ko not_active Expired - Lifetime
- 2005-03-07 EP EP05737041A patent/EP1726039A1/fr not_active Withdrawn
- 2005-03-07 WO PCT/FR2005/000543 patent/WO2005086228A1/fr active Application Filing
- 2005-03-07 CN CN200580014164A patent/CN100592493C/zh not_active Expired - Lifetime
- 2005-03-07 CN CN2005800141634A patent/CN1950937B/zh not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0961312A2 (en) * | 1998-05-15 | 1999-12-01 | Canon Kabushiki Kaisha | SOI Substrate formed by bonding |
JP2000036583A (ja) * | 1998-05-15 | 2000-02-02 | Canon Inc | 半導体基板、半導体薄膜の作製方法および多層構造体 |
JP2003506883A (ja) * | 1999-08-10 | 2003-02-18 | シリコン ジェネシス コーポレイション | 低打ち込みドーズ量を用いて多層基板を製造するための劈開プロセス |
JP2015506883A (ja) * | 2011-12-07 | 2015-03-05 | コーニンクレッカ フィリップス エヌ ヴェ | エレベータ運動検出のための方法及び装置 |
Also Published As
Publication number | Publication date |
---|---|
CN100592493C (zh) | 2010-02-24 |
FR2867307A1 (fr) | 2005-09-09 |
JP4876068B2 (ja) | 2012-02-15 |
CN1930674A (zh) | 2007-03-14 |
FR2867307B1 (fr) | 2006-05-26 |
US7285495B2 (en) | 2007-10-23 |
CN1950937A (zh) | 2007-04-18 |
CN1950938A (zh) | 2007-04-18 |
KR20070088279A (ko) | 2007-08-29 |
US20050196936A1 (en) | 2005-09-08 |
CN1950937B (zh) | 2010-06-16 |
JP2007526646A (ja) | 2007-09-13 |
EP1726039A1 (fr) | 2006-11-29 |
WO2005086228A1 (fr) | 2005-09-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100910687B1 (ko) | 스마트 컷 분리 후 열처리 | |
US7449394B2 (en) | Atomic implantation and thermal treatment of a semiconductor layer | |
US7736993B2 (en) | Composite substrate and method of fabricating the same | |
JP3324469B2 (ja) | Soiウエーハの製造方法ならびにこの方法で製造されるsoiウエーハ | |
US7282449B2 (en) | Thermal treatment of a semiconductor layer | |
US7972939B2 (en) | Transfer method with a treatment of a surface to be bonded | |
US20060014363A1 (en) | Thermal treatment of a semiconductor layer | |
US20070212852A1 (en) | Method of fabricating a thin film | |
US20050218111A1 (en) | Methods for preparing a bonding surface of a semiconductor wafer | |
WO2004006311A2 (en) | Transfer of a thin layer from a wafer comprising a buffer layer | |
US7563697B2 (en) | Method for producing SOI wafer | |
JP2010538459A (ja) | 熱処理を用いる剥離プロセスにおける半導体ウエハの再使用 | |
KR20120117843A (ko) | 다층 결정질 구조물의 제조 방법 | |
KR20250078636A (ko) | 얇은 실리콘 층의 전사 방법 | |
KR20240140161A (ko) | 이중 반도체-온-절연체 구조물을 제조하기 위한 공정 | |
US6982210B2 (en) | Method for manufacturing a multilayer semiconductor structure that includes an irregular layer | |
JP7275438B2 (ja) | 剥離可能な構造及び前記構造を使用する剥離プロセス | |
KR100842848B1 (ko) | 반도체 층의 열처리 방법 | |
KR20070083581A (ko) | 접합될 표면의 처리를 수반한 전달 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
PA0105 | International application |
Patent event date: 20061004 Patent event code: PA01051R01D Comment text: International Patent Application |
|
PA0201 | Request for examination | ||
AMND | Amendment | ||
PG1501 | Laying open of application | ||
E902 | Notification of reason for refusal | ||
PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20070928 Patent event code: PE09021S01D |
|
AMND | Amendment | ||
E902 | Notification of reason for refusal | ||
PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20080411 Patent event code: PE09021S01D |
|
AMND | Amendment | ||
E601 | Decision to refuse application | ||
PE0601 | Decision on rejection of patent |
Patent event date: 20081008 Comment text: Decision to Refuse Application Patent event code: PE06012S01D Patent event date: 20080411 Comment text: Notification of reason for refusal Patent event code: PE06011S01I Patent event date: 20070928 Comment text: Notification of reason for refusal Patent event code: PE06011S01I |
|
AMND | Amendment | ||
J201 | Request for trial against refusal decision | ||
PJ0201 | Trial against decision of rejection |
Patent event date: 20081106 Comment text: Request for Trial against Decision on Refusal Patent event code: PJ02012R01D Patent event date: 20081008 Comment text: Decision to Refuse Application Patent event code: PJ02011S01I Appeal kind category: Appeal against decision to decline refusal Decision date: 20090528 Appeal identifier: 2008101011719 Request date: 20081106 |
|
PB0901 | Examination by re-examination before a trial |
Comment text: Amendment to Specification, etc. Patent event date: 20081106 Patent event code: PB09011R02I Comment text: Request for Trial against Decision on Refusal Patent event date: 20081106 Patent event code: PB09011R01I Comment text: Amendment to Specification, etc. Patent event date: 20080611 Patent event code: PB09011R02I Comment text: Amendment to Specification, etc. Patent event date: 20071224 Patent event code: PB09011R02I Comment text: Amendment to Specification, etc. Patent event date: 20061010 Patent event code: PB09011R02I |
|
E902 | Notification of reason for refusal | ||
PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20081226 Patent event code: PE09021S01D |
|
B701 | Decision to grant | ||
PB0701 | Decision of registration after re-examination before a trial |
Patent event date: 20090528 Comment text: Decision to Grant Registration Patent event code: PB07012S01D Patent event date: 20081209 Comment text: Transfer of Trial File for Re-examination before a Trial Patent event code: PB07011S01I |
|
GRNT | Written decision to grant | ||
PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 20090728 Patent event code: PR07011E01D |
|
PR1002 | Payment of registration fee |
Payment date: 20090728 End annual number: 3 Start annual number: 1 |
|
PG1601 | Publication of registration | ||
PR1001 | Payment of annual fee |
Payment date: 20120716 Start annual number: 4 End annual number: 4 |
|
FPAY | Annual fee payment |
Payment date: 20130701 Year of fee payment: 5 |
|
PR1001 | Payment of annual fee |
Payment date: 20130701 Start annual number: 5 End annual number: 5 |
|
FPAY | Annual fee payment |
Payment date: 20140701 Year of fee payment: 6 |
|
PR1001 | Payment of annual fee |
Payment date: 20140701 Start annual number: 6 End annual number: 6 |
|
PR1001 | Payment of annual fee |
Payment date: 20150701 Start annual number: 7 End annual number: 7 |
|
FPAY | Annual fee payment |
Payment date: 20160630 Year of fee payment: 8 |
|
PR1001 | Payment of annual fee |
Payment date: 20160630 Start annual number: 8 End annual number: 8 |
|
FPAY | Annual fee payment |
Payment date: 20170710 Year of fee payment: 9 |
|
PR1001 | Payment of annual fee |
Payment date: 20170710 Start annual number: 9 End annual number: 9 |
|
PR1001 | Payment of annual fee |
Payment date: 20200701 Start annual number: 12 End annual number: 12 |
|
PR1001 | Payment of annual fee |
Payment date: 20210623 Start annual number: 13 End annual number: 13 |
|
PR1001 | Payment of annual fee |
Payment date: 20240625 Start annual number: 16 End annual number: 16 |