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JPS6249268U - - Google Patents

Info

Publication number
JPS6249268U
JPS6249268U JP14014585U JP14014585U JPS6249268U JP S6249268 U JPS6249268 U JP S6249268U JP 14014585 U JP14014585 U JP 14014585U JP 14014585 U JP14014585 U JP 14014585U JP S6249268 U JPS6249268 U JP S6249268U
Authority
JP
Japan
Prior art keywords
wiring
semiconductor pellet
integrated circuit
hybrid integrated
insulating plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14014585U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14014585U priority Critical patent/JPS6249268U/ja
Publication of JPS6249268U publication Critical patent/JPS6249268U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案による混成集積回路の絶縁板の
張り付け後の印刷配線基板の平面図、第2図は本
考案の混成集積回路の印刷配線基板の平面図、第
3図は本考案の実施に使用する絶縁板の斜視図、
第4図は従来の混成集積回路基板の絶縁成形後の
平面図である。 1……混成集積回路の印刷配線基板、2……絶
縁層、3……半導体ペレツトとクロス部分の配線
、4……絶縁板、5……半導体ペレツト。
Fig. 1 is a plan view of a printed wiring board of a hybrid integrated circuit according to the present invention after pasting an insulating plate, Fig. 2 is a plan view of a printed wiring board of a hybrid integrated circuit of the present invention, and Fig. 3 is a plan view of the printed wiring board of a hybrid integrated circuit according to the present invention. A perspective view of an insulating board used for
FIG. 4 is a plan view of a conventional hybrid integrated circuit board after insulation molding. DESCRIPTION OF SYMBOLS 1...Printed wiring board of hybrid integrated circuit, 2...Insulating layer, 3...Wiring at cross section with semiconductor pellet, 4...Insulating plate, 5...Semiconductor pellet.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 印刷配線基板の配線と、半導体ペレツトの搭載
部が交又する混成集積回路において、前記交又部
における配線と半導体ペレツト間に絶縁板を前記
配線上に張り付けたことを特徴とする混成集積回
路。
1. A hybrid integrated circuit in which wiring of a printed wiring board intersects with a mounting part of a semiconductor pellet, characterized in that an insulating plate is pasted on the wiring between the wiring and the semiconductor pellet at the crossing part.
JP14014585U 1985-09-12 1985-09-12 Pending JPS6249268U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14014585U JPS6249268U (en) 1985-09-12 1985-09-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14014585U JPS6249268U (en) 1985-09-12 1985-09-12

Publications (1)

Publication Number Publication Date
JPS6249268U true JPS6249268U (en) 1987-03-26

Family

ID=31046717

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14014585U Pending JPS6249268U (en) 1985-09-12 1985-09-12

Country Status (1)

Country Link
JP (1) JPS6249268U (en)

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