JPS6211227A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To lower the resistance of a contact hole and bury it by activating a substrate on the bottom of the contact hole through plasma etching and conducting CVD treatment by using a reaction gas mainly comprising a conductive-layer forming metal. CONSTITUTION:A thick SiO2 insulating layer 7 is formed onto a substrate 1 with a semiconductor region 2, and a contact hole 4 reacting the region 2 is shaped to the insulating layer 7. When the surface of the substrate 1 is brought into contact with air, a passive-state film consisting of SiO2 is formed. The substrate 1 is plasma-etched. The passive-state film on the bottom of the hole 4 is removed through the plasma etching, and an active surface 11 in the region 2 appears. Al{CH2CH(CH3)2}3 is used as a reaction gas, and the substrate 1 is heated, thus decomposing the reaction gas, then generating a CVD reaction on the substrate 1. Accordingly, CVD growth is performed preferentially from the active surface 11, the hole 4 is buried, and Al is grown on the layer 7.

Description

[Detailed Description of the Invention] [Summary] As a method for filling contact holes formed in an insulating layer on a semiconductor substrate with good contact with the substrate, the substrate is activated by plasma etching, and then selective chemical vapor deposition is performed. How to fill in the blanks.

[Industrial application field]

The present invention relates to a method for manufacturing a semiconductor device in which contact holes are filled with good adhesion to a substrate.

For semiconductor devices such as LSI and VLSI, after forming an insulating layer on a semiconductor substrate, windows are formed in the insulating layer at necessary positions using photolithography (photolithography or electron beam lithography). A semiconductor region is formed by thermally diffusing impurities, or by implanting impurity ions through the window opening by an ion implantation method, or by directly implanting ions.

Next, after insulating the window opening, open the window at the required position to make a contact hole, fill this contact hole with a metal material, and form an electrode pattern or wiring pattern on the insulating layer. A semiconductor device is formed.

Semiconductor devices are becoming highly integrated in order to process large amounts of information at high speed, and this is achieved by downsizing semiconductor regions and wiring patterns on substrates and making them three-dimensional.

For example, an insulating layer is created by insulating an electrode pattern formed on a substrate with an insulating material such as silicon dioxide (Si02) or silicon nitride (Si3N4), a wiring pattern is formed on this, and the wiring pattern is attached to the substrate. There is a case where wiring is connected to the formed semiconductor region.

In such cases, contact holes are created by selectively etching the insulating layer until it reaches the semiconductor region of the substrate, and the holes are filled with metal such as aluminum (AI). However, if the holes are deep, It is not easy to uniformly form a metal layer along the bottom surface of the substrate and maintain good contact with the semiconductor region.

[Conventional technology]

Chemical vapor deposition (C) is used to fill contact holes.
A chemical vapor deposition method (abbreviated as CVD method) is used.

Figure 3 shows that a contact hole 4 is created by selectively etching an insulating layer 3 in a semiconductor region 2 formed on a silicon (Si) semiconductor substrate (hereinafter referred to as the substrate), and then AI5 is deposited in the hole by the CVD method to fill the hole. This shows the state in which the following steps have been performed.

That is, when a method such as a vacuum evaporation method or a sputtering method is used to fill a contact hole 4 having a diameter of about 1 μm formed in an insulating layer 3, metal particles are scattered in a straight line from an evaporation source or a cathode target. Therefore, it is impossible to uniformly form a film inside the contact hole 4, and for this reason, a CVO method is used in which reactive gas is thermally decomposed on the substrate to deposit it.

However, there is no problem when the thickness of the insulating layer 3 is about 1 μm and the diameter of the contact hole 4 is 1 μm or more as in the conventional case, but when three-dimensional densification is performed as described above, The thickness of the insulating layer 3 is 2 to 3 μm, and the diameter of the contact hole 4 is narrow, about 1 μm, so CVD
Even if a method is used, it is difficult to make sufficient contact with the semiconductor region 2 at the bottom of the contact hole, and a gap 6 is created, making it difficult to obtain low-resistance conduction.

Therefore, it is necessary to establish a technique for filling such a fine contact hole with a high level difference.

[Problem that the invention seeks to solve]

As explained above, in three-dimensional devices, it is necessary to fill contact holes with high height differences and create a low-resistance conductive path with the semiconductor region of the substrate. The question is whether to form one.

[Means for solving problems]

The above problem can be solved by selectively growing aluminum into contact holes with high height differences formed in an insulating layer on a semiconductor region, and filling the hole with good adhesion to the semiconductor region. After etching to activate the semiconductor region at the bottom of the contact hole, chemical vapor deposition is performed using a reactive gas containing aluminum as a main component to selectively grow aluminum in the activated region at the bottom of the contact hole. This problem can be solved by a semiconductor device manufacturing method characterized in that the holes are filled by using the same method.

[Effect]

The present invention takes advantage of the fact that when a conductive layer of metal or the like is formed using the CVO method, precipitation occurs more easily on a Si substrate than on an insulating layer such as an oxide, and activates the substrate at the bottom of the contact hole by plasma etching. The CVD layer is grown selectively from the bottom of the contact hole.

If such pretreatment is performed and then CVD treatment is performed, it becomes possible to fill holes with good adhesion to the substrate.

[Example] Figure 2 is a sectional view of a plasma etching/CvD apparatus used to carry out the present invention, and Figures 1 (A) to (C)
FIG. 2 is a cross-sectional view illustrating the present invention in detail.

The present invention activates the substrate surface at the bottom of the contact hole by plasma etching and utilizes the property that CVD growth easily occurs on this active surface, so it is necessary to maintain the active state until CVD precipitation occurs. can be,
Therefore, we changed the same equipment to perform plasma etching and C.
It is necessary to continue with VD growth.

The present invention will be described below with reference to the case where Al is used as the conductor.

In FIG. 1(A), a thick SiO2 insulating layer 7 with a thickness of 4 to 5 μm is formed on a substrate 1 having a semiconductor region 2 by heat treatment or a combination of this and CVD, and this is then etched by reactive ion etching (reactive ion etching). -ionEtchi
ng is a cross-sectional view showing a state in which a contact hole 4 reaching a semiconductor region 2 has been formed by dry etching such as RIE, and a Si substrate is exposed at the bottom of the contact hole 4. When the surface comes into contact with air, it is easily oxidized by oxygen (02) in the air, and S
A passive film made of iO2 and having a thickness of several tens of layers is formed on the surface.

To carry out the present invention, the substrate 1 on which the contact hole 4 has been formed is subjected to plasma etching/CVD as shown in FIG.
After placing the device on the susceptor 8 and operating the exhaust system to exhaust the inside of the device, boron chloride (BCI 3
) Supply gas and reduce the pressure inside the device to 0.3 to 1.0 T.
Shower 9 from high frequency power supply 10 while held at orr.
A high frequency electric field is applied between the substrate 1 and the susceptor 8 to
Plasma etching is performed for 3 minutes at a time.

By this plasma etching, the passive film at the bottom of the contact hole 4 is removed, and the active surface 11 of the semiconductor region 2 is exposed, as shown in FIG. 1(B).

After the plasma etching is completed, the supply gas is switched in the apparatus shown in Fig. 2, and triisobutylaluminum (Al (CII2 CI(CH3) 2) 3 is used as the reaction gas.
], argon (Ar) is used as a carrier gas, and hydrogen (H2) is supplied as a decomposition accelerating gas from the shower 9, and the degree of vacuum in the apparatus is maintained at 0.3-1. Q
While maintaining the Torr, energize the heater 12 □,
By heating the substrate 1 to approximately 300°C (Al
(CH2CH(CH3) z ) 3 ) is decomposed and a CVD reaction is caused on the substrate 1.

Since the bottom of the contact hole 4 is activated as previously explained with reference to FIG. 1(B), the CVD growth preferentially grows from this active surface 11 as shown in FIG. 1(C). After filling the contact hole 4, AI will be grown on the Si02 insulating layer 7.

The following is the same as before, and A1 up to a film thickness of about 1 μm.
The layer 5 may be formed, and a fine pattern such as an electrode or a wiring pattern may be formed thereon by applying a photolithography technique.

By allowing the conductive layer to grow from the active surface 11 at the bottom of the contact hole 4 in this manner, the contact hole 4 can be ideally filled.

〔Effect of the invention〕

As explained above, by carrying out the present invention, there is no generation of gaps as in the conventional method, and contact holes can be filled with low resistance.

[Brief explanation of drawings]

FIGS. 1(A) to 1(C) are cross-sectional views explaining the present invention in detail, and FIG. 1(A) shows the state after forming the contact hole.
2 is a state diagram after plasma etching, FIG. 2C is a state diagram during selective growth, FIG. 2 is a cross-sectional view of the plasma etching/CVD apparatus, and FIG. 3 is a cross-sectional view after conventional CVD growth. In the figure, l is the substrate, 2 is the semiconductor region, 3 is the insulating layer, 4 is the contact hole, 5 is the first layer,
6 is a gap, 7 is a SiO2 insulating layer, 9
is the shower, 11 is the active surface,

Claims (1)

[Claims] As a method of selectively growing a conductive layer forming metal in a contact hole (4) with a high level difference formed in an insulating layer (7) on a semiconductor region (2), and filling the hole with good adhesion to the semiconductor region (2), After plasma etching the semiconductor substrate (1) to be processed in advance to activate the semiconductor region (2) at the bottom of the contact hole (4), chemical A method for manufacturing a semiconductor device, comprising the step of performing phase growth to selectively grow a conductive layer on an active region (2) at the bottom of a contact hole (4).