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JPS59198745A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS59198745A
JPS59198745A JP58074258A JP7425883A JPS59198745A JP S59198745 A JPS59198745 A JP S59198745A JP 58074258 A JP58074258 A JP 58074258A JP 7425883 A JP7425883 A JP 7425883A JP S59198745 A JPS59198745 A JP S59198745A
Authority
JP
Japan
Prior art keywords
substrate
integrated circuit
hybrid integrated
lead terminals
lead terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58074258A
Other languages
Japanese (ja)
Inventor
Masakazu Nakabayashi
正和 中林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP58074258A priority Critical patent/JPS59198745A/en
Publication of JPS59198745A publication Critical patent/JPS59198745A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
    • H05K3/308—Adaptations of leads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/368—Assembling printed circuits with other printed circuits parallel to each other

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To absorb the bending moment applied to lead terminals at the curved part so as not to give influence to the substrate of the titled circuit by a method wherein the curved parts are formed in the middle of a plurality of both side arms of lead terminals led out downward from the substrate of said circuit, respectively. CONSTITUTION:The curved parts 11a are provided in the middle of a plurality of both side arms of lead terminals 11 led out downward from both sides of the ceramic thick film substrate 1, thus being allowed to have mechanical buffer action. This titled device is mounted on a printed substrate 5 shown by a two- dot chain line. At the time of this mounting, each lead terminal 4 is passed through the through hole 6 of said substrate 5 and bonded by solder on the side of the back surface. Even when warp generates in said substrate 5 as shown by a one-dot line by the heat due to this soldering work, resulting in the application of bending moment to each lead terminal 4, said moment is absorbed by the bending at the curved part 11a. Accordingly, the stress applied to the substrate 1 positioned above becomes in small amount, and then break is prevented.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、混成集積回路の基板の両側から複数木兄の
リード端子が下方に引出され、これらのリード端子によ
り下方のプリント基板に接続されるととも妬支持される
ようＫした混成集積回路装置に関する。[Detailed Description of the Invention] [Technical Field of the Invention] This invention relates to a hybrid integrated circuit in which a plurality of lead terminals are drawn out downward from both sides of a board of a hybrid integrated circuit, and these lead terminals are connected to a printed circuit board below. The present invention relates to a hybrid integrated circuit device designed to be widely supported.

〔従来技術〕[Prior art]

従来のこの種の混成集積回路装置は、第１図に正面図で
示すようになっていた。（１）はセラミック厚膜基板、
（２）　、　（３）はこのセラミック厚膜基板上に配置
され、この基板に形成されである配線導体（図示は略す
）にワイヤポンディングやはんだ接合などで接続された
各種の電子部品、（４）は基板（１）の配線導体にはん
だ接合などで接続され、基板の両側から下方に引出され
た複数木兄のリード端子である。A conventional hybrid integrated circuit device of this type is shown in a front view in FIG. (1) is a ceramic thick film substrate;
(2) and (3) are various electronic components arranged on this ceramic thick film substrate and connected to wiring conductors (not shown) formed on this substrate by wire bonding, soldering, etc. 4) is a multi-wire lead terminal connected to the wiring conductor of the board (1) by soldering or the like, and drawn out downward from both sides of the board.

このように構成された混成集積回路装置は、二点鎖線で
示すプリント基板（５）に実装する。この実装には、各
リード端子（４）をプリント基板（５）のスルーホール
（６）に通し、下面ではんだ結合する。こうして、各リ
ード端子（４）によシミ気接続するとともに、基板（１
）部を支持する。The hybrid integrated circuit device configured in this manner is mounted on a printed circuit board (5) indicated by a two-dot chain line. For this mounting, each lead terminal (4) is passed through a through hole (6) of a printed circuit board (5) and soldered to the bottom surface. In this way, each lead terminal (4) is connected without staining, and the board (1
).

ところが、各リード端子（４〕をプリント基板（５）の
下面ではんだ付けすると、このはんだ付は作業による熱
でプリント基板（５）がひずみを生じ、一点鎖線で示す
ように反ることがある。従来の装置では各リード端子（
４〕は直線で引出されておシ剛性が比較的大きく、プリ
ント基板（５）の反シにより、各リード端子（４）に加
わる曲げモーメントが直接セラミック厚膜基板（１）に
伝わシ、基板が破損することがあった。However, when each lead terminal (4) is soldered on the bottom surface of the printed circuit board (5), the printed circuit board (5) may become distorted due to the heat generated by the soldering process, causing it to warp as shown by the dashed line. .In conventional equipment, each lead terminal (
4] are drawn out in a straight line and have relatively high rigidity, and due to the bending of the printed circuit board (5), the bending moment applied to each lead terminal (4) is directly transmitted to the ceramic thick film substrate (1), and the board was sometimes damaged.

〔発明の概要〕[Summary of the invention]

この発明は、混成集積回路の基板の両側から下方に引出
された複数木兄のリード端子の中間にそれぞれ湾曲部を
設け、リード端子のプリント基板の下面へのはんだ付け
によるプリント基板の反りで、リード端子に及ぼす曲げ
モーメントを湾曲部で吸収し、混成集積回路の基板に影
響が及ばないようにした、混成集積回路装置を提供する
こと、を目的としている。This invention provides curved portions in the middle of multiple lead terminals pulled out downward from both sides of the board of a hybrid integrated circuit, and prevents warping of the printed board due to soldering of the lead terminals to the bottom surface of the printed board. It is an object of the present invention to provide a hybrid integrated circuit device in which a bending moment exerted on a lead terminal is absorbed by a curved portion so that the substrate of the hybrid integrated circuit is not affected.

〔発明の実施例〕[Embodiments of the invention]

第２図はこの発明の一実施例による混成集積回路装置の
正面図であり、（１）〜（３）　、　（５）　、　（６
）は上記従来装置と同一のものである。（＋１）はセラ
ミック厚膜基板（１）の両側から下方に引出された複数
木兄のリード端子で、中間に湾曲部（ｌｌａ）を設は機
械的緩衝作用をもだせである。FIG. 2 is a front view of a hybrid integrated circuit device according to an embodiment of the present invention.
) is the same as the conventional device described above. (+1) is a multi-branch lead terminal pulled out downward from both sides of the ceramic thick film substrate (1), and a curved part (lla) is provided in the middle to provide a mechanical buffering effect.

この混成集積回路装置を二点鎖線で示すプリント基板（
５）に実装する。この実装で、各リード端子（４）をプ
リント基板（５）のスルーホール（６）に通し、裏面側
ではんだ結合する。このはんだ付は作業による熱で、一
点鎖線で示すようにプリント基板（５）に反りが生じ、
各リード端子（４）に曲げモーメントが加わっても、湾
曲部（ｌｌａ）でたわむことにより吸収され、上方の基
板（１）に及ぼす応力はわずかとなり、破損が防止され
る。This hybrid integrated circuit device is shown on a printed circuit board (
5). In this mounting, each lead terminal (4) is passed through the through hole (6) of the printed circuit board (5) and connected by solder on the back side. Due to the heat generated during this soldering process, the printed circuit board (5) warps as shown by the dashed line.
Even if a bending moment is applied to each lead terminal (4), it is absorbed by bending at the curved portion (lla), and the stress exerted on the upper substrate (1) becomes small, thereby preventing damage.

なお、上記実施例では混成集積回路の基板としてセラミ
ック厚膜基板を用いたが、セラミック島膜基板であって
もよく、あるいは他の種の絶縁基板の場合にも適用でき
るものである。In the above embodiments, a ceramic thick film substrate was used as the substrate of the hybrid integrated circuit, but a ceramic island film substrate or other types of insulating substrates may also be used.

〔発明の効果〕〔Effect of the invention〕

以上のように１この発明によれば、混成集積回路の基板
から下方に引出された両側複数木兄のリード端子の中間
にそれぞれ湾曲部を形成したので、プリント基板に実装
した際、プリント基板の反りによるリード端子に加わる
曲はモーメントが湾曲部により吸収され、混成集積回路
の基板への影響がわずかとなシ破損が防止される。As described above, (1) according to the present invention, curved portions are formed in the middle of the multiple lead terminals on both sides pulled out downward from the board of the hybrid integrated circuit, so that when mounted on a printed circuit board, The moment of bending applied to the lead terminal due to warping is absorbed by the curved portion, and the influence on the board of the hybrid integrated circuit is slight and damage is prevented.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来の混成集積回路装置の概要正面図、第２図
はこの発明の一実施例による混成集積回路装置の概要正
面図である。 １・・・セラミック厚膜基板、２，３〜・・・電子部品
、５・・・プリント基板、１１・・・リード端子、１１
ａ・・・湾曲部 なお、図中同一符号は同−又は相当部分を示す。 代理人　大岩増雄 第１図 第２図FIG. 1 is a schematic front view of a conventional hybrid integrated circuit device, and FIG. 2 is a schematic front view of a hybrid integrated circuit device according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Ceramic thick film board, 2, 3... Electronic component, 5... Printed circuit board, 11... Lead terminal, 11
a...Curved portion Note that the same reference numerals in the drawings indicate the same or equivalent parts. Agent Masuo Oiwa Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 複数の電子部品が装着された混成集積回路の基板、及び
この基板の両側から下方に引出され、中間に湾曲部が設
けられた複数木兄のリード端子を備えたことを特徴とす
る混成集積回路装置。A hybrid integrated circuit comprising: a hybrid integrated circuit board on which a plurality of electronic components are mounted; and a plurality of lead terminals extending downward from both sides of the board and having a curved portion in the middle. Device.
JP58074258A 1983-04-25 1983-04-25 Hybrid integrated circuit device Pending JPS59198745A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58074258A JPS59198745A (en) 1983-04-25 1983-04-25 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58074258A JPS59198745A (en) 1983-04-25 1983-04-25 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS59198745A true JPS59198745A (en) 1984-11-10

Family

ID=13541938

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58074258A Pending JPS59198745A (en) 1983-04-25 1983-04-25 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS59198745A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62103261U (en) * 1985-12-19 1987-07-01
JPS62254370A (en) * 1986-04-28 1987-11-06 日立マクセル株式会社 Lead frame terminal
WO1998014038A1 (en) * 1996-09-25 1998-04-02 Melcher Ag Device for mounting hybrid connections on printed circuit boards

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62103261U (en) * 1985-12-19 1987-07-01
JPS62254370A (en) * 1986-04-28 1987-11-06 日立マクセル株式会社 Lead frame terminal
WO1998014038A1 (en) * 1996-09-25 1998-04-02 Melcher Ag Device for mounting hybrid connections on printed circuit boards

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