JPS5918659A - Formation of multilayer wiring - Google Patents

Abstract

PURPOSE:To obtain a fine multilayer wiring without disconnections by a method wherein the upper layer metallic wiring is provided by depositing a metal having selectivity only on the exposed part of the lower layer metallic wiring by a CVD method arbitrarily. CONSTITUTION:A window is opened through a SiO2 film 2 on a Si substrate 1 whereon an element is formed, and then the lower layer wiring of a Al-1.5% Si alloy film 3 is provided. A PSG film 4 is superposed by a CVD method, a micro hole is opened, and then a W film 5 is formed on the Al-Si alloy 3 by a pressure reduction CVD method under the condition of H2 15l/min, WF6 30cc/ min, substrate temperature 400 deg.C, deposition pressure 40Pa, and deposition speed 15nm. This condition causes deposition only on the Al-Si alloy 3, not on the PSG film 4. Next, the upper layer wiring is formed by sputtering an Al film 6. This constitution enables perfect connection even when the diameter of the through hole is as fine as 2mum or less, and accordingly easily obtain the multilayer wiring of a fine structure without disconnections.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming multilayer wiring, and includes a method for forming a first layer wiring and a second layer wiring.
The present invention relates to a method for forming a multilayer wiring in which metal is connected using a chemical vapor deposition method of a metal having selectivity at the connection portion in a step of connecting layer wiring.

In the conventional multilayer wiring, as shown in FIG. 1, an insulating film 4 is formed on the metal of the first layer wiring 3, a connection hole (through hole) is made by photo-etching, and then the metal of the second layer wiring 6 is formed. is formed by vacuum evaporation or sputtering. It is known that when metal is formed by these methods, the thickness of the metal film becomes thinner at the stepped portion 7, as shown in FIG. 2, and so-called step coverage deteriorates. Even if this step coverage is poor, it hardly causes any problems if the diameter of the hole is large. However, in order to improve the performance of semiconductor devices, as miniaturization progresses, the diameter of through holes tends to become smaller than 2 μmφ. When the diameter of the through hole is reduced in this manner, there is a drawback that if the step coverage is poor, a cavity 8 is generated as shown in FIG. 3, and the hole 8 is not connected to the base.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming a multilayer interconnection in which a metal connecting a first layer interconnection and a second layer interconnection is formed by a selective chemical vapor deposition method. It is something.

As the multilayer interconnections of semiconductor devices become increasingly finer, through-holes with a diameter of 2 μm or less are required. When connecting wiring through such small through-holes, the currently used metal films formed by vacuum evaporation and sputtering methods have poor step coverage in stepped areas, creating cavities in the through-holes and making it impossible to connect the wiring. . The present invention solves the above-mentioned problems, and uses a selective chemical vapor deposition method to deposit metal only in the null-hole area to complete the connection with the underlying wiring, and then This is a method of forming multilayer wiring by forming layered wiring.

An embodiment of the present invention will be described below with reference to FIGS. 4, 5, and 6.

An oxide film 2 is soon formed on a silicon substrate 1 on which elements are formed.
After forming, holes are made by photo-etching, and a 1 μm aluminum-silicon alloy (silicon content: approximately 1.5%) film 3 is formed on the entire surface by sputtering at a temperature of 300 C, and the first layer of aluminum is removed by photo-etching. Wiring of mu-silicon alloy is formed (FIG. 4). next,
1) After forming a 600 nm thick phosphor glass film 4 at a temperature of 420 C using a chemical vapor deposition method, 1)
．． A through hole with a diameter of 5 μm is drilled, and hydrogen 1 s t/=, tungsten hexafluoride 3 Q
c c 7mltt, a tungsten film 5 of 6QQnm is formed on the aluminum-7 silicon alloy 3 of the first layer wiring under the conditions of a substrate temperature of 400C, a deposition pressure of 40Pa%, and a deposition rate of 1i15nm. Under such deposition conditions, the film is not deposited on the phosphorus glass film 4, but is selectively deposited only on the aluminum-silicon alloy film 3 (FIG. 5). Next, a 2 μm thick aluminum film 6 is formed at 300 C over the entire surface by sputtering, and then a second layer wiring is formed by photoetching (FIG. 6).

According to the present invention, in the method for forming multilayer wiring, even if the diameter of the through hole connecting the wiring is minute, the connection can be made perfectly, and the multilayer wiring of semiconductor elements with a fine structure without disconnection defects can be easily formed. There is an effect that can be achieved.

In the above embodiments, tungsten was used as the metal for connecting the wirings, but other metals such as molybdenum, Kuntal, and alloys thereof can be treated in the same way. Furthermore, although the explanation has been made using an aluminum-silicon alloy as the base metal, platinum silicide, palladium silicide, nickel silicide, aluminum-silicon-copper alloy, etc. may also be used.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view of a conventional multilayer wiring, Figures 2 and 3 are cross-sectional views showing the state of formation of a conventional metal film, and Figures 4 to 6.
The figure is a cross-sectional view of a multilayer interconnection explaining one embodiment of the present invention. 1... Silicon substrate on which an element is formed, 2... Oxide film, 3... Aluminum-silicon alloy film, 4... Ring gas film, 5... Tungsten film, 6... Aluminum film χ 1 Figure 2 Figure 3

Claims (1)

[Claims] 1. In the wiring process for connecting the first layer wiring and the second layer wiring, a selective metal chemical vapor deposition method is used to
A method for forming a multilayer interconnection comprising selectively depositing metal only on exposed metal parts of the layer interconnection to connect the metal of the second layer interconnection.