JPH04337631A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the reliability of a diffusion layer and wiring to be connected by satisfactorily and stably forming a barrier metal for connecting these parts. CONSTITUTION:A barrier metal 16a is formed on a diffusion layer 13 by a lift-off method, and then the accumulation of a layer insulation film 14, opening of a contact hole 15 and formation of a wiring 17 are conducted successively.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming a barrier metal between a diffusion layer and a wiring.

0002

2. Description of the Related Art In a conventional method for manufacturing a semiconductor device, the formation of a barrier metal between a diffusion layer and a wiring is first performed in FIG. 3(a).
), the field oxide film 12, the diffusion layer 13,
On the semiconductor substrate 11 on which the interlayer insulating film 14 and the like are formed, patterning is performed using photoresist, and contact holes 15 are formed by etching. Next, Figure 3 (
As shown in b), a barrier metal 16 is formed over the entire surface of the semiconductor substrate 11 by sputtering or the like. Next, Figure 3(c)
), after forming a conductor film for forming the wiring 17 on the entire surface of the semiconductor substrate 11, patterning is performed using photoresist, and the wiring 17 is formed by etching, thereby forming a connection between the diffusion layer 13 and the wiring 17. A barrier metal 16a was formed in between.

0003

[Problems to be Solved by the Invention] In recent years, semiconductor devices have become more dense and highly integrated, pattern dimensions have become finer, and the diameter of the contact hole 15 has become finer, 1 μm or less, resulting in a large aspect ratio ( 1) shape.

As shown in FIG. 3, the barrier metal is formed in the conventional semiconductor device manufacturing method by forming a contact hole 15 and then forming a barrier metal 16 on the entire surface of the semiconductor substrate 11 by sputtering. However, as mentioned above, since the aspect ratio of the contact hole 15 is large, it is difficult to form a film with the same thickness on the bottom of the contact hole 15 and on the insulating film 14. The film thickness can be formed only half or less of the film thickness formed on 14. Furthermore, Figure 3(b)
), the coverage is poor at the corner of the bottom of the contact hole 15 (section A in the circle in the figure), and it is possible to form only a thinner film. It is difficult to form. Therefore, if a desired film thickness required for the barrier metal is formed at the bottom of the contact hole 15, a film more than twice the thickness will be formed on the insulating film 14. For example, in a TiW film (titanium/tungsten film), the bottom of the contact hole 15 has a thickness of 100 to 150
200 to 300 nm is necessary on the insulating film 14.
A film thickness of nm or more is formed. The film thickness formed on this insulating film 14 is, for example, 50 mm, because after the wiring 17 is formed, there will be a step in addition to the film thickness of the wiring 17.
If the wiring film thickness is 0 nm, the overall step difference is 750
This results in a problem that the interlayer insulating film formed on the wiring 17 in the multilayer wiring structure is difficult to planarize. Furthermore, due to the above-mentioned problem, when the barrier metal is formed as thinly as possible, the coverage is poor at the corner of the bottom of the contact hole 15 and the film thickness becomes thin, so the required film thickness as the barrier metal is reduced due to variations in the formed film thickness. There was a problem in that it could not be obtained and did not function as a barrier metal. moreover,
The wiring 17 is formed by etching (reactive ion etching), but the wiring 17 is formed by etching (reactive ion etching).
In the case of etching a two-layer structure of and barrier metal 16,
There was a problem in that it was difficult to form the lower layer barrier metal without undercutting it.

[0005]

[Means for Solving the Problems] In the method for manufacturing a semiconductor device of the present invention, after forming a diffusion layer on a semiconductor substrate, a barrier metal is formed only on the diffusion layer by a lift-off method, and then between the diffusion layer and wiring. This process involves forming an interlayer insulating film, contact holes and wiring, and forms a barrier metal before forming the contact holes.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 1 is a cross-sectional view of the process order for explaining a first embodiment of the present invention.

First, as shown in FIG. 1(a), a field oxide film 12 and a diffusion layer 13 are formed on a semiconductor substrate 11.

Next, as shown in FIG. 1(b), the diffusion layer 1
Create a pattern with photoresist 18 so that only the top three parts are open.
The barrier metals 16 and 16a are formed by sputtering. At this time, by subjecting the photoresist 18 to chlorobenzene treatment before exposing the pattern, the cross-sectional shape of the overhang as shown in the figure can be obtained. On the other hand, the barrier metals 16 and 16a are made of, for example, a TiW film (titanium).
approximately 150 nm on the diffusion layer 13.
Forms a film thickness of With this film thickness, the etching rate of the TiW film during later contact hole formation is much slower than that of the oxide-based interlayer insulating film 14, and the selectivity can be greater than 10, so that the reduction in film thickness due to etching of the TiW film is 20
A contact hole can be formed under conditions of less than nm, which is sufficient as a barrier metal film thickness. Since the cross-sectional shape of the pattern of the photoresist 18 has an overhang, the sputter-formed via metals 16, 16a do not adhere to the sidewalls of the photoresist 18 where the holes are formed, but are attached to the top of the photoresist 18 and the hole pattern. Diffusion layer 13 which is the bottom
Formed on top. Thereafter, the barrier metal 16 formed on the photoresist 18 is removed together with the photoresist 18 using a lift-off method, and the barrier metal 16a is formed only on the diffusion layer 13.

Next, as shown in FIG. 1C, an interlayer insulating film 14 made of, for example, a phosphosilicate glass film with a thickness of 1.0 μm is formed, and a contact hole 15 is formed on the barrier metal 16a.

Next, as shown in FIG. 1(d), a wiring 17 made of, for example, an aluminum film with a thickness of 0.5 μm is formed. By going through the above steps, the diffusion layer 13-wiring 1
Barrier metal 16a having a stable film thickness can be formed between 7 and 7.

FIG. 2 is a cross-sectional view of the process order for explaining a second embodiment of the present invention. In this embodiment, a silicide film is formed on the diffusion layer in order to reduce the resistance of the diffusion layer and the contact resistance.

First, as shown in FIG. 2(a), a film with a thickness of 100 mm, for example, is formed on the diffusion layer 13 formed on the semiconductor substrate 11.
A silicide layer 19 of TiSix (titanium silicide) or the like is formed in a self-aligned manner.

Next, as shown in FIG. 2(b), a pattern is formed using photoresist 18 in which holes are formed only on the silicide layer 19, barrier metals 16 and 16a are formed by sputtering, and lift-off is used to form the barrier metals 16 and 16a. silicide layer 1
A barrier metal 16a made of a TiW film having a thickness of 150 nm, for example, is formed only on the surface of the substrate 9. The details are the same as in the first embodiment.

The following explanation of FIGS. 2(c) and 2(d) is the same as that of the first embodiment, and by going through the above steps, the gap between the silicide layer 19 and the wiring 17 is similar to that of the first embodiment. , it is possible to form the barrier metal 16a with a stable film thickness.

[0015]

As explained above, in the present invention, after forming a diffusion layer on a wafer, a barrier metal is formed only on the diffusion layer by a lift-off method, and then an interlayer insulating film is formed between the diffusion layer and the wiring. , the contact hole and wiring are formed, and the barrier metal is formed before the contact hole is formed, so it is possible to form a barrier metal with a stable film thickness and good barrier properties, which reduces the occurrence of defects such as alloy spikes. This has the effect of improving reliability.

Furthermore, since the wiring structure is a single-layer structure, the height difference in the wiring can be reduced by about 40% (from 850 nm to 500 nm) compared to the conventional two-layer structure of barrier metal and wiring, making it suitable for application to multilayer wiring structures. It is possible. Moreover, since it has a single layer structure, it does not require a complicated etching process or the like to form wiring, and has the advantage that wiring can be formed easily.

[Brief explanation of drawings]

FIG. 1 is a sectional view for explaining a first embodiment of the present invention.

FIG. 2 is a sectional view for explaining a second embodiment of the present invention.

FIG. 3 is a cross-sectional view for explaining a conventional method of manufacturing a semiconductor device.

[Explanation of symbols]

11 Semiconductor substrate 12 Field oxide film 13 Diffusion layer 14 Interlayer insulation film 15 Contact hole 16, 16a Barrier metal 17 Wiring 18 Photoresist 19 Silicide layer

Claims (1)

[Claims] 1. A method for manufacturing a semiconductor device in which a diffusion layer and wiring are connected via a barrier metal, comprising: forming the diffusion layer on a semiconductor substrate; and forming the barrier metal only on the diffusion layer by a lift-off method. a step of forming an interlayer insulating film on the entire surface; a step of forming a contact hole reaching the barrier metal in the interlayer insulating film; and a step of forming the wiring. Production method.