JPS5914669A - Manufacture of semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, particularly a method of manufacturing a transistor having a structure in which the elongated surfaces of the base, region, and emitter region are in contact with a thick insulating film. Fig. 1 shows a top view of the structure. In addition, 11 is an opening for the collector electrode, 12 is an opening for the emitter electrode,
Reference numeral 13 indicates an opening for the base electrode.

In establishing the present invention, cross-sectional views taken along planes A and A' in FIG. 1 are used to facilitate understanding of the purpose of the invention.

A conventional method of manufacturing a transistor is shown in FIGS. 2(a) to 2(C). First, as shown in (a), an insulated and isolated collector region 2 is formed on a conductive semiconductor substrate 1, and a base region 4 is formed by ion implantation through the oxide film 3 on the surface. Subsequently, as shown in (I)), the oxide film 3 is selectively removed using photolithography to form an emitter impurity diffusion hole 5. Subsequently, as shown in (C), emitter impurities are diffused through the opening 5 to form an emitter region 6.
Transistors are manufactured by forming .

However, the conventional manufacturing method as described above has the following drawbacks. That is, in FIG. 2 Φ), the surface 7 at the end of the base region is exposed due to side etching of the oxide film 3 when the emitter diffusion window 5 is opened. For this reason, as shown in (d), during emitter diffusion, the emitter region easily penetrates the base region at the end of the base region, and the collector,
It causes an emitter short circuit, but does not significantly affect the structure or manufacturing yield. As a method for improving the above-mentioned drawbacks, as shown in FIG. 3(a) to Φ), a base region forming window 8 is opened, and then a base region 4 is formed by direct ion implantation into the silicon surface. There is a method of forming the emitter region 6. However, the above manufacturing method also has the following drawbacks. That is, when forming the base region,
Since ions are directly implanted into the silicon surface, even if the implantation energy is reduced, the highest impurity concentration is at a deep position far from the semiconductor surface, which limits the ability to improve the performance of the transistor.

An object of the present invention is to provide a method for manufacturing a semiconductor device, that is, a high-performance, high-yield transistor, which eliminates the above-mentioned conventional drawbacks.

In the method for manufacturing a semiconductor device of the present invention, a first ? a step of forming an edge film, then a step of selectively removing the insulating film to form an opening, and following this step a second insulating film is formed and a first impurity is implanted by ion implantation. , comprising the steps of forming a first diffusion layer from the opening window to the silicon surface, and then removing the silicon nitride film and forming a second impurity from the opening. It is something.

In the present invention, a silicon nitride film is formed after the window for forming the diffusion layer is formed through the m'' hole, and in order to form the base region by ion implantation through the silicon nitride film, the maximum concentration level of the base impurity is approximately reduced. It can be set on the semiconductor surface.

Furthermore, by forming the emitter region in the same window as the base region after removing the silicon nitride film, it is possible to prevent a decrease in yield due to a short circuit between the collector region and emitter region, and realize a high-performance transistor with a high yield υ. can.

An embodiment of the present invention will be described in detail below with reference to the drawings.

FIGS. 4(a) to 4(d) are process diagrams showing one embodiment of the method of the present invention.

First, as shown in (a), an insulated collector region 2 is formed on a silicon substrate 1. This process is performed using a well-known selective oxidation technique.

Next, as shown in (b), an oxide film 3 is formed at the locations where the base region and emitter region are to be formed using photolithography technology.
is removed by etching to form an opening 8 and expose the silicon surface.

Next, as shown in the figure (C), a silicon nitride film is formed on the semiconductor surface (1), and boron is implanted through the silicon nitride film 9 using the ion implantation method to form a base on the silicon surface through the opening 8. In this case, since ion implantation is performed through the silicon nitride film to form region 4, a peak of impurity concentration can be formed on the surface of the silicon substrate, and a shallow junction can be formed.

Next, as shown in (d), silicon nitride 9 is removed.

In this case, if a solution such as phosphoric acid that removes only silicon nitride is used, the silicon surface can be exposed without changing the shape of the opening 8.

Subsequently, a chemical impurity is diffused through the opening 8 to form an emitter region 6.

In this case, since the emitter impurity is diffused through the same window 8 as the impurity introduced into the base region, it is possible to prevent a collector-emitter short circuit due to penetration of the emitter region at the end of the base region.

According to the above-mentioned example, the base region is formed after opening a window for forming the base region, and then the emitter impurity is diffused through the same window to form the emitter region. Emitter short circuits can be prevented and shallow junctions can be formed with high yield.

FIG. 5 shows another embodiment of the invention. The steps up to the formation of the base region are the same as those shown in FIG. 4, and when forming the emitter region, the emitter impurity is introduced through the polysilicon 10 to form a shallow emitter junction. According to the paper, it is possible to propose a method for manufacturing high-performance hP transistors with high yield.

[Brief explanation of drawings]

FIG. 1 is a plan view of a transistor having a structure in which the side surfaces of the base region and emitter region are in contact with an insulating film. FIGS. 2(a) to 2(C) are cross-sectional views of each step in the manufacturing of a conventional transistor, and FIG. 2(d) is a cross-sectional view showing defects. FIGS. 3A and 3B are cross-sectional views showing each step in another conventional method for manufacturing a transistor. FIGS. 4(a) to 4(d) are cross-sectional views showing each step in a method for manufacturing a transistor according to an embodiment of the present invention. FIG. 5 is a cross-sectional view of another embodiment of the invention. In the figure, 1... semiconductor substrate, 2...
... Collector region, 3 ... Oxide film, 4 ...
...Pace region, 5...Emitter impurity diffusion hole, 6...Emitter region, 7...Silicon surface at the end of base region, 8... paste, emitter impurity diffusion hole, 9...silicon nitride film,
10...Polysilicon film, 11...Aperture for collector electrode, 12...Emitter\U open for analysis 1st closed 2nd closed No. 1 No. 323 - Ward 3

Claims (1)

[Claims] forming a first insulating film on one main surface of the semiconductor substrate;
The step of forming an opening in the insulating film described above in 1 above, and performing ion implantation on the edge where the second insulating film is coated on the surface of the semiconductor substrate to form the first insulating film from at least the opening to the surface of the semiconductor substrate.
A step of forming an impurity region and removing the second insulating film to make a half! 9. A semiconductor characterized by comprising a step of exposing a surface of the semiconductor body and introducing a second impurity having a conductivity and type different from the first impurity through the opening, thereby forming a second impurity head. Method of manufacturing the device.