JPS6295871A - Manufacturing method of semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having a high-speed bipolar element.

[Conventional technology]

Conventionally, A is the manufacturing method for high-speed bipolar transistors.
advanced P, S, A (Polysilico
n 5elf Aligned) method has been proposed.

(For example, IEEE TRANSACTION ON
ELECTRON DEVICES VOL ED-2
7, NO8, A[]GUST 1980) In this manufacturing method, first, as shown in FIG. 2(a), an N-type buried layer 32, an N-type epitaxial layer 33, and a P-type insulation A diffusion layer 34 is formed, a thin oxide film 35 and a nitride film 36 are formed on the surface, and selective oxidation is performed using the nitride film 36 to form a thick oxide film 37. The nitride film 36 is left only in the emitter formation region. After forming a polycrystalline silicon layer 38 on the entire surface and selectively oxidizing it, N-type impurities are introduced into a part of the polycrystalline silicon layer 38 and this is added to the epitaxial layer 33.
The N-type impurity layer 39 for extracting the collector is formed by diffusing the impurity into the N-type impurity layer 39. Furthermore, a P-type impurity is introduced into another portion of the polycrystalline silicon layer 38 and diffused into the epitaxial layer 33 to form a P-type impurity layer 40 as a graft base.

Next, as shown in FIG. 3B, the oxide film of the polycrystalline silicon layer 38 in the portion corresponding to the base is removed, and the remaining nitride film 36 is removed.
P-type impurities are ion-implanted in a self-aligned manner using
A P-type impurity layer 41 having a narrower width is formed inside the P-type impurity layer 40 .

Further, a nitride film 42 is formed in areas other than the portion corresponding to the base.

Then, as shown in FIG. 2C, after oxidizing the exposed polycrystalline silicon layer 38 corresponding to the base to form an oxide film 43, the nitride film 36 and thin oxide film 35 are removed, and ion implantation is performed. By introducing P-type impurities by the method, active base 4
form 4. Thereafter, a new pattern is formed on the polycrystalline silicon layer 45, and an N-type impurity is introduced into this polycrystalline silicon layer 45 and diffused into the active base 44 to form an emitter 46, thereby completing a bipolar device. .

[Problem that the invention seeks to solve]

The conventional method for manufacturing the semiconductor device described above is shown in FIG. 2(a).
The graft base 40 is formed in a state in which it is electrically connected to the polycrystalline silicon layer 38 in the process of , but due to manufacturing process reasons, it is not possible to form the graft base 40 close to the portion corresponding to the emitter. , so the same figure (
In step b), a narrower graft base 41 is newly formed inside the graft base 40. Therefore, the width of the graft base as a whole becomes large as the sum of these graft bases 40 and 41, which becomes an obstacle to miniaturization of bipolar transistors. Furthermore, the large size of the graft base increases base resistance and collector-base junction capacitance, making it difficult to achieve high-speed operation and high gain of a bipolar transistor.

[Means for solving problems]

The semiconductor device manufacturing method of the present invention reduces the base resistance and collector base resistance by forming the graft base with a small width dimension, and in order to obtain a high-speed and high-gain bipolar transistor. Before forming a crystalline silicon layer and forming an impurity layer through it, impurity ions are implanted using self-alignment using a nitride film provided in the portion corresponding to the emitter to form an impurity layer as a graft base. The method includes a step of forming a conductive impurity layer within the graft base through the formed polycrystalline silicon layer.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(h) are cross-sectional views for explaining the present invention in the order of manufacturing steps.

First, as shown in the same figure (a), N is applied to the P type substrate 1.
P-type insulation diffusion 4 is performed by a conventional method on the wafer on which the type buried layer 2 and the N-type epitaxial layer 3 have been formed. Further, a thin oxide film 5 is grown on the surface, and a nitride film 6 is grown by the LPCVD method. Thereafter, the nitride film 6 is dry etched using a resist (not shown) as a mask, and after removing this resist, selective oxidation is performed using the patterned nitride film 6 as a mask to form a thick oxide film 7.

Next, as shown in the same figure (b), the nitride film 6 other than the portion corresponding to the base is removed using the resist 8 as a mask, and a resist 9 is formed again as shown in the same figure (C), and this resist 9 is used as a mask. Then, the remaining nitride film 6 is etched, leaving only the portion corresponding to the emitter as the nitride film 10. In this state, a P-type impurity such as boron is ion-implanted to form a P-type impurity layer 11 in a self-aligned manner.

Subsequently, after removing the resist 9 and removing the oxide film 5,
As shown in FIG. 2D, the polycrystalline silicon layer 12 is grown to about 6000 layers. A nitride film 13 is grown on this, and a pattern is formed on this nitride film 13 by dry etching using a resist (not shown) as a mask. Using this as a mask, a part of the polycrystalline silicon layer 13 is thickly oxidized. Change to membrane 14. At this time, it is important to change the polycrystalline silicon layer 12 on the nitride film 10 to a thick oxide film 14 that covers the nitride film 10.

Next, the nitride film 13 is removed, and an N-type impurity such as phosphorus is introduced into the polycrystalline silicon layer 12 in the portion corresponding to the collector using a resist or the like as a mask.
2 into the epitaxial layer 3, as shown in the figure (e).
N-type impurity layer 1 as a collector extraction layer as shown in FIG.
form 5.

Similarly, using a resist or the like as a mask, a P-type impurity such as boron is introduced into the polycrystalline silicon layer 12 corresponding to the base by ion implantation or the like, and the P-type impurity is introduced into the polycrystalline silicon layer 12 through this polycrystalline silicon layer 12. A P-type impurity layer 16 is formed in 11. After that, an oxide film 17 is grown on the polycrystalline silicon layer 12, and a new nitride film 18 is grown, and this nitride film 18 is selectively etched to form a mask, and the thick oxide film 14 corresponding to the emitter is removed. let

Thereafter, using the nitride film 10.18 as a mask, the surfaces of the polycrystalline silicon layer 12 and P-type impurity layer 11 are oxidized, and the oxide film 1
Grow 9. Then, as shown in FIG. 2F, after removing the nitride films 10 and 18 and the oxide film 5, an active base 20 is formed by ion-implanting P-type impurities such as poron.

After that, polycrystalline silicon is deposited on the entire surface of the wafer, for example, 25
After 00 layers are grown, an N-type impurity such as arsenic is ion-implanted and pushed into the active base 20 to form an emitter 22 made of an N-type impurity layer. Then, using a resist (not shown) as a mask, the polycrystalline silicon is patterned to form the extraction electrode 21 of the emitter 22 as shown in FIG. 2(g).

Then, the oxide film on the polycrystalline silicon layer 12 and the extraction electrode 2 is removed, a metal film is formed and this is silicided, and the unreacted metal is removed to form a collector as shown in FIG. base.

Each electrode 23, 24, 25 of the emitter is formed.

Although not shown in the drawings, a bipolar IC having a bipolar transistor as an element can be constructed by forming an insulating film between the eyebrows and wiring aluminum or the like on the hill where a contact hole is formed.

According to the bipolar transistor configured in this way,
The graft base was first formed by ion implantation.
It is composed of a type impurity layer 11 and an N type impurity layer 16 which is subsequently diffused into the N type impurity layer 11 through a polycrystalline silicon layer 12.

Therefore, since the N-type impurity layer 11 is formed by a self-alignment method using the nitride film 10, it can be formed with a narrow width dimension, and the N-type impurity layer 11 conductive to the polycrystalline silicon layer 12 for leading out the electrode Layer 16 is N-type impurity layer 1
1, and the entire graft base can be constructed from these to have a fine width dimension. Therefore, while attempting to miniaturize bipolar transistors,
The base resistance and collector-base junction capacitance can be reduced, and a bipolar transistor with high speed, high frequency, and high gain can be obtained.

Here, in the embodiment described above, an NPN bipolar transistor has been described, but it is conceivable that the present invention can be similarly applied to a PNP bipolar transistor.

〔Effect of the invention〕

As explained above, the present invention forms a polycrystalline silicon layer for leading out the base electrode, and before forming an impurity layer through the polycrystalline silicon layer, self-alignment is performed using a nitride film provided in a portion corresponding to the emitter. Compared to conventional methods, this method includes the steps of ion-implanting impurities to form an impurity layer as a graft base, and then forming a conductive impurity layer within this graft base through the formed polycrystalline silicon layer. The width dimension of the graft base can be reduced, thereby making it possible to miniaturize the bipolar transistor, reduce the base resistance and the collector-base junction capacitance, and obtain a bipolar transistor with high gain at high speed and high frequency.

[Brief explanation of drawings]

FIGS. 1(a) to (h) are sectional views for explaining the present invention in the order of steps, and FIGS. 2(a) to (c) are sectional views for explaining the conventional method in the order of steps. 1.31...P type substrate, 2.32...N
Type buried layer, 3.33...N type epitaxial layer, 4゜34...Insulating diffusion layer, 5.35...Thin oxide film, 6
゜36...Nitride film, 7,37...Thick oxide film, 8.
9... Resist, 10... Nitride film, 11... Graft base, 12.38... Polycrystalline silicon layer, 13
...Nitride film, 14...Oxide film, 15.39...Collector extraction part, 16...Graft base, 17.
... Oxide film, 18... Nitride film, 19... Oxide film, 2
0... Active base, 21... Extraction electrode, 22.
...Emitter, 23-25...Silicide electrode, 40
．． 41... Graft base, 42... Nitride film, 43
...Oxide film, 44...Active base, 45...Polycrystalline silicon layer, 46...Emitter. Figure 1

Claims (1)

[Claims] 1. A step of selectively oxidizing the surface of the first conductive type semiconductor substrate to form a thick oxide film surrounding a portion corresponding to the base, and a step of forming a mask including a nitride film in a portion corresponding to the emitter within this portion corresponding to the base. forming a reverse conductivity type impurity layer by ion-implanting a reverse conductivity type impurity into a portion corresponding to the base of the semiconductor substrate by self-alignment using the thick oxide film and nitride film; and forming a polycrystalline silicon layer on the entire surface. At the same time, a step of oxidizing at least a portion of the polycrystalline silicon layer covering the nitride film corresponding to the emitter, and further adding an impurity layer of a reverse conductivity type into the reverse conductivity type impurity layer through an unoxidized portion of the polycrystalline silicon layer. a step of removing the oxidized portion of the polycrystalline silicon layer and the nitride film in a portion corresponding to the emitter, and forming an active base by introducing impurities of opposite conductivity type into the portion where the nitride film was present. 1. A method for manufacturing a semiconductor device, the method comprising the steps of: forming an emitter by introducing an impurity layer of one conductivity type onto the active base.