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JPS57199040A - Synchronizing device for data transfer - Google Patents

Synchronizing device for data transfer

Info

Publication number
JPS57199040A
JPS57199040A JP56085252A JP8525281A JPS57199040A JP S57199040 A JPS57199040 A JP S57199040A JP 56085252 A JP56085252 A JP 56085252A JP 8525281 A JP8525281 A JP 8525281A JP S57199040 A JPS57199040 A JP S57199040A
Authority
JP
Japan
Prior art keywords
synchronizing
data
component
timing
basic processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56085252A
Other languages
Japanese (ja)
Inventor
Shunsuke Hosomi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56085252A priority Critical patent/JPS57199040A/en
Publication of JPS57199040A publication Critical patent/JPS57199040A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To evaluate and etc. of other kinds of component without remodeling a device or generating a new kind of component, by providing a data synchronizing device between a main memory and a basic processing device to transmit and receive data between them at a timing independent of timing of an input output-device. CONSTITUTION:Data synchronizing device 6 is connected to a processing system bus 4 and a data bus 5 between a main memory device 2a and a basic processing device 1 which controls the whole of a computer, and the device 2 and the synchronizing device 6 are connected by busses 4 and 5 and a bus 7 for synchronizing clocks. The basic processing device 1 and an input output processing device 3 are connected by busses 4 and 5. Data are transmitted and received between the basic processing device 1 and the device 2a at a timing independent of timing of the device 1 by the synchronizing device 6, thus testing, evaluating, and executing other kinds of component without remodeling the device or generating a new kind of component.
JP56085252A 1981-06-01 1981-06-01 Synchronizing device for data transfer Pending JPS57199040A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56085252A JPS57199040A (en) 1981-06-01 1981-06-01 Synchronizing device for data transfer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56085252A JPS57199040A (en) 1981-06-01 1981-06-01 Synchronizing device for data transfer

Publications (1)

Publication Number Publication Date
JPS57199040A true JPS57199040A (en) 1982-12-06

Family

ID=13853373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56085252A Pending JPS57199040A (en) 1981-06-01 1981-06-01 Synchronizing device for data transfer

Country Status (1)

Country Link
JP (1) JPS57199040A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6083445A (en) * 1983-10-13 1985-05-11 Fujitsu Ltd Synchronization system for asynchronous signal
JPS63300348A (en) * 1987-05-30 1988-12-07 Toshiba Corp Microprocessor system
JPH01144134A (en) * 1987-11-30 1989-06-06 Nec Corp Space switching system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6083445A (en) * 1983-10-13 1985-05-11 Fujitsu Ltd Synchronization system for asynchronous signal
JPS63300348A (en) * 1987-05-30 1988-12-07 Toshiba Corp Microprocessor system
JPH0555908B2 (en) * 1987-05-30 1993-08-18 Tokyo Shibaura Electric Co
JPH01144134A (en) * 1987-11-30 1989-06-06 Nec Corp Space switching system

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