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JPS5696333A - Program correction system - Google Patents

Program correction system

Info

Publication number
JPS5696333A
JPS5696333A JP17290179A JP17290179A JPS5696333A JP S5696333 A JPS5696333 A JP S5696333A JP 17290179 A JP17290179 A JP 17290179A JP 17290179 A JP17290179 A JP 17290179A JP S5696333 A JPS5696333 A JP S5696333A
Authority
JP
Japan
Prior art keywords
program
address information
address
memory
correct
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17290179A
Other languages
Japanese (ja)
Inventor
Yoshiharu Kamio
Hitoshi Shirai
Yoshikazu Tanaka
Tadao Kotanino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17290179A priority Critical patent/JPS5696333A/en
Publication of JPS5696333A publication Critical patent/JPS5696333A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To correct the program economically, by shunting contents of the memory to a rewritable memory by an interruption signal to correct them, in the system where programs are stored into the unrewritable read-only memory.
CONSTITUTION: During execution of a certain program, coincidence between address information for instruction execution sent from the processing unit through address bus AB and address information input from match address register group MARG is detected by matcher MA; and if they coincide with each other, interrupt signal CI is output. At this time, address information sent from address register generating circuit RAR executes the program according to the changed contents of match address register MAR as address information of the program correction part by CI. Thus, the specified part of the program is changed as specified.
COPYRIGHT: (C)1981,JPO&Japio
JP17290179A 1979-12-28 1979-12-28 Program correction system Pending JPS5696333A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17290179A JPS5696333A (en) 1979-12-28 1979-12-28 Program correction system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17290179A JPS5696333A (en) 1979-12-28 1979-12-28 Program correction system

Publications (1)

Publication Number Publication Date
JPS5696333A true JPS5696333A (en) 1981-08-04

Family

ID=15950430

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17290179A Pending JPS5696333A (en) 1979-12-28 1979-12-28 Program correction system

Country Status (1)

Country Link
JP (1) JPS5696333A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58109946A (en) * 1981-12-23 1983-06-30 Yamatake Honeywell Co Ltd Debugging method for program

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5144849A (en) * 1974-10-16 1976-04-16 Hitachi Ltd
JPS51121230A (en) * 1975-04-17 1976-10-23 Nec Corp A control memory system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5144849A (en) * 1974-10-16 1976-04-16 Hitachi Ltd
JPS51121230A (en) * 1975-04-17 1976-10-23 Nec Corp A control memory system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58109946A (en) * 1981-12-23 1983-06-30 Yamatake Honeywell Co Ltd Debugging method for program

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