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JPS54530A - Reference control unit of memory - Google Patents

Reference control unit of memory

Info

Publication number
JPS54530A
JPS54530A JP6480077A JP6480077A JPS54530A JP S54530 A JPS54530 A JP S54530A JP 6480077 A JP6480077 A JP 6480077A JP 6480077 A JP6480077 A JP 6480077A JP S54530 A JPS54530 A JP S54530A
Authority
JP
Japan
Prior art keywords
control unit
dma
memory
reference control
transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6480077A
Other languages
Japanese (ja)
Inventor
Yoshinobu Nakatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6480077A priority Critical patent/JPS54530A/en
Publication of JPS54530A publication Critical patent/JPS54530A/en
Pending legal-status Critical Current

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  • Bus Control (AREA)

Abstract

PURPOSE: To execute the transfer of continuous DMA data only with the transfer of byte counter, by intrusing the operation unit for the interruption and restart of DMA, to the DMA control unit started from the operation control unit, in a direct memory control DMA controlling the memory reference of an input and output unit.
COPYRIGHT: (C)1979,JPO&Japio
JP6480077A 1977-06-03 1977-06-03 Reference control unit of memory Pending JPS54530A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6480077A JPS54530A (en) 1977-06-03 1977-06-03 Reference control unit of memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6480077A JPS54530A (en) 1977-06-03 1977-06-03 Reference control unit of memory

Publications (1)

Publication Number Publication Date
JPS54530A true JPS54530A (en) 1979-01-05

Family

ID=13268669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6480077A Pending JPS54530A (en) 1977-06-03 1977-06-03 Reference control unit of memory

Country Status (1)

Country Link
JP (1) JPS54530A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59189435A (en) * 1983-04-13 1984-10-27 Nec Corp Data transfer control device
JPS6041156A (en) * 1983-02-25 1985-03-04 テキサス　インスツルメンツ　インコ−ポレイテツド Non-synchronous controller
JPS623362A (en) * 1985-06-28 1987-01-09 Yokogawa Hewlett Packard Ltd Data reception system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50150333A (en) * 1974-05-22 1975-12-02
JPS50158240A (en) * 1974-06-10 1975-12-22

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50150333A (en) * 1974-05-22 1975-12-02
JPS50158240A (en) * 1974-06-10 1975-12-22

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6041156A (en) * 1983-02-25 1985-03-04 テキサス　インスツルメンツ　インコ−ポレイテツド Non-synchronous controller
JPH0474745B2 (en) * 1983-02-25 1992-11-27
JPS59189435A (en) * 1983-04-13 1984-10-27 Nec Corp Data transfer control device
JPH0133862B2 (en) * 1983-04-13 1989-07-17 Nippon Electric Co
JPS623362A (en) * 1985-06-28 1987-01-09 Yokogawa Hewlett Packard Ltd Data reception system

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