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JPS5643750A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS5643750A
JPS5643750A JP11883679A JP11883679A JPS5643750A JP S5643750 A JPS5643750 A JP S5643750A JP 11883679 A JP11883679 A JP 11883679A JP 11883679 A JP11883679 A JP 11883679A JP S5643750 A JPS5643750 A JP S5643750A
Authority
JP
Japan
Prior art keywords
diode
junction diode
silicon
polycrystalline silicon
reverse direction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11883679A
Other languages
English (en)
Inventor
Yoshihito Amamiya
Takayuki Sugata
Yoshihiko Mizushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP11883679A priority Critical patent/JPS5643750A/ja
Publication of JPS5643750A publication Critical patent/JPS5643750A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/617—Combinations of vertical BJTs and only diodes

Landscapes

  • Static Random-Access Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
JP11883679A 1979-09-18 1979-09-18 Semiconductor integrated circuit Pending JPS5643750A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11883679A JPS5643750A (en) 1979-09-18 1979-09-18 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11883679A JPS5643750A (en) 1979-09-18 1979-09-18 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS5643750A true JPS5643750A (en) 1981-04-22

Family

ID=14746352

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11883679A Pending JPS5643750A (en) 1979-09-18 1979-09-18 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5643750A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01122156A (ja) * 1987-09-30 1989-05-15 Texas Instr Inc <Ti> シヨツトキ技術を用いるスタティック・メモリ・セル及びその製法
JPH01291456A (ja) * 1988-05-19 1989-11-24 Fujitsu Ltd 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01122156A (ja) * 1987-09-30 1989-05-15 Texas Instr Inc <Ti> シヨツトキ技術を用いるスタティック・メモリ・セル及びその製法
JPH01291456A (ja) * 1988-05-19 1989-11-24 Fujitsu Ltd 半導体装置

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