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JPS5633881A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5633881A
JPS5633881A JP10915579A JP10915579A JPS5633881A JP S5633881 A JPS5633881 A JP S5633881A JP 10915579 A JP10915579 A JP 10915579A JP 10915579 A JP10915579 A JP 10915579A JP S5633881 A JPS5633881 A JP S5633881A
Authority
JP
Japan
Prior art keywords
type
layer
saurce
policrystalline
side direction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10915579A
Other languages
Japanese (ja)
Inventor
Noburo Tanimura
Kazuo Yudasaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10915579A priority Critical patent/JPS5633881A/en
Publication of JPS5633881A publication Critical patent/JPS5633881A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]

Landscapes

  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To readily obtain a high gm element by a method wherein an N type decisive impurity is diffused partially from the side direction against a policrystalline silicon layer forming a gate electrode too, and channel length is shortened practically as large as the diffused depth from the side direction. CONSTITUTION:After an N<-> type layer 2 for channel is formd on a P type silicon substrate 1, a thick field SiO2 film 3 is formed to enclose an FET arranged portion. Then, the policrystalline silicon layer 5 and Si3N4 layer 6 are sequently formed after the SiO2 film 4 is formed on the N<-> type layer 2. Next thereto, the hold drilling to reach the N<-> type layer 2 is made at the saurce and the drain forming portion. In the following, while the saurce region 7 and the drain region 8 are formed, the N type decisive impurity is diffused to the policrystalline silicone layer 5 from the side direction to convert the saurce adjacent portion and the drain adjacent portion in the policrystalline silicon layer 5 to the N<+> type region 9a and 9b.
JP10915579A 1979-08-29 1979-08-29 Manufacture of semiconductor device Pending JPS5633881A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10915579A JPS5633881A (en) 1979-08-29 1979-08-29 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10915579A JPS5633881A (en) 1979-08-29 1979-08-29 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5633881A true JPS5633881A (en) 1981-04-04

Family

ID=14503021

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10915579A Pending JPS5633881A (en) 1979-08-29 1979-08-29 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5633881A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6132462A (en) * 1984-07-25 1986-02-15 Hitachi Ltd Manufacturing method of semiconductor device
JPS62162360A (en) * 1986-01-13 1987-07-18 Hitachi Ltd Manufacturing method of semiconductor device
JPS6442854A (en) * 1987-08-10 1989-02-15 Toshiba Corp Manufacture of semiconductor device
US4811066A (en) * 1987-10-19 1989-03-07 Motorola, Inc. Compact multi-state ROM cell
US5510648A (en) * 1994-01-04 1996-04-23 Motorola, Inc. Insulated gate semiconductor device and method of fabricating
US5541132A (en) * 1995-03-21 1996-07-30 Motorola, Inc. Insulated gate semiconductor device and method of manufacture
US5612244A (en) * 1995-03-21 1997-03-18 Motorola, Inc. Insulated gate semiconductor device having a cavity under a portion of a gate structure and method of manufacture
US5661048A (en) * 1995-03-21 1997-08-26 Motorola, Inc. Method of making an insulated gate semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5122348A (en) * 1974-08-20 1976-02-23 Hitachi Ltd JOHOSHORISOCHI
JPS52123879A (en) * 1976-04-09 1977-10-18 Matsushita Electric Ind Co Ltd Mos type semiconductor device and its production

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5122348A (en) * 1974-08-20 1976-02-23 Hitachi Ltd JOHOSHORISOCHI
JPS52123879A (en) * 1976-04-09 1977-10-18 Matsushita Electric Ind Co Ltd Mos type semiconductor device and its production

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6132462A (en) * 1984-07-25 1986-02-15 Hitachi Ltd Manufacturing method of semiconductor device
JPS62162360A (en) * 1986-01-13 1987-07-18 Hitachi Ltd Manufacturing method of semiconductor device
JPS6442854A (en) * 1987-08-10 1989-02-15 Toshiba Corp Manufacture of semiconductor device
US4811066A (en) * 1987-10-19 1989-03-07 Motorola, Inc. Compact multi-state ROM cell
US5510648A (en) * 1994-01-04 1996-04-23 Motorola, Inc. Insulated gate semiconductor device and method of fabricating
US5541132A (en) * 1995-03-21 1996-07-30 Motorola, Inc. Insulated gate semiconductor device and method of manufacture
US5612244A (en) * 1995-03-21 1997-03-18 Motorola, Inc. Insulated gate semiconductor device having a cavity under a portion of a gate structure and method of manufacture
US5661048A (en) * 1995-03-21 1997-08-26 Motorola, Inc. Method of making an insulated gate semiconductor device

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