JPS56137630A - Pattern forming - Google Patents
Pattern formingInfo
- Publication number
- JPS56137630A JPS56137630A JP4089780A JP4089780A JPS56137630A JP S56137630 A JPS56137630 A JP S56137630A JP 4089780 A JP4089780 A JP 4089780A JP 4089780 A JP4089780 A JP 4089780A JP S56137630 A JPS56137630 A JP S56137630A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- space
- resist
- exposure
- create
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000463 material Substances 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Bipolar Transistors (AREA)
- Weting (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4089780A JPS56137630A (en) | 1980-03-28 | 1980-03-28 | Pattern forming |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4089780A JPS56137630A (en) | 1980-03-28 | 1980-03-28 | Pattern forming |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56137630A true JPS56137630A (en) | 1981-10-27 |
JPH0117247B2 JPH0117247B2 (ja) | 1989-03-29 |
Family
ID=12593295
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4089780A Granted JPS56137630A (en) | 1980-03-28 | 1980-03-28 | Pattern forming |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56137630A (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005252165A (ja) * | 2004-03-08 | 2005-09-15 | Semiconductor Leading Edge Technologies Inc | パターン形成方法 |
JP2007258419A (ja) * | 2006-03-23 | 2007-10-04 | Toppan Printing Co Ltd | インプリント用モールドの製造方法 |
-
1980
- 1980-03-28 JP JP4089780A patent/JPS56137630A/ja active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005252165A (ja) * | 2004-03-08 | 2005-09-15 | Semiconductor Leading Edge Technologies Inc | パターン形成方法 |
JP4480424B2 (ja) * | 2004-03-08 | 2010-06-16 | 富士通マイクロエレクトロニクス株式会社 | パターン形成方法 |
JP2007258419A (ja) * | 2006-03-23 | 2007-10-04 | Toppan Printing Co Ltd | インプリント用モールドの製造方法 |
Also Published As
Publication number | Publication date |
---|---|
JPH0117247B2 (ja) | 1989-03-29 |
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