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JPS56137627A - Pattern forming - Google Patents

Pattern forming

Info

Publication number
JPS56137627A
JPS56137627A JP4089180A JP4089180A JPS56137627A JP S56137627 A JPS56137627 A JP S56137627A JP 4089180 A JP4089180 A JP 4089180A JP 4089180 A JP4089180 A JP 4089180A JP S56137627 A JPS56137627 A JP S56137627A
Authority
JP
Japan
Prior art keywords
pattern
space
line
mask
resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4089180A
Other languages
Japanese (ja)
Other versions
JPS6310889B2 (en
Inventor
Masaki Ito
Sotaro Edokoro
Hiroshi Gokan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4089180A priority Critical patent/JPS56137627A/en
Publication of JPS56137627A publication Critical patent/JPS56137627A/en
Publication of JPS6310889B2 publication Critical patent/JPS6310889B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To obtain a microlinear width pattern by overlapping the second pattern where pellets are aligned at an iterative pitch which is odd-number multiple as much as the repetitive period of the first pattern, on the latter of line and space. CONSTITUTION:The first pattern of line and space is created on a resist 3 provided on a sample 1 and then is applied with another resgist 11 on the former with a coat of an exposure mask 61 finally applied on the resist 11. The mask has plural pellets 62, 63 in such manner that the same types of pattern 64, 65 are formed. This pattern is iterated at a pitch of l when half the repetitive period of line and space of the first pattern is represented by l (2n-1). If a sample is etched by means of masks 3, 11 after a rotary deviation of the mask 61 pattern and the first pattern was removed and they were exposed and developed, a good-quality product like a chip 66 and an inferior-quality product like a chip 67 are obtained at a fifty-fifty ratio. Under this constitution, it is possible to form a pattern with satisfactory linear width assuring good-quality products accounting for half the chips in a wafer only by correcting a deviation of rotation.
JP4089180A 1980-03-28 1980-03-28 Pattern forming Granted JPS56137627A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4089180A JPS56137627A (en) 1980-03-28 1980-03-28 Pattern forming

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4089180A JPS56137627A (en) 1980-03-28 1980-03-28 Pattern forming

Publications (2)

Publication Number Publication Date
JPS56137627A true JPS56137627A (en) 1981-10-27
JPS6310889B2 JPS6310889B2 (en) 1988-03-10

Family

ID=12593129

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4089180A Granted JPS56137627A (en) 1980-03-28 1980-03-28 Pattern forming

Country Status (1)

Country Link
JP (1) JPS56137627A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005294822A (en) * 2004-03-16 2005-10-20 Interuniv Micro Electronica Centrum Vzw Semiconductor device manufacturing method and semiconductor structure
JP2013533611A (en) * 2010-06-01 2013-08-22 コミシリア ア レネルジ アトミック エ オ エナジーズ オルタネティヴズ Lithographic method for doubling the pitch
EP2946401A2 (en) * 2013-01-18 2015-11-25 Commissariat à l'Énergie Atomique et aux Énergies Alternatives Method for producing a leadframe on a substrate by means of block copolymers

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005294822A (en) * 2004-03-16 2005-10-20 Interuniv Micro Electronica Centrum Vzw Semiconductor device manufacturing method and semiconductor structure
JP4583980B2 (en) * 2004-03-16 2010-11-17 アイメック Semiconductor device manufacturing method and semiconductor structure
JP2013533611A (en) * 2010-06-01 2013-08-22 コミシリア ア レネルジ アトミック エ オ エナジーズ オルタネティヴズ Lithographic method for doubling the pitch
EP2946401A2 (en) * 2013-01-18 2015-11-25 Commissariat à l'Énergie Atomique et aux Énergies Alternatives Method for producing a leadframe on a substrate by means of block copolymers

Also Published As

Publication number Publication date
JPS6310889B2 (en) 1988-03-10

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