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JPS56129940A - Processor for communication control - Google Patents

Processor for communication control

Info

Publication number
JPS56129940A
JPS56129940A JP3220880A JP3220880A JPS56129940A JP S56129940 A JPS56129940 A JP S56129940A JP 3220880 A JP3220880 A JP 3220880A JP 3220880 A JP3220880 A JP 3220880A JP S56129940 A JPS56129940 A JP S56129940A
Authority
JP
Japan
Prior art keywords
control
circuit
pushup
instruction
storing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3220880A
Other languages
Japanese (ja)
Inventor
Masao Sato
Fumio Hoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3220880A priority Critical patent/JPS56129940A/en
Publication of JPS56129940A publication Critical patent/JPS56129940A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To simplify the hardware, by providing the address production address register AR reading out the control program from the read only storage ROS, address advance circuit HC and instruction pushup control circuit and the like. CONSTITUTION:The communication control processor 1 consists of the operation program (PR), MS2 storing the control PR and others, read only ROS3 storing the control PR, ROS control circuit 4 transferring the content of ROS3 to MS2 and storing it, and instruction pushup circuit 8 which executes the control PR of MS2, and instruction pushup circuit 8 which executes the control PR of MS2, transfers and stores the operation PR to MS2 from the computer 1a, and executes and controls the operation PR. The circuit 8 consists of the AR storing the address of MS2, ROS3, HC advancing AR, instruction pushup control circuit 5 which sets the address to AR and advances it, and controls write-in/readout of MS2, pushup buffer storing the content of readout of MS2, and processing section 7 judging the content of instruction of operation and control PR and controlling the circuits 4 and 5.
JP3220880A 1980-03-14 1980-03-14 Processor for communication control Pending JPS56129940A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3220880A JPS56129940A (en) 1980-03-14 1980-03-14 Processor for communication control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3220880A JPS56129940A (en) 1980-03-14 1980-03-14 Processor for communication control

Publications (1)

Publication Number Publication Date
JPS56129940A true JPS56129940A (en) 1981-10-12

Family

ID=12352483

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3220880A Pending JPS56129940A (en) 1980-03-14 1980-03-14 Processor for communication control

Country Status (1)

Country Link
JP (1) JPS56129940A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6097439A (en) * 1983-11-02 1985-05-31 Oki Electric Ind Co Ltd Microprocessor circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6097439A (en) * 1983-11-02 1985-05-31 Oki Electric Ind Co Ltd Microprocessor circuit

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