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JPS555575A - Logic circuit - Google Patents

Logic circuit

Info

Publication number
JPS555575A
JPS555575A JP7932578A JP7932578A JPS555575A JP S555575 A JPS555575 A JP S555575A JP 7932578 A JP7932578 A JP 7932578A JP 7932578 A JP7932578 A JP 7932578A JP S555575 A JPS555575 A JP S555575A
Authority
JP
Japan
Prior art keywords
terminal
transistors
high level
input
bases
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7932578A
Other languages
Japanese (ja)
Inventor
Shizuo Inohara
Mitsuya Masuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP7932578A priority Critical patent/JPS555575A/en
Publication of JPS555575A publication Critical patent/JPS555575A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
    • H03K19/212—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using bipolar transistors

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To constitute the exclusive logical sum circuit with less number of elements, by constituting the input terminal through the connection of the bases and emitters respectively of two transistors. CONSTITUTION:The bases and the emitters of the transistors 8 and 9 are connected each other to constitute the input terminals A and B, and the collectors of the bith transistors are grounded via the resistor 10 and also they are taken as the output terminal X. In this case, the transistor 8 turns on when the input terminal A is at high level ''1'' and the input terminal B is at low level ''0'', and the output terminal X is at high level ''1''. The transistor 9 is turned on when the terminal A is at ''0'' and the terminal B is at ''1'' to cause the terminal X as high level ''1''. When the terminals A and b are both ''0'' or both ''1'', the both transistors are OFF to cause the terminal X at ''0''. Thus, the exclusive logical sum circuit (EX-OR) is constituted. Further, if grounding is changed to power supply terminal, EX-NOR circuit can be obtained.
JP7932578A 1978-06-29 1978-06-29 Logic circuit Pending JPS555575A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7932578A JPS555575A (en) 1978-06-29 1978-06-29 Logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7932578A JPS555575A (en) 1978-06-29 1978-06-29 Logic circuit

Publications (1)

Publication Number Publication Date
JPS555575A true JPS555575A (en) 1980-01-16

Family

ID=13686721

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7932578A Pending JPS555575A (en) 1978-06-29 1978-06-29 Logic circuit

Country Status (1)

Country Link
JP (1) JPS555575A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19709187C1 (en) * 1997-03-06 1998-08-20 Siemens Ag High pulsed driver signal phase inversion circuit for vehicle immobiliser

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19709187C1 (en) * 1997-03-06 1998-08-20 Siemens Ag High pulsed driver signal phase inversion circuit for vehicle immobiliser

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