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JPS55156335A - Semiconductor device and its manufacture - Google Patents

Semiconductor device and its manufacture

Info

Publication number
JPS55156335A
JPS55156335A JP6325279A JP6325279A JPS55156335A JP S55156335 A JPS55156335 A JP S55156335A JP 6325279 A JP6325279 A JP 6325279A JP 6325279 A JP6325279 A JP 6325279A JP S55156335 A JPS55156335 A JP S55156335A
Authority
JP
Japan
Prior art keywords
substrate
regions
type
region
porous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6325279A
Other languages
Japanese (ja)
Other versions
JPS5741823B2 (en
Inventor
Kazuo Imai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP6325279A priority Critical patent/JPS55156335A/en
Priority to GB7934894A priority patent/GB2038548B/en
Priority to CA337,192A priority patent/CA1130014A/en
Priority to NL7907715A priority patent/NL7907715A/en
Priority to DE2943435A priority patent/DE2943435C2/en
Priority to FR7926657A priority patent/FR2440080A1/en
Publication of JPS55156335A publication Critical patent/JPS55156335A/en
Priority to US06/329,759 priority patent/US4393577A/en
Publication of JPS5741823B2 publication Critical patent/JPS5741823B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/7627—Vertical isolation by full isolation by porous oxide silicon, i.e. FIPOS techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76281—Lateral isolation by selective oxidation of silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Thin Film Transistor (AREA)

Abstract

PURPOSE:To reduce the floating capacity and make the separation between elements easier for a semiconductor device by a methos wherein P-type and N-type regions are formed in the surface layer of a P-type monocrystal Si substrate and then side and bottom surfaces of these regions are surrounded with porous SiO2 layers obtained by oxidizing polycritical Si. CONSTITUTION:In a main surface layer 5 of a P-type Si substrate 1 N-type regions 20 and 21 are formed by ion implantation or diffusion, and then electrochemical reaction is appplied on the substrate 1 in a solution of hydrofluoric acid to prduce porous Si regions 22 in the substrate 1 under the condition that the substrate 1 is used as the anode. On this occasion, to prevent an anode forming current from passing into the regions 20 and 21, the level of the forming voltage is selected to a value not higher than the diffusion voltage of PN-junctions between the substrate 1 and the regions 20, 21. In such a manner, the reaction is continued until most parts of the substrate 1 is changed into the porous Si resion 22 while surrounding the regions 20 and 21. One region 20 is transformed into a P-type region 24 by ion implantation and this region 24 and the other region 21 are covered with SiO2 films 25 and 26, respectively.
JP6325279A 1978-10-27 1979-05-24 Semiconductor device and its manufacture Granted JPS55156335A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP6325279A JPS55156335A (en) 1979-05-24 1979-05-24 Semiconductor device and its manufacture
GB7934894A GB2038548B (en) 1978-10-27 1979-10-08 Isolating semiconductor device by porous silicon oxide
CA337,192A CA1130014A (en) 1978-10-27 1979-10-09 Semiconductor devices and method of manufacturing the same
NL7907715A NL7907715A (en) 1978-10-27 1979-10-19 SEMICONDUCTOR DEVICES AND METHOD FOR MANUFACTURING THEM.
DE2943435A DE2943435C2 (en) 1978-10-27 1979-10-26 Semiconductor structure and process for its manufacture
FR7926657A FR2440080A1 (en) 1978-10-27 1979-10-26 SEMICONDUCTOR DEVICES AND METHOD FOR MANUFACTURING A SEMICONDUCTOR COMPRISING POROUS SILICON REGIONS MADE BY ANODINATION
US06/329,759 US4393577A (en) 1978-10-27 1981-12-11 Semiconductor devices and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6325279A JPS55156335A (en) 1979-05-24 1979-05-24 Semiconductor device and its manufacture

Publications (2)

Publication Number Publication Date
JPS55156335A true JPS55156335A (en) 1980-12-05
JPS5741823B2 JPS5741823B2 (en) 1982-09-04

Family

ID=13223867

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6325279A Granted JPS55156335A (en) 1978-10-27 1979-05-24 Semiconductor device and its manufacture

Country Status (1)

Country Link
JP (1) JPS55156335A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55162240A (en) * 1979-06-04 1980-12-17 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and its manufacture
JPS57107049A (en) * 1980-12-25 1982-07-03 Seiko Epson Corp Semiconductor device
KR100466224B1 (en) * 2001-01-09 2005-01-13 텔레포스 주식회사 Fabrication method of base substrate for mounting semiconductor chip

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120281A (en) * 1974-03-05 1975-09-20
JPS51278A (en) * 1974-06-18 1976-01-05 Matsushita Electric Ind Co Ltd HANDOTAISHUSEKIKAIROKITAINO SEIZOHOHO
JPS5559735A (en) * 1978-10-27 1980-05-06 Nippon Telegr & Teleph Corp <Ntt> Substrate body for semiconductor integrated circuit and its preparation
JPS5559736A (en) * 1978-10-27 1980-05-06 Nippon Telegr & Teleph Corp <Ntt> Substrate body for semiconductor integrated circuit and its preparation

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120281A (en) * 1974-03-05 1975-09-20
JPS51278A (en) * 1974-06-18 1976-01-05 Matsushita Electric Ind Co Ltd HANDOTAISHUSEKIKAIROKITAINO SEIZOHOHO
JPS5559735A (en) * 1978-10-27 1980-05-06 Nippon Telegr & Teleph Corp <Ntt> Substrate body for semiconductor integrated circuit and its preparation
JPS5559736A (en) * 1978-10-27 1980-05-06 Nippon Telegr & Teleph Corp <Ntt> Substrate body for semiconductor integrated circuit and its preparation

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55162240A (en) * 1979-06-04 1980-12-17 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and its manufacture
JPS5741824B2 (en) * 1979-06-04 1982-09-04
JPS57107049A (en) * 1980-12-25 1982-07-03 Seiko Epson Corp Semiconductor device
KR100466224B1 (en) * 2001-01-09 2005-01-13 텔레포스 주식회사 Fabrication method of base substrate for mounting semiconductor chip

Also Published As

Publication number Publication date
JPS5741823B2 (en) 1982-09-04

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