JPH1187321A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve etching selectivity with a photoresist mask and a conductive film for a wiring pattern and to easily remove the photoresist mask. SOLUTION: Formed on a surface of a semiconductor substrate 1 is an insulating film 2, on which a conductive film 20 is formed. Formed on the conductive film 20 is a first photoresist film 7, on which a second photoresist film 8 which has lower exposure sensitivity than that of the first film 7. A photoresist mask 9 is formed narrower at its root parts by an optical aligning step and a developing step. The photoresist mask 9 is subjected to an ion implantation process from a direction vertical with respect to the substrate 1 to form a hardened layer 10 on the mask 9 other than a sidewall surface 14 of the first film 7. The mask 9 is used to etch a conductive film 20.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device for forming a wiring pattern on a substrate such as a silicon semiconductor substrate.

[0002]

2. Description of the Related Art Along with higher performance and higher integration of semiconductor integrated circuits, wiring pitches have been reduced and wiring layers have been multi-layered. Due to the increase in the number of wiring layers, unevenness occurs in the interlayer insulating film. In order to flatten this unevenness, CMP
Technologies such as (Chemical Mechanical Polishing) have been put to practical use. However, even if this planarization technique is used, the unevenness remains in the interlayer insulating film.

On the other hand, in order to cope with miniaturization of the wiring pitch, the depth of focus of a stepper used in a photolithography process is becoming shallower. Therefore, in order to obtain a sufficient focus margin, the thickness of the photoresist film is reduced.

In order to form a wiring pattern,
Etching such as plasma etching is performed on the conductive film using a photoresist mask formed on the conductive film made of Al or the like. By the way, in the current metal etcher used for mass production, the etching selectivity between the conductive film made of Al or the like and the photoresist mask is about 2 and when etching is performed when the etching selectivity is about 2, The thickness ratio between the conductor film and the photoresist mask is larger than 2. However, when the wiring pitch is reduced to a level of less than half a micron, the thickness ratio of the conductive film to the photoresist mask has to be reduced to less than 2 due to the thinning of the photoresist film. This is because it is not possible to reduce the thickness of the Al film while keeping the ratio with the resist film thickness constant in order to maintain low resistance and electromigration resistance of the wiring.

[0005] In such a thinned photoresist mask, a portion of the photoresist mask disappears due to etching due to a low selectivity to a commonly used chlorine-based gas, and disconnection of wiring may occur. And the etched shape is damaged. If the over-etching time is shortened in order to avoid such a problem, an etching residue is generated and a short circuit occurs between wirings.

In order to solve the above-mentioned problem, a technique for improving the etching selectivity between an aluminum alloy and a photoresist mask by forming a hardened layer on the top and side surfaces of the photoresist mask by ion implantation into the photoresist mask has been proposed.
“Resist modification using ion implantation” (IEICE Technical Report SD)
M95-109, 1995-08). Further, after forming the photoresist mask, ion irradiation of a silicon-containing compound or a fluorine compound is performed to form a silylated or fluoridated layer having high reactive ion etching resistance on the top surface and the side surface of the photoresist mask. A forming technique is proposed in JP-A-8-31720.

In these techniques, the surface of the photoresist mask is modified by ion implantation into the photoresist mask, and a hardened layer is formed on the surface of the photoresist mask. As a result, the etching selectivity between the conductor film forming the wiring and the photoresist mask surface is improved,
The thinning of the photoresist film realizes a finer wiring pitch, and also prevents the occurrence of electrical problems such as disconnection as described above.

[0008]

However, as described in the above-mentioned document, the hardened layer formed on the surface of the photoresist mask has a layered graphite structure (SP ² bond) and a diamond structure (SP ³ bond). Is presumed to have a mixed structure, so that the adhesion at the interface between the cured layer and the conductive film is strong. Therefore, the photoresist mask cannot be completely removed by ordinary ashing or an amine-based stripping solution, and a cured layer may remain on the wiring. The presence of the resist residue in the wiring portion may cause a problem of a contact failure or a decrease in long-term reliability.

An object of the present invention is to provide a method of manufacturing a semiconductor device capable of improving the etching selectivity between a wiring pattern conductive film and a photoresist mask and easily removing the photoresist mask. .

[0010]

According to a method of manufacturing a semiconductor device of the present invention, a conductor film is formed on a semiconductor substrate, a photoresist film is formed on the conductor film, and the photoresist film is patterned. After forming a photoresist mask for forming a wiring pattern, ion-implanting the photoresist mask from the surface side of the semiconductor substrate and forming a cured layer on the surface of the photoresist mask other than near the interface with the conductor film And etching the conductive film.

According to the above-described structure, since a hardened layer having strong adhesion to the conductor film is not formed on the surface of the photoresist mask near the interface with the conductor film, the photoresist is etched after the conductor film is etched. The mask can be easily removed, and defective contact or long-term reliability reduction can be prevented. On the other hand, since the cured layer is formed on the surface of the photoresist mask other than near the interface with the conductor film, the etching selectivity between the conductor film and the photoresist mask can be improved. Therefore, the photoresist film constituting the photoresist mask can be made thinner to make the wiring pitch finer, and the occurrence of electrical problems such as disconnection of the conductor wiring can be prevented.

It is preferable that the photoresist film has a multilayer structure in which the exposure sensitivity of the lower layer is higher than that of the upper layer.

According to the above-described structure, the lower photoresist film has a higher sensitivity to exposure than the upper photoresist film. The photoresist film can be patterned. Therefore, since the ion-implanted atoms are blocked by the upper surface, the ion-implanted atoms do not reach near the thinned interface, and no hardened layer is formed near the interface. This can easily prevent a cured layer from being formed on the photoresist mask surface near the interface.

The photoresist mask may be exposed, developed and patterned into a shape required for forming a wiring pattern, and may be formed to be thinner at least in the vicinity of the interface with the conductor film than in other portions. Therefore, the photoresist mask may have a shape that is smaller in the vicinity of the interface than in the upper surface portion, or in a shape that is smaller in the vicinity of the interface than the middle portion.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view showing an embodiment according to a semiconductor manufacturing method of the present invention.

As shown in FIG. 1A, a boron-phosphosilicate glass (BPSG) film and a nitrided silicate glass (NSG) film are laminated on a semiconductor substrate 1 such as a silicon semiconductor substrate by a CVD method. Thereby, an insulating film 2 is formed. A thickness of 30 is formed on the insulating film 2 by sputtering.
nm Ti layer 3, 50 nm thick TiN layer 4, thickness 50
0 nm AlSiCu layer 5, 40 nm thick TiN layer 6
Are formed in this order to form a conductor film 20 having a multilayer structure. By forming the conductive film 20 in a multilayer structure, the conductive film 2
The electromigration resistance of No. 0 is improved. The insulating film 2 may be made of a similar material as long as the material maintains the insulating property of the conductor film 20.

Subsequently, as shown in FIG. 1B, a first photoresist film 7 having a thickness of 0.3 μm is applied on the conductor film 20, and a first photoresist film 7 is formed on the first photoresist film 7. Thickness 0.8 lower in sensitivity to exposure than the photoresist film 7
A μm second photoresist film 8 is applied. Then, the first photoresist film 7 and the second photoresist film 8 are
Prebake at a temperature of 0 ° C.

Next, as shown in FIG. 1C, the line and space have a wiring width of 0.4 μm / space of 0.4 μm.
Exposure and development steps are performed so that the photoresist mask 9 is formed. In this case, since the first photoresist film 7 has a higher sensitivity to exposure than the second photoresist film 8, the resist pattern of the first photoresist film 7 is higher than that of the second photoresist film 8. It is formed thinner. Thus, the photoresist mask 9 is formed such that the portion near the interface of the conductor film 20 is thinner than the upper surface portion side, as shown in the figure.

As is well known, the photoresist mask has various conditions such as the illumination method and exposure amount, the type and thickness of the selected resist, heat treatment before and after development, and the reflectance of the underlying conductive film 20. The photoresist mask 9
Finished dimensions and shapes will differ. Although there are these various parameters, a method of relatively easily narrowing the resist pattern of the photoresist mask 9 near the conductive film 20 is described in the two-layer resist comprising the first photoresist film 7 and the second photoresist film 8 described above. It is a method using. That is, in the two-layer resist, two resist films having different components (mainly, the amount of the photosensitive agent added) may be used. The illumination method and the heat treatment before and after the development are performed under the conditions used for a normal single-layer resist, by taking into account the combination of the film thickness configuration of the first photoresist film 7 and the second photoresist film 8 and the exposure amount. The photoresist mask 9 can be obtained in a desired shape.

As shown in FIG. 1D, As (arsenic) is implanted at a dose of 5 × 10 ¹⁵ cm ^-2 and an implantation energy of 70 keV.
Under the conditions described above, ions are implanted from the vertical direction of the surface of the semiconductor substrate 1 to form a hardened layer on the upper surface 12 of the photoresist mask 9 and the side walls 13 of the second photoresist film 8. Since the ion implantation is performed from the direction perpendicular to the substrate surface of the semiconductor substrate 1, the side wall 13 of the second photoresist film 8 blocks the ion implantation to the side wall 14 of the first photoresist film 7, and the side wall of the first photoresist film 7 is formed. No ion implantation is performed on 14.
As a result, a hardened layer is not formed at the interface between the photoresist mask 9 and the conductor film 20, and the adhesion at the interface between the photoresist mask 9 and the conductor film 20 does not change.

The conditions for the above-described ion implantation may be a dose of 1 × 10 ¹⁵ to 1 × 10 ¹⁶ cm ⁻² .
The implantation energy may be 70 to 150 keV. Further, the ion species to be implanted is not limited to arsenic.
(Phosphorus), B (boron), Si (silicon), F (fluorine), Ar (argon) and the like may be used as long as they are used in a normal semiconductor manufacturing process.

Next, as shown in FIG.
(Electron Cyclotron Resonance) The conductive film 20 is etched with a mixed gas of Cl _2, BCl ₃ , and CHF ₃ using a plasma etching apparatus. At this time, the sidewall protection film 11 is formed on the side surface of the etched conductor film 20 by using CHF ₃ and a photoresist material, and anisotropic etching is performed to maintain the verticality of the conductor film 20. Dripping. The cured layer 1 on the upper surface 12 of the photoresist mask 9 is formed by the anisotropic etching.
0 is removed, and the side wall 13 remains in a convex shape as shown in the figure due to the difference between the inner portion of the photoresist mask 9 and the hardened layer 10 of the side wall 13 and the etching rate. The height of the convex side wall 13 is determined by the conditions for ion implantation into the photoresist mask 9, the ion species, the etching time according to the thickness of the conductor film 20, and the like. As mentioned above,
By forming a hardened layer not only on the upper surface portion 12 of the photoresist mask 9 but also on the side wall 13, the mask shape can be reliably maintained until the etching is completed.

After completion of the etching, O _{2 is} exposed to the atmosphere without opening to the atmosphere in order to prevent the corrosion of Al constituting the conductor film 20 due to Cl (chlorine) attached to the surface portion of the conductor film 20 and the photoresist mask 9. and performing photoresist ashing gas mixture of CH ₃ OH. As a result, the photoresist mask 9 is removed. However, it is presumed that the hardened layer 10 on the side wall 13 is accompanied by a layered graphite structure and a diamond structure. Therefore, as shown in FIG.
3 cannot be removed, and the cured layer 10 adheres as a residual cured layer 15 on the substrate and the wiring.

Next, the side wall protective film 11 is removed by a spray type cleaning device (not shown) using an amine-based stripping solution. In this case, the remaining cured layer 1 on the substrate and the wiring
5 is not formed in the vicinity of the interface with the conductor film 20, and therefore has a relatively small adhesive force, and can be easily removed by a cleaning effect using an amine-based stripping solution.

As described above, the ion-implanted atoms do not reach the side wall 14 of the first photoresist film 7 of the photoresist mask 9 and the cured layer 10 is not formed. The adhesion at the interface with 20 does not improve. Therefore, the photoresist mask 9 can be completely removed by the photoresist ashing and the cleaning effect by the amine-based stripping solution as described above. Thereby, it is possible to prevent a contact failure and a decrease in long-term reliability due to the remaining photoresist.

In this embodiment described above, photoresist films having different sensitivities to exposure are laminated so that atoms by ion implantation do not reach the vicinity of the interface, and the photoresist mask 9 is formed so that the vicinity of the interface becomes thin. I do.
Further, the hardened layer 10 is prevented from being formed on the surface of the photoresist mask 9 near the interface with the conductor film 20.

In the present embodiment, the two-layer photoresist mask 9 composed of the first photoresist film 7 and the second photoresist film 8 is formed, but the lower photoresist film is formed on the upper photoresist film. If the photoresist mask 9 is formed so as to have a higher sensitivity to exposure than the resist film, the photoresist mask 9 may be formed of a photoresist film having three or more layers.

[0028]

According to the above-mentioned invention, since a hardened layer having a strong adhesion to the conductor film is not formed on the surface of the photoresist mask near the interface with the conductor film, the photoresist mask can be completely removed. As a result, it is possible to prevent a contact failure or a decrease in long-term reliability. In addition, since a hardened layer is formed on the surface of the photoresist mask, the photoresist film can be thinned, the wiring pitch can be reduced, and electrical problems such as disconnection of the conductor wiring occur. Can also be prevented.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing an embodiment according to a method for manufacturing a semiconductor device of the present invention.

[Explanation of symbols]

 Reference Signs List 1 semiconductor substrate 7 first photoresist film 8 second photoresist film 9 photoresist mask 10 cured layer 20 conductor film

Claims (2)

[Claims] A conductive film is formed on a semiconductor substrate; a photoresist film is formed on the conductive film; and the photoresist film is patterned to form a photoresist mask for forming a wiring pattern. A semiconductor device, comprising: ion-implanting the photoresist mask from the surface side of a substrate to form a cured layer on the surface of the photoresist mask other than near the interface with the conductor film, and then etching the conductor film. Manufacturing method. 2. The method according to claim 1, wherein the photoresist film has a multilayer structure in which the lower layer has a higher exposure sensitivity than the upper layer.