JPH04369623A - Active matrix type liquid crystal display device - Google Patents
Active matrix type liquid crystal display deviceInfo
- Publication number
- JPH04369623A JPH04369623A JP3146428A JP14642891A JPH04369623A JP H04369623 A JPH04369623 A JP H04369623A JP 3146428 A JP3146428 A JP 3146428A JP 14642891 A JP14642891 A JP 14642891A JP H04369623 A JPH04369623 A JP H04369623A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- liquid crystal
- gate
- crystal display
- display device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 36
- 239000011159 matrix material Substances 0.000 title claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 44
- 239000000463 material Substances 0.000 claims abstract description 7
- 239000010409 thin film Substances 0.000 claims abstract description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 9
- 238000000034 method Methods 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 25
- 239000004065 semiconductor Substances 0.000 description 10
- 230000001681 protective effect Effects 0.000 description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 125000006850 spacer group Chemical group 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000003487 electrochemical reaction Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
【0001】0001
【産業上の利用分野】この発明は、スイッチ素子として
薄膜トランジスタ(以下、TFTと略称)を用いたアク
ティブマトリクス型液晶表示装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix liquid crystal display device using thin film transistors (hereinafter abbreviated as TFTs) as switching elements.
【0002】0002
【従来の技術】一般に、液晶表示装置はテレビジョン表
示やグラフィックディスプレイ等に用いられ、大容量で
高精細のアクティブマトリクス型液晶表示装置の開発、
実用化が盛んになっている。そして、この種の液晶表示
装置では、クロスト−クのない高コントラストの表示が
行なえるように、各画素の駆動・制御を行なう手段とし
て半導体スイッチが用いられている。[Prior Art] Generally, liquid crystal display devices are used for television displays, graphic displays, etc., and the development of large-capacity, high-definition active matrix type liquid crystal display devices.
Practical applications are increasing. In this type of liquid crystal display device, semiconductor switches are used as means for driving and controlling each pixel so that high contrast display without crosstalk can be achieved.
【0003】この半導体スイッチとしては、透過型の表
示が可能で大面積化も容易なTFTが多く用いられ、図
3はTFTのアレイを用いた従来のアクティブマトリク
ス型液晶表示装置の断面図であり、図4のIII−II
I部に相当する断面を示しており、図4は図3における
第1の基板の一部の平面図である。TFTs are often used as semiconductor switches because they are capable of transmissive display and can easily be made to have a large area. FIG. 3 is a cross-sectional view of a conventional active matrix liquid crystal display device using an array of TFTs. , III-II in Fig. 4
4 shows a cross section corresponding to part I, and FIG. 4 is a plan view of a part of the first substrate in FIG. 3.
【0004】図中の符号11は第1の基板であり、この
第1の基板11は例えば透明ガラスからなる絶縁性基板
12上にゲ−ト線13、このゲ−ト線13と一体のゲ−
ト電極14が形成され、これらゲ−ト線13、ゲ−ト電
極14を覆うように絶縁膜16が形成されている。更に
、この絶縁膜16上の所定位置に、例えばアモルファス
・シリコンによる半導体層17が形成されると共に、他
の所定位置に透明画素電極18が形成されている。Reference numeral 11 in the figure is a first substrate, and this first substrate 11 has a gate line 13 on an insulating substrate 12 made of, for example, transparent glass, and a gate integrated with the gate line 13. −
A gate electrode 14 is formed, and an insulating film 16 is formed to cover the gate line 13 and gate electrode 14. Furthermore, a semiconductor layer 17 made of, for example, amorphous silicon is formed at a predetermined position on this insulating film 16, and a transparent pixel electrode 18 is formed at another predetermined position.
【0005】又、絶縁膜16上にゲ−ト線13と交差す
る例えばアルミニウムからなるデ−タ線19、このデ−
タ線19と一体で半導体層17上に位置するドレイン電
極20、このドレイン電極20と対向して半導体層17
と透明画素電極18とを接続する例えばアルミニウムか
らなるソ−ス電極21が形成されている。Further, a data line 19 made of aluminum, for example, which intersects with the gate line 13 on the insulating film 16, is formed.
a drain electrode 20 that is integrated with the tangent wire 19 and located on the semiconductor layer 17;
A source electrode 21 made of aluminum, for example, is formed to connect the transparent pixel electrode 18 and the transparent pixel electrode 18 .
【0006】上記のように各素子を配置した絶縁性基板
12上の所定の位置に、絶縁性の保護膜22が形成され
、更にこの上面の全領域に液晶配向膜23が形成されて
いる。 このようにして、第1の基板11が形成され
ていると共に、この第1の基板11にゲ−ト電極14、
半導体層17、ドレイン電極20、ソ−ス電極21から
なるTFT24が形成されている。[0006] An insulating protective film 22 is formed at a predetermined position on the insulating substrate 12 on which each element is arranged as described above, and a liquid crystal alignment film 23 is further formed over the entire upper surface of this film. In this way, the first substrate 11 is formed, and the gate electrode 14,
A TFT 24 consisting of a semiconductor layer 17, a drain electrode 20, and a source electrode 21 is formed.
【0007】一方、第2の基板31は、例えばガラスか
らなる絶縁性基板32上に透明対向電極33および液晶
配向膜34が順次形成されている。そして、第1の基板
11と第2の基板31とは6μm程度の間隙を保って周
辺部が封着され、更にこの間隙内に液晶41が封入挾持
されている。On the other hand, the second substrate 31 has a transparent counter electrode 33 and a liquid crystal alignment film 34 formed in this order on an insulating substrate 32 made of glass, for example. The peripheral portions of the first substrate 11 and the second substrate 31 are sealed with a gap of about 6 μm maintained, and a liquid crystal 41 is sealed and held in this gap.
【0008】図5は上記液晶表示装置の等価回路を示し
ている。即ち、互いに平行な複数本のゲ−ト線13と、
これと直交して互いに平行な複数本のデ−タ線19との
各交点にTFT24が配置され、このTFT24の各ゲ
−ト電極14が行毎にゲ−ト線13に接続されていると
共に、各ドレイン電極20が列毎にデ−タ線19に接続
され、且つ各ソ−ス電極21が各透明画素電極18に接
続され、この透明画素電極18と透明対向電極33との
間に液晶41を挾持している。FIG. 5 shows an equivalent circuit of the above liquid crystal display device. That is, a plurality of gate lines 13 parallel to each other,
A TFT 24 is arranged at each intersection with a plurality of data lines 19 that are orthogonal to this and parallel to each other, and each gate electrode 14 of this TFT 24 is connected to the gate line 13 for each row. , each drain electrode 20 is connected to the data line 19 for each column, and each source electrode 21 is connected to each transparent pixel electrode 18, and a liquid crystal is connected between the transparent pixel electrode 18 and the transparent counter electrode 33. He is holding 41.
【0009】動作時には、ゲ−ト線13がアドレス信号
により順次走査駆動され、TFT24が行毎に順次導通
状態となる。一方、このゲ−ト線13の走査と同期して
、デ−タ線19には選択された数列に並列に画素信号が
供給される。これにより、信号電圧は行毎に順次透明画
素電極18に導かれ、透明対向電極33との間に挾持さ
れた液晶41が励起され、画像信号となって画像表示が
なされる。During operation, the gate lines 13 are sequentially scanned and driven by address signals, and the TFTs 24 are sequentially rendered conductive row by row. On the other hand, in synchronization with the scanning of the gate line 13, pixel signals are supplied to the data line 19 in parallel to the selected number columns. As a result, the signal voltage is sequentially guided to the transparent pixel electrode 18 row by row, and the liquid crystal 41 held between the transparent counter electrode 33 is excited and becomes an image signal to display an image.
【0010】0010
【発明が解決しようとする課題】上記のような従来のア
クティブマトリックス型液晶表示装置においては、保護
膜22はTFT24の電気的特性劣化を避けるため、成
膜温度を十分高くすることが出来ない。このため、保護
膜22は必ずしも強固な膜になっていない。従って、製
造工程中に混入する異物や間隙を作るためのスペ−サが
保護膜22を突き破ってデ−タ線19に達する場合があ
る。この場合、混入した異物が導電性であれば、デ−タ
線19と透明対向電極33とが短絡し、表示としては線
欠陥となる。又、液晶41がデ−タ線19との間で化学
的反応又は電気化学的反応により劣化を起こし、局所的
な表示不良を生じることがある。In the conventional active matrix type liquid crystal display device as described above, the protective film 22 cannot be formed at a sufficiently high temperature in order to avoid deterioration of the electrical characteristics of the TFT 24. Therefore, the protective film 22 is not necessarily a strong film. Therefore, foreign matter mixed in during the manufacturing process or a spacer for creating a gap may break through the protective film 22 and reach the data line 19. In this case, if the mixed foreign matter is conductive, the data line 19 and the transparent counter electrode 33 will be short-circuited, resulting in a line defect in the display. Furthermore, the liquid crystal 41 may deteriorate due to chemical or electrochemical reactions between it and the data line 19, resulting in local display defects.
【0011】この発明は、上記事情に鑑みなされたもの
で、製造工程を変更させることなく、容易に歩留まりが
向上する同時に表示品位の良好なアクティブマトリクス
型液晶表示装置を提供することを目的とする。The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an active matrix liquid crystal display device which can easily improve yield without changing the manufacturing process and at the same time has good display quality. .
【0012】0012
【課題を解決するための手段】この発明は、絶縁性基板
上に複数本のデ−タ線と複数本のゲ−ト線とが交差して
形成され、各交点に上記デ−タ線を兼ねたドレイン電極
と上記ゲ−ト線を兼ねたゲ−ト電極とを有する薄膜トラ
ンジスタが配置された第1の基板と、この第1の基板と
所定間隙で配設され対向電極が形成された第2の基板と
、上記第1の基板と上記第2の基板との間に挾持された
液晶と、を具備してなるアクティブマトリクス型液晶表
示装置において、[Means for Solving the Problems] This invention provides a structure in which a plurality of data lines and a plurality of gate lines are formed on an insulating substrate so as to intersect with each other, and the data lines are connected to each intersection point. A first substrate on which a thin film transistor having a drain electrode that also serves as the drain electrode and a gate electrode that also serves as the gate line is disposed, and a second substrate that is disposed with a predetermined gap from the first substrate and has a counter electrode formed thereon. an active matrix liquid crystal display device comprising: a second substrate; and a liquid crystal sandwiched between the first substrate and the second substrate;
【0013】上記ゲ−ト線およびデ−タ線が、両者の交
差部以外の部分において上記ゲ−ト電極又は上記ドレイ
ン電極のうち上記絶縁性基板に近いどちらか一方の電極
と同一層内に同一材料で形成されてなるアクティブマト
リクス型液晶表示装置である。[0013] The gate line and the data line are in the same layer as either the gate electrode or the drain electrode near the insulating substrate at a portion other than the intersection thereof. These are active matrix liquid crystal display devices made of the same material.
【0014】[0014]
【作用】この発明によれば、ゲ−ト線およびデ−タ線を
両者の交差部以外の部分においてゲ−ト電極又はドレイ
ン電極のうち上記絶縁性基板に近いどちらか一方の電極
と同一層内に同一材料で形成しているので、十分に強固
なゲ−ト絶縁膜下に配線を閉じ込め、製造工程中に混入
する異物やスペ−サにより保護膜が突き破られることが
なくなる。この結果、製造工程を変更することなく、容
易に歩留まりを向上し、且つ表示品位の良好なアクティ
ブマトリクス型液晶表示装置が得られる。[Function] According to the present invention, the gate line and the data line are placed in the same layer as either the gate electrode or the drain electrode near the insulating substrate at the portion other than the intersection of the two. Since they are made of the same material inside, the wiring is confined under a sufficiently strong gate insulating film, and the protective film is prevented from being penetrated by foreign matter or spacers mixed in during the manufacturing process. As a result, an active matrix liquid crystal display device that can easily improve yield and have good display quality can be obtained without changing the manufacturing process.
【0015】[0015]
【実施例】以下、図面を参照して、この発明の一実施例
を詳細に説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.
【0016】図1はこの発明のアクティブマトリクス型
液晶表示装置の断面図で、図2I−I部に相当する断面
を示しており、図2は図1における第1の基板の一部の
平面図である。FIG. 1 is a cross-sectional view of an active matrix liquid crystal display device of the present invention, showing a cross section corresponding to the section I-I in FIG. 2, and FIG. 2 is a plan view of a part of the first substrate in FIG. It is.
【0017】尚、この液晶表示装置は基本的には図3〜
図5に示した従来の液晶表示装置の構成と同一の構成を
備えており、対応する部分に同一符号を付し、製造工程
に従って説明することにする。[0017] This liquid crystal display device is basically as shown in Figs.
It has the same configuration as the conventional liquid crystal display device shown in FIG. 5, and corresponding parts are given the same reference numerals and will be explained according to the manufacturing process.
【0018】先ず、第1の基板11は例えば透明ガラス
からなる絶縁性基板12上にモリブデンをスパッタリン
グ法により厚さ150nmに堆積した後、ゲ−ト線13
、このゲ−ト線13と一体のゲ−ト電極14をパタ−ン
形成する。この際に、後の工程を経てデ−タ線となるデ
−タ線の一部分19を同時に形成する。First, the first substrate 11 is formed by depositing molybdenum to a thickness of 150 nm on an insulating substrate 12 made of, for example, transparent glass by sputtering.
Then, a gate electrode 14 integrated with this gate line 13 is patterned. At this time, a portion 19 of the data line, which will become a data line in a later process, is formed at the same time.
【0019】次に、絶縁性基板12上にゲ−ト線13、
ゲ−ト電極14を覆うように、例えば二酸化シリコンか
らなる絶縁膜16をプラズマCVD法により厚さ300
nmに堆積する。更に、この絶縁膜16上の所定位置に
、例えばアモルファス・シリコンをプラズマCVD法に
より厚さ300nmに堆積して半導体層17をパタ−ン
形成する。次に、絶縁膜16上の他の所定位置に、例え
ばITOをスパッタリング法により厚さ150nmに堆
積して透明画素電極18を形成する。次に、絶縁膜16
上の所定位置に開口部25を開け、デ−タ線19の材料
表面を露出させる。Next, gate wires 13 and
An insulating film 16 made of silicon dioxide, for example, is formed to a thickness of 300 mm by plasma CVD so as to cover the gate electrode 14.
Deposit to nm. Furthermore, amorphous silicon, for example, is deposited at a predetermined position on this insulating film 16 to a thickness of 300 nm by plasma CVD to form a pattern of a semiconductor layer 17. Next, a transparent pixel electrode 18 is formed at another predetermined position on the insulating film 16 by depositing, for example, ITO to a thickness of 150 nm by sputtering. Next, the insulating film 16
An opening 25 is opened at a predetermined position on the top to expose the material surface of the data line 19.
【0020】更に、絶縁膜16上にゲ−ト線13と交差
する位置に例えばアルミニウムからなるデ−タ線19を
開口部25を介して接続し、且つ半導体層17上の一方
側上に位置するドレイン電極20、このドレイン電極2
0と対向して半導体層17の他方側と透明画素電極18
とを接続する例えばアルミニウムからなるソ−ス電極2
1を形成する。Furthermore, a data line 19 made of, for example, aluminum is connected to the insulating film 16 at a position intersecting with the gate line 13 through an opening 25, and a data line 19 is connected at a position on one side of the semiconductor layer 17. drain electrode 20, this drain electrode 2
0 and the other side of the semiconductor layer 17 and the transparent pixel electrode 18
A source electrode 2 made of, for example, aluminum and connected to
Form 1.
【0021】次に、上記のように各素子を配置した絶縁
性基板12上の全面に二酸化シリコンからなる絶縁性の
保護膜22を厚さ200nm堆積した後に、透明画素電
極18の所定位置の上面の二酸化シリコンを除去し、更
に、この上面の全領域にポリミイドからなる液晶配向膜
23を塗布形成する。Next, after depositing an insulating protective film 22 made of silicon dioxide to a thickness of 200 nm on the entire surface of the insulating substrate 12 on which each element is arranged as described above, the upper surface of the transparent pixel electrode 18 at a predetermined position is The silicon dioxide is removed, and a liquid crystal alignment film 23 made of polymide is further coated on the entire upper surface.
【0022】このようにして、第1の基板11を形成す
ると共に、この第1の基板11にゲ−ト電極14、半導
体層17、ドレイン電極20、ソ−ス電極21からなる
TFT24を形成する。In this manner, the first substrate 11 is formed, and the TFT 24 consisting of the gate electrode 14, the semiconductor layer 17, the drain electrode 20, and the source electrode 21 is formed on the first substrate 11. .
【0023】一方、第2の基板31は、例えばガラスか
らなる絶縁性基板32上に厚さ100nmのITOから
なる透明対向電極33および液晶配向膜34を順次形成
する。そして、第1の基板11と第2の基板31とを6
μm程度の間隙を保って周辺部を封着し、更にこの間隙
内に液晶41を封入挾持する。On the other hand, for the second substrate 31, a transparent counter electrode 33 made of ITO having a thickness of 100 nm and a liquid crystal alignment film 34 are sequentially formed on an insulating substrate 32 made of glass, for example. Then, the first substrate 11 and the second substrate 31 are
The peripheral portion is sealed with a gap of approximately μm maintained, and the liquid crystal 41 is further enclosed and held within this gap.
【0024】そして、図5のように互いに平行な複数本
のゲ−ト線13と、これと直交して互いに平行な複数本
のデ−タ線19との各交点にTFT24を配置し、この
TFT24の各ゲ−ト電極14を行毎にゲ−ト線13に
接続する共に、各ドレイン電極20を列毎にデ−タ線1
9に接続し、且つ各ソ−ス電極21を各透明画素電極1
8に接続する。As shown in FIG. 5, a TFT 24 is placed at each intersection between a plurality of gate lines 13 parallel to each other and a plurality of data lines 19 perpendicular to the gate lines 13 and parallel to each other. Each gate electrode 14 of the TFT 24 is connected to the gate line 13 for each row, and each drain electrode 20 is connected to the data line 1 for each column.
9 and connect each source electrode 21 to each transparent pixel electrode 1.
Connect to 8.
【0025】上記のようにゲ−ト線13と同一層内にデ
−タ線19を同一材料で形成しているので、デ−タ線1
9上に絶縁膜16を配することが出来る。この結果、製
造工程中に混入した異物やスペ−サが保護膜を突き破っ
てデ−タ線19上に達することがなくなり、線欠陥の発
生要因、表示品位不良の発生要因を除くことが出来る。As described above, since the data line 19 is formed of the same material in the same layer as the gate line 13, the data line 19
An insulating film 16 can be disposed on 9. As a result, foreign matter or spacers mixed in during the manufacturing process will not break through the protective film and reach the data line 19, and the causes of line defects and poor display quality can be eliminated.
【0026】[0026]
【発明の効果】この発明によれば、ゲ−ト線およびデ−
タ線を両者の交差部以外の部分においてゲ−ト電極又は
ドレイン電極のうち絶縁性基板に近いどちらか一方の電
極と同一層内に同一材料で形成しているので、十分に強
固なゲ−ト絶縁膜下に配線を閉じ込め、製造工程中に混
入する異物やスペ−サにより保護膜が突き破られること
がなくなる。この結果、製造工程を変更することなく、
容易に歩留まりを向上し、且つ表示品位の良好なアクテ
ィブマトリクス型液晶表示装置が得られる。[Effects of the Invention] According to the present invention, the gate line and the data
Since the terminal wire is formed of the same material in the same layer as the gate electrode or the drain electrode, whichever electrode is closer to the insulating substrate, at a portion other than the intersection of the two, the gate electrode is sufficiently strong. The wiring is confined under the protective insulating film, and the protective film is prevented from being penetrated by foreign matter or spacers that get mixed in during the manufacturing process. As a result, without changing the manufacturing process,
An active matrix liquid crystal display device with easy improvement in yield and good display quality can be obtained.
【図1】この発明の一実施例に係るアクティブマトリク
ス型液晶表示装置を示す図2I−I部の断面図。FIG. 1 is a sectional view taken along line I-I in FIG. 2 showing an active matrix liquid crystal display device according to an embodiment of the present invention.
【図2】図1の一部を示す平面図。FIG. 2 is a plan view showing a part of FIG. 1;
【図3】従来のアクティブマトリクス型液晶表示装置を
示す図4III−III部の断面図。FIG. 3 is a sectional view taken along line III-III in FIG. 4 showing a conventional active matrix liquid crystal display device.
【図4】図3の一部を示す平面図。FIG. 4 is a plan view showing a part of FIG. 3;
【図5】図3および図4の液晶表示装置の等価回路図。FIG. 5 is an equivalent circuit diagram of the liquid crystal display device of FIGS. 3 and 4. FIG.
11…第1の基板、13…ゲ−ト線、14…ゲ−ト電極
、17…半導体層、18…透明画素電極、19…デ−タ
線、20…ドレイン電極、21…ソ−ス電極、24…T
FT、25…開口部、31…第2の基板、33…透明対
向電極、41…液晶。DESCRIPTION OF SYMBOLS 11... First substrate, 13... Gate line, 14... Gate electrode, 17... Semiconductor layer, 18... Transparent pixel electrode, 19... Data line, 20... Drain electrode, 21... Source electrode , 24...T
FT, 25...Aperture, 31...Second substrate, 33...Transparent counter electrode, 41...Liquid crystal.
Claims (1)
数本のゲ−ト線とが交差して形成され、各交点に上記デ
−タ線を兼ねたドレイン電極と上記ゲ−ト線を兼ねたゲ
−ト電極とを有する薄膜トランジスタが配置された第1
の基板と、この第1の基板と所定間隙で配設され対向電
極が形成された第2の基板と、上記第1の基板と上記第
2の基板との間に挾持された液晶と、を具備してなるア
クティブマトリクス型液晶表示装置において、上記ゲ−
ト線およびデ−タ線が、両者の交差部以外の部分におい
て上記ゲ−ト電極又は上記ドレイン電極のうち上記絶縁
性基板に近いどちらか一方の電極と同一層内に同一材料
で形成されてなることを特徴とするアクティブマトリク
ス型液晶表示装置。1. A plurality of data lines and a plurality of gate lines are formed on an insulating substrate to intersect with each other, and a drain electrode that also serves as the data line and a drain electrode that also serves as the data line and the gate line are formed at each intersection point. A first transistor in which a thin film transistor having a gate electrode that also serves as a gate line is arranged.
a second substrate disposed at a predetermined gap from the first substrate and on which a counter electrode is formed; and a liquid crystal sandwiched between the first substrate and the second substrate. In the active matrix type liquid crystal display device comprising the above-mentioned game
The data line and the data line are formed of the same material in the same layer as either the gate electrode or the drain electrode near the insulating substrate at a portion other than the intersection thereof. An active matrix liquid crystal display device characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3146428A JPH04369623A (en) | 1991-06-19 | 1991-06-19 | Active matrix type liquid crystal display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3146428A JPH04369623A (en) | 1991-06-19 | 1991-06-19 | Active matrix type liquid crystal display device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04369623A true JPH04369623A (en) | 1992-12-22 |
Family
ID=15407454
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3146428A Pending JPH04369623A (en) | 1991-06-19 | 1991-06-19 | Active matrix type liquid crystal display device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04369623A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001147651A (en) * | 1999-09-08 | 2001-05-29 | Matsushita Electric Ind Co Ltd | Electric circuit board as well as tft array board, and liquid crystal display device using the same |
JP2002122885A (en) * | 2000-10-18 | 2002-04-26 | Nec Corp | Liquid crystal display device |
JP2013080228A (en) * | 2007-12-05 | 2013-05-02 | Semiconductor Energy Lab Co Ltd | Display device |
-
1991
- 1991-06-19 JP JP3146428A patent/JPH04369623A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001147651A (en) * | 1999-09-08 | 2001-05-29 | Matsushita Electric Ind Co Ltd | Electric circuit board as well as tft array board, and liquid crystal display device using the same |
JP2002122885A (en) * | 2000-10-18 | 2002-04-26 | Nec Corp | Liquid crystal display device |
JP4596101B2 (en) * | 2000-10-18 | 2010-12-08 | 日本電気株式会社 | Liquid crystal display |
JP2013080228A (en) * | 2007-12-05 | 2013-05-02 | Semiconductor Energy Lab Co Ltd | Display device |
US8878184B2 (en) | 2007-12-05 | 2014-11-04 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method for manufacturing the same |
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