JPH0430283A - Article identification system - Google Patents

Abstract

PURPOSE:To realize data transmission free from interference by accessing only the headmost carrier of the data carrier capable of being accused from a write/ read control unit. CONSTITUTION:A read.write head 13 attaches an identification number to the data carriers 12a to 12d in a communicatable area, and accesses the data carrier, and by repeating access as changing the identification number, it identifies the number of the heat data carrier. Then, the data transmission is executed to the head data carrier, and after the finish of the data transmission, the data carrier identification number is updated, and the data transmission is executed successively to the succeeding data carrier. Then, the data carrier identification number is left as a circulating code. Thus, the data transmission with all the data carriers free from the interference can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to an identification system for tools for machine tools, parts in factories, product management, distribution systems, etc.

[Conventional technology] In order to mechanize the management of tools in conventional machine tools and the identification of parts and products on assembly lines in factories, tools 1
A system is needed to identify and manage various items such as parts and products. Therefore, as in Japanese Patent Application Laid-Open No. 1-151832, a data carrier having a memory is provided in the object to be identified.
An article identification system has been proposed in which necessary information is written in such a memory by external data transmission, and the information is read out as necessary.

[Problem to be solved by the invention]

However, according to such conventional identification systems,
A plurality of data carriers may be located in an area that can communicate with the write/read control unit, and interference may occur. When interference occurs, there is a drawback that it becomes difficult to perform normal data transmission with the data carrier to be accessed. For this reason, the communicable distance cannot be extended very much, and there is a drawback that there is a risk of communication failure.

The present invention has been made in view of the problems of the conventional article identification system, and it is
A technical issue is to enable data transmission without interference with a read control unit.

[Means for Solving the Problems] The present invention provides a memory that holds data, a memory control unit that controls writing and reading of data into the memory,
It has a data transmission means for reheating commands and data given from the outside and transmitting the read data to the memory control means, and a data carrier attached to the article to be identified, and a data carrier for transmitting data to the data carrier. An article identification system comprising: a write/read control unit having a data transmission means for receiving sent data, the write/read control unit accessing the data carrier by assigning a data carrier identification number. and a first data carrier number detection means for detecting the first data carrier number of the data carrier in the communication area by changing the identification number of the data carrier at the time of response, and the data detected by the first data carrier number detection means. The data carrier has a data carrier number updating means that sequentially transmits data from the carrier and updates the data carrier identification number, and the data carrier has a series of data carrier numbers set for a plurality of data carriers moving along a predetermined route. It is characterized by the presence of

[Operation] According to the present invention having such characteristics, the read/write head attaches an identification number to a data carrier in a communicable area, accesses the data carrier, and repeats the access by changing the identification number. This identifies the number of the first data carrier. Then, data is transmitted to the first data carrier, and when the data transmission is completed, the data carrier identification number is updated and data is transmitted to the following data carriers in sequence. By setting the data carrier identification number as a circulating code, data transmission can be performed with all data carriers without interference.

[Description of Embodiment] FIG. 2 is a block diagram showing the structure of an article identification system according to an embodiment of the present invention. In this figure, the article identification system is a pallet I on which parts to be identified are transported.
1 a-11d--, data carriers 12a-12d--, which are directly attached to the data carriers 12a-12d--, and a read/write head (hereinafter referred to as RW
An ID controller 14 connected to the RW head 13 and controlling its operation is provided. The RW head 13 and the ID controller 14 constitute a write/read control unit 6. Further, the ID controller 14 is connected to a host computer 15. Here, the RW head 13 has a communicable area indicated by a dashed line, and in this embodiment, it is assumed that two data carriers may enter the communicable area at the same time depending on the shape of the pallets ()lla to lld.

Now, as shown in the block diagram in FIG. 3, the ID controller 14 includes a microprocessor (CPU) 21 that controls writing and reading of data to and from the data carrier 12, and a memory 22 that holds the system program and data.
An input/output interface 23 for inputting and outputting data to and from the host computer 15 is also provided. CPU2
The input/output terminal of 1 includes a modulation circuit 24 that modulates data to be transmitted to the data carrier 12 and a transmitter 25 driven by the output thereof. The transmitter 25 transmits data to the data carrier by outputting an FSK modulated signal from a coil, for example. Further, the received signal obtained from the data carrier is given to the demodulation circuit 27 via the receiving section 26. The demodulation circuit 27 demodulates this signal and provides it to the CPU 21.

Next, the configuration of the data carrier 12 will be explained with reference to FIG. 4. In FIG. 4, a transmitting/receiving section 31 receives and transmits a frequency signal emitted from the RW head 13, and its received output is given to a demodulation circuit 32. The demodulation circuit 32 demodulates this signal and provides it to the control section 33. The control unit 33 is connected to a memory 34 via a bus, for example, a memory 34 configured with a static RAM or an E2FROM backed up by a battery 35.
is connected. The control unit 33 is a memory control means 2 that controls writing or reading of data according to commands and data given from the ID controller 14. The read data is converted into a serial signal, and its output is sent to the modulation circuit 36. The signal is provided to the transmitting/receiving section 31 via the transmitting/receiving section 31. The transmitting/receiving section 31 provides a signal to the RW head 13 by changing the resonance frequency of a resonant circuit, for example, as in the conventional example. Here, the transmitting/receiving section 31. The demodulation circuit 32 and the modulation circuit 38 constitute a data transmission means 3 that demodulates commands and data given from the ID controller and supplies them to the memory control means, and transmits the read data.

FIG. 5 is a diagram showing a memory map of the data carrier. The memory map of the data carrier has system area 3.
4a and a user area 34b, and a system area 34
In a, there is provided an area for holding the identification number of the device in addition to data such as the date of manufacture. If the storage area for the identification number is, for example, 1 byte, that is, 8 bits, then 256 data bits can be identified. Now, in this example, the second
As shown in the figure, two
Since there is a possibility that 4 data carriers can be entered, the lower 2 bits of the identification number are set in bits indicated by a binary number with the minimum number of digits exceeding this, that is, in order to be able to identify 4 data carriers at the time of access. use

FIG. 6 is a flowchart showing data carrier processing. In the figure, when the data carrier starts operating, it first checks reception of a command in step 41, and if a command is received, the process proceeds to step 42, where it extracts the number of bits for self-check from the DC number of the command. Here, for the DC number of the command, as shown in FIG. 5, for example, the lower 5 bits are used as an identification number, and the upper 3 bits are used as bit extraction bits used to identify the data carrier for data transmission. For example, as shown in box 5), if the upper 3 bits are rolo, the decimal representation is 2, so the lower 2 bits of the lower 5 bits indicating the identification number are used as the bits for checking the local station.

In this way, four data carriers can be identified. That is, in order to identify the maximum number of data carriers located simultaneously in the communication area of the read/write head, two bits are used to identify the data carriers in this embodiment.

Then, it is checked whether the specified number of identified bits matches the number of the own station (step 43). If they do not match, return to step 41 and repeat the same process; if they match, the command is addressed to the local station, so necessary processing is performed, such as writing data to or reading data from memory. . Then, the process proceeds to step 46, where a response is sent to the RW head 13, and the process ends.

Next, the operation of the ID controller 14 will be described with reference to the flowchart of FIG. When the operation starts in FIG. 7, initial processing such as clearing the work area is performed in step 51, and the process proceeds to step 52, in which preprocessing for accessing the data carrier is performed. This preprocessing includes, for example, waiting for a command from the host computer 15 and detecting the approach of a data carrier. The process then proceeds to step 53 to check whether or not an access to the data carrier has occurred, and if no access has occurred, the process returns to routine 52 to repeat the same process and wait for an access. When the data carrier 12 is accessed, the process proceeds to step 54, where it is checked whether the identification number at the beginning of the data carrier has been identified. If the data carrier has not been identified yet, the process advances to routine 55 to perform identification processing for the leading identification number of the data carrier.

When this identification process starts as shown in FIG.
First, the command or ID given from the host computer
Read the number of bits for data carrier identification set by the DIP switch etc. in the controller 14 (step 61)
. For example, in the example shown in Figure 5, the upper 3 bits for bit extraction,
That is, the two bits obtained when roloJ is converted into a decimal number are data carrier identification bits. Then, in step 62, the data carrier identification number is set to all 0, a bit extraction bit is added, and the data carrier identification number is set to 0.
The data carrier is accessed as the DC number. Then, the process proceeds to step 63 to check whether there is a response from the data carrier 12, and if there is a response, the process proceeds to step 64, where the identification number of the data carrier is returned by one and the data carrier 12 is accessed again. Then, proceed to step 65 to check whether there is a response, and if there is a response, step 6
Returning to step 4, the same process is repeated, and if there is no response, the routine advances to step knob 66, increments the identification number of the data carrier by one, and ends this routine as the data carrier's first number. Also, if there is no response in step 63, step 6
Step 7 advances the identification number of the data carrier by one to access the data carrier. Then, the process proceeds to step 68 and checks whether there is a response, and if there is no response, step 6
Return to step 7 and repeat the same process. If there is a response in step 68, the routine proceeds to step 69, where the identification number of the accessed data carrier is set as the leading number of the data carrier, and this routine ends. For example, in FIG. 2, if the lower two bits of the DC numbers of data carriers 12a to 12d are respectively roo, roIJ, rioJ, and liJ, then
Since there is no response on the first data carrier access,
The process advances from step 63 to step 67, where the DC identification number is incremented and access is performed.

Then, since there is a response, the process advances to step 68, and the data carrier 12b whose lower two bits are "01" becomes the first data carrier. Further, when there is a response, the number of the data carrier is sequentially returned, and when there is no response, the number of the first data carrier can be identified by incrementing the number by one. Here, the CPU 21 accesses the data carrier by attaching the identification number of the data carrier in steps 61 to 69, and identifies the first data carrier number of the data carriers in the communication area by changing the identification number of the data carrier at the time of response. The function of the leading data carrier number detecting means 7 is achieved.

After identifying the leading number of the data carrier 12 in this way,
Proceeding to step 56, the leading number of the data carrier 12 is stored in the memory of the ID controller, and proceeding to routine 57, the leading number of the data carrier 12 is attached and normal access to the data carrier such as read processing or write processing is performed. . Then, the process proceeds to routine 58, where the data carrier post-processes, for example, if there is a higher-level station, it sends a response to the higher-level computer, and in a system where there is no higher-level computer, the process is completed by outputting the post-processing output to the outside, and routine 52 Return to On the other hand, if the leading number of the data carrier is already stored in step 54, the process proceeds to step 59, where the data carrier number is updated based on a certain regularity, and the process proceeds to routine 57, where the same process is repeated. For example, in the case of FIG. 2, after accessing the data carrier 12b whose lower two bits of the DC number are "01", it is possible to access the data carrier 12c whose lower two bits are "10". And the 2-bit DC number is rooJ, '01', rlo', ' r
, 11 J, r OOJ-----, the number of the data carrier to be accessed next can be sequentially detected from a large number of data carriers. Therefore, only the leading data carrier in the communicable area is accessed, and once the communication is completed, data can be transmitted with the next arriving data carrier without interference.

In this embodiment, when data carriers are accessed from the ID controller, data carriers that enter the communication area at the same time are identified by attaching a predetermined lower bit to the data carriers, but the communicable area is wide. Needless to say, in some cases, it is necessary to decode the DC number of even more bits to identify the data carrier.

〔Effect of the invention〕

As described in detail above, according to the present invention, only the first data carrier of the data carriers that can be accessed from the write/read control unit can be accessed, so there is no risk of interference and the data transmission is reliable. It is possible to improve whale characteristics.

[Brief explanation of the drawing]

Figure 1 is a functional block diagram showing the overall configuration of the present invention, Figure 2 is a functional block diagram showing the overall configuration of the present invention.
The figure is a schematic diagram showing the overall configuration of the article identification system, Figure 3 is a block diagram showing the configuration of the ID controller, Figure 4 is a block diagram showing the configuration of the data carrier, and Figure 5 (a).
Figure 5(b) is a diagram showing the memory map of the data carrier.
) is a diagram showing an example of a DC number when accessing a data carrier for the first time, FIG. 6 is a flowchart showing the operation of the data carrier, and FIGS. 7 and 8 are flowcharts showing the operation of the ID controller. 1.34---Memory 2---Memory control means 3.5---Data transmission means 4,12.
12a to 12d --- Data carrier 6 ---
---1 write/read control unit 7--... Leading data carrier number detection means 8-- Data carrier number updating means 13-----Read/write head 14-.・-・ID controller
15------First-level computer 2l------
--CPU 33. Figure Figure Figure 5 (a) ＼ Figure Figure Figure

Claims (1)

[Claims] (1) A memory that holds data, a memory control means that controls writing and reading of data to the memory, demodulating commands and data given from the outside, and transmitting the read data to the memory control means. a data carrier that is attached to an article to be identified, and a write/read control unit that has a data transmission means that transmits data to the data carrier and receives the transmitted data. The article identification system is characterized in that the write/read control unit accesses the data carrier by attaching a data carrier identification number and changes the identification number of the data carrier in response to the access to the data carrier in the communication area. a leading data carrier number detecting means for detecting a leading data carrier number of a carrier; and a data carrier number updating means for sequentially transmitting data from the data carrier detected by the leading data carrier number detecting means to update a data carrier identification number. An article identification system, characterized in that the data carriers are set with a series of data carrier numbers for a plurality of data carriers that move along a predetermined route.