JPH04253339A - Manufacture of self-alignment bipolar transistor - Google Patents

Abstract

PURPOSE:To make elements more precise and reduce the collector-base capacitance by performing etching treatment by using side-wall oxide films formed by oxidizing polysilicon left by patterning as masks. CONSTITUTION:An area for forming a field oxide film is patterned against the first oxidation preventing film 12, silicon 13, and second oxidation preventing film 14 successively formed on a silicon substrate 11 by using a mask 15. After patterning, a field oxide film 16 is formed in the area and side-wall oxide films 17 are formed by oxidation on the side face sections of the polysilicon 13. Then the first and second oxidation preventing films 12 and 14 are retreated by isotropic etching so that an external base area 18 can come out. A window 2D corresponding to an internal base and emitter area is opened by etching performed by using the films 17 as masks and the internal base-emitter area 19 of this self-alignment bipolar transistor is decided.

Description

[Detailed description of the invention]

0001

TECHNICAL FIELD The present invention relates to a method for manufacturing a self-aligned bipolar transistor, and more particularly to a self-aligned method for manufacturing a double-layer polysilicon structure in which internal base and emitter regions are formed by self-alignment with an external base region. The present invention relates to a method of manufacturing a type bipolar transistor.

0002

2. Description of the Related Art In a conventional method for manufacturing a bipolar transistor having a two-layer polysilicon structure, as shown in FIG. - Determined by

In FIG. 6, 63 is an n-type silicon substrate, 64 is a field oxide film, 65 is a base extension of polysilicon containing p-type impurities, and 66 is an emitter extension of polysilicon containing n-type impurities. 67 is an oxide film.

0004

[Problems to be Solved by the Invention] As described above, in the method of determining the internal base and emitter regions by patterning using a new mask, the number of masks used increases, and the mask for determining the external base region increases. It is necessary to take into account the misalignment between the internal base and the mask for determining the emitter region, and it is also necessary to provide some margin for the distance between the field oxide film and the emitter region. Miniaturization of transistors,
It was difficult to increase the speed.

Therefore, in the present invention, a sidewall oxide film obtained by oxidizing the side surface of a polysilicon layer formed by patterning using a mask for determining the external base region is used as a mask for determining the internal base and emitter regions. In other words, by making both masks self-aligned, the purpose is to miniaturize the device and reduce the collector-base capacitance to increase the speed of the device.

[0006]

[Means for Solving the Problems] FIG. 1 is an explanatory diagram of the principle of the present invention, showing the basic steps up to determining the internal base and emitter regions of a bipolar transistor.

That is, (1) patterning a field oxidation target area using a mask 15 for the first oxidation prevention film 12, polysilicon 13, and second oxidation prevention film 14 which are sequentially laminated on the silicon substrate 11; do. Note that the external base region 18 is also determined by this patterning.

■ The silicon substrate surface portion of this field oxidation target area and the portions 12, 13, laminated thereon;
14 is removed by etching.

(2) By oxidation treatment, a field oxide film 16 is formed in the region to be field oxidized, and a sidewall oxide film 17 is formed on the side surface of the polysilicon 13.

■ The first oxidation prevention film 12 and the second oxidation prevention film 14 are retreated by isotropic etching treatment,
The external base region 18 is exposed to the surface.

(2) A window 20 corresponding to the internal base and emitter region is opened by etching using the sidewall oxide film 17 as a mask. Through these basic steps, the internal base and emitter regions 19 of the self-aligned bipolar transistor are determined.

0012

[Operation] By oxidizing the first oxidation prevention film 12, polysilicon 13, and second oxidation prevention film 14 left on the external base region 18, a sidewall oxide film is formed on the side surface of the polysilicon 13. 17 and then, after securing a contact space between the external base region 18 and the base extension portion 21 so that the external base region 18 appears on the surface, the first oxidation prevention film 12 is formed using the sidewall oxide film 17 as a mask. , the polysilicon 13, and the second oxidation prevention film 14 are etched to define the internal base and emitter regions 19.

[0013]

[Embodiment] An embodiment of the present invention will be explained using FIGS. 2 to 4. 2-4 collectively illustrate the manufacturing process of the self-aligned bipolar transistor of the present invention. That is, (1) For example, the first nitride film 31, the first polysilicon 13, and the second nitride film 32 are sequentially grown on the n-type silicon substrate 11, and the thickness of each is about 500 Å.
The layers are stacked at 3000 Å and 1500 Å.

(2) The area to be field oxidized is patterned using the mask 15, and the second nitride film 32, first polysilicon 13, and first nitride film 31 are etched in this order, and then the n-type Silicon 11 is also etched to about 3000 Å. Note that this patterning also specifies the external base region 18 (see step 12).

(3) For example, by thermal oxidation, about 6000
A field oxide film 16 is formed with a thickness of Å. At this time, the side surfaces of the first polysilicon 13 are also oxidized and the first
A sidewall oxide film 17 is formed.

(4) The side surface of the first nitride film 31 is retreated by wet etching. At this time, the second nitride film 32 is also etched as shown in the figure, and the external base region 18 appears on the surface.

(5) The second polysilicon 33 doped with a p-type impurity and the first oxide film 34 are grown in sequence and stacked to a thickness of about 3000 Å. In addition, the second
The polysilicon 33 is a base extension portion, and the first oxide film 34 is formed by the CVD method.

(6) The entire surface is planarized by a planarization technique such as polishing, and a portion of the second polysilicon 33, the upper surface of the first sidewall oxide film 17, and the second nitride film 32 appear on the surface. do it like this.

(7) The exposed portion of the second polysilicon 33 is oxidized to form a second oxide film 33a.

(8) Wet etching removes the second nitride film 32, first polysilicon 13, and first nitride film 31.
are sequentially etched to open windows 20 corresponding to the internal base and emitter regions. At this time, since the first sidewall oxide film 17 acts as a mask, there is no need to use a new mask.

(9) A p-type impurity is ion-implanted into the window 20 to form an internal base region 35, followed by CVD.
The third oxide film 36 is formed to a thickness of approximately 3200 Å by the method.
grow to become

(10) A second sidewall oxide film 3 is formed in the window 20 by etching back using anisotropic etching.
Leave 7.

(11) Third polysilicon 38 doped with n-type impurities is grown to a thickness of about 1000 Å.

(12) Patterning is performed using a mask 39 so that the third polysilicon 38 remains only in the emitter extraction portion 42, and then heat treatment is performed to eliminate n-type impurities in the third polysilicon 38. is diffused into the internal base region 35 to form the emitter region 40, and the p-type impurity in the internal base region 35 is diffused into the n-type silicon 1.
1 to form an external base region 18. A self-aligned bipolar transistor with a two-layer polysilicon structure is manufactured by this procedure.

Note that FIG. 5 shows a self-aligned bipolar transistor with a two-layer polysilicon structure after manufacturing.
18 and 35 are p-type base regions, 40 is an n-type emitter region, 41 is an n-type collector region, 42 is an emitter extension part, 43 is a base extension part, and 44 is a collector extension part.

[0026]

Effects of the Invention In the present invention, patterning is performed using a mask to specify the field oxidation target region and the external base region, and the sidewall oxide film formed by oxidizing the remaining polysilicon by this patterning is By performing an etching process as a mask, windows corresponding to the internal base and emitter regions are opened, so the number of masks used can be reduced by one compared to conventional manufacturing processes, and the number of masks used can be reduced by one compared to conventional manufacturing processes. The distance between the field oxide film and the window is not set wide in consideration of the misalignment of the transistor, and therefore, the bipolar transistor element is miniaturized and the collector-base capacitance is reduced, thereby increasing the speed. Can be done.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the principle of the present invention.

FIG. 2 is an explanatory diagram (Part 1) showing an example of the manufacturing process of the present invention.

FIG. 3 is an explanatory diagram (Part 2) showing an example of the manufacturing process of the present invention.

FIG. 4 is an explanatory diagram (Part 3) showing an example of the manufacturing process of the present invention.

FIG. 5 is an explanatory diagram showing a self-aligned bipolar transistor with a two-layer polysilicon structure according to the present invention.

FIG. 6 is an explanatory diagram showing an outline of a conventional bipolar transistor with a two-layer polysilicon structure.

[Explanation of symbols]

In FIG. 1, 11...Silicon substrate 12...First oxidation preventing film 13...Polysilicon 14...Second oxidation preventing film 15...Mask 16...Field oxide film 17... ...Side wall oxide film 18...External base region 19...Internal base, emitter region 20...(For determining internal base, emitter region) Window 21
・・・Base drawer part

Claims (2)

[Claims] [Claim 1] A first oxidation prevention film (12) and polysilicon (13) sequentially stacked on a silicon substrate (11).
, a step of patterning a field oxidation target area on the second oxidation prevention film (14) using a mask (15), and a step of patterning the silicon substrate surface portion of this field oxidation target area and a layer laminated thereon. (12), (13),
(14) by etching and oxidation to form a field oxide film (16) in the field oxidation target area and to form a sidewall oxide film (17) on the side surface of the polysilicon (13). The first oxidation prevention film (
The internal base and opening a window (20) corresponding to the emitter region (19);
A method of manufacturing a self-aligned bipolar transistor, characterized in that the transistor is formed by self-alignment with a bipolar transistor. 2. A first nitride film (31) and a first polysilicon film (13) are sequentially stacked on a silicon substrate (11).
), a step of patterning the second nitride film (32) using a mask (15) to form a field oxidation target area, and a silicon substrate surface portion of this field oxidation target area and a layered portion thereon. (31), (13), (
32) by etching treatment and oxidation treatment to form a field oxide film (16) in the field oxidation target region, and to form a sidewall oxide film (17) on the side surface of the first polysilicon (13). ) and isotropic etching process, the first nitride film (
31) and the step of retreating the second nitride film (32) so that the external base region (18) appears on the surface, and forming a base extension part on the surface after this isotropic etching process. The second polysilicon (33) doped with impurities and the first oxide film (34) are sequentially laminated, and the entire surface is flattened by a planarization process to form the second polysilicon (33). The second polysilicon (33) exposed to the surface is removed by a step of causing a part of the polysilicon (33) and the sidewall oxide film (17) to appear on the surface, and an oxidation treatment.
) and an etching process using the sidewall oxide film (17) as a mask to open a window (20) corresponding to the internal base and emitter region (19). an internal base and emitter region (19); an external base region (18);
A method of manufacturing a self-aligned bipolar transistor, characterized in that the transistor is formed by self-alignment with a bipolar transistor.