JPH03268001A - Controller - Google Patents

Abstract

PURPOSE:To safely maintain the controller without putting the process into disorder by constituting the controller so that even if a microprocessor of the controller becomes abnormal in any mode, its output can be backed up by an output value before abnormality. CONSTITUTION:A holding signal of a holding circuit 7 of a backup circuit 9 is not used as a time-up signal of a watch dog timer 6 but used as a reset signal. By holding an output value in every period by this reset signal, an output value at a normal time before one period can be outputted in the case the watch dog timer 6 becomes time-up due to abnormality of a microprocessor and an output switching circuit 10 is switched to a backup side. In such a way, the safety is enhanced without putting the process into disorder.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a backup method and circuit for a process controller equipped with a microprocessor.

[Conventional technology]

A process controller equipped with a microprocessor is required to maintain control output or perform manual operation even if the microprocessor goes out of control, and is therefore provided with a backup circuit separate from the main circuit consisting of the microprocessor.

The operation of a microprocessor is usually monitored by a timer called a watchdog timer.

This timer is set to be longer than the normal calculation cycle, and is reset when one cycle is completed in normal operation, and the microprocessor executes the calculation in the next cycle.

However, if the process does not end normally due to a runaway of the microprocessor or some other abnormality, the watchdog timer cannot be reset and times up.

This time-up signal is used to notify the outside of the controller of an abnormality, or to switch to backup within the controller.

Here, a method of switching to backup according to the prior art will be explained using FIG.

In FIG. 3, reference numeral 1 denotes an input terminal, and an input circuit 2 receives an analog input signal 1, for example, DC1-50, and performs A/D conversion. The control calculation circuit 3 performs control calculations such as PID using a microprocessor. The output circuit 4 D/A converts the calculation result and outputs the operation output signal DC4~
This converts it into a signal such as 20mA. 5 is an output terminal connected to the operating end. Reference numeral 6 denotes a watchdog timer, and when the control calculation is performed normally, a reset signal is outputted every cycle from the control calculation circuit, thereby resetting the timer. If this reset signal is not output, the watchdog timer will not be reset and it will be considered a microprocessor error.

Time up. Then, this time-up signal is output as a contact point to the outside as an abnormality in the controller, or is used as a manual backup switching signal inside the controller. A hold circuit 7 holds the output of the output circuit 4 using the time-up signal of the watchdog timer as a hold signal. The output circuit 8 converts the signal held in step 7 into an operation output signal or the like. 9 is 7,
8 are collectively referred to as a backup circuit.

In some cases, it may even include 10. Reference numeral 10 denotes an output switching circuit, which switches between the output of the main circuit and the backup circuit, and switches to the backup circuit in response to a time-up signal from the watchdog timer.

Next, FIG. 4 shows a flow diagram of the controller software.

Initialize initializes various LSIs and initial values of data. Input processing takes analog input A/
Performs D conversion processing. The control calculation process performs control calculations such as PID. The output process performs D/A conversion of the calculation result and outputs the operation output signal. The cycle wait is a time wait to keep the control calculation cycle (usually 0.1 seconds to 1 second) of the controller constant. The watchdog timer reset is to reset the watchdog timer that detects an abnormality since it has completed one cycle normally. Further, this watchdog timer is normally set to two to three times the control calculation period.

FIG. 5 shows the operation of transitioning to backup. Assume that an abnormality occurs in the microprocessor of the main circuit at the point of arrow A, and its output decreases. Then, the cycle cannot end normally and the watchdog timer is not reset, so the watchdog timer output changes after a certain period of time and times up. In response to this time-up signal, the hold circuit section of the backup circuit holds the output at that time, and outputs it to the output terminal through output switching. Although not shown in the block diagram of FIG. 3, manual operation is also possible by providing an up/down circuit after the hold circuit.

[Problem to be solved by the invention]

As shown in FIG. 5, the above conventional technology holds the output value, which has already become an abnormal value, after a certain period of time has passed, even though the output has changed due to an abnormality at the point of arrow A. The drawback is that there are cases where backup operations are performed. There are various types of abnormalities in microprocessors, and since the output signal is not always disturbed as shown in FIG. 5, abnormal values cannot always be backed up. However, if you don't know what the output will be until something goes wrong, you can't call it a backup circuit. Nor can it be dismissed as a matter of probability. In the past, this drawback was noticed early on and a filter with a large time constant was inserted into the input section of the hold circuit to prevent the output of the backup circuit from changing significantly even if the output fluctuated. However, this was not a fundamental countermeasure because the tracking speed became slow.

SUMMARY OF THE INVENTION An object of the present invention is to provide a backup method for a controller that can improve the above-mentioned drawbacks and can back up the output value with a normal output value even if the microprocessor malfunctions in any way.

[Means to solve the problem]

In order to achieve the above object, in the present invention, the hold signal of the hold circuit of the backup circuit is not the time-up signal of the watchdog timer but a reset signal.

[Effect]

The watchdog timer reset signal is output when one cycle of calculation ends normally, so if you use this signal to hold the double cycle output value, even if an error occurs in the next cycle, Also, it is possible to back up the output value during normal operation - period before.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. The block diagram is almost the same as the conventional example shown in FIG. 3, and the reference numerals are also the same, so a description of the functions of each part will be omitted. What is different from the conventional example is the hold circuit 7 of the backup circuit 9.
The hold signal is used as a reset signal for the watchdog timer 6. By holding the double cycle output value with this reset signal, if the watchdog timer 6 times up due to a microprocessor error and the output switching circuit 10 switches to the backup side, the normal output value from one cycle ago will be used. Since it can be output, it is safe and does not disturb the process. FIG. 2 shows an example of backup migration of a controller that employs the backup method of the present invention.

An abnormality occurs at the point of arrow A, and the output decreases, but
The hold circuit 7 of the backup circuit 9 holds the output value at the time of normal termination - period before. Therefore, the output value (b) of the backup circuit 9 remains at the value before the abnormality occurred. When the watchdog timer 6 times up after a certain period of time and the output circuit is switched, the controller output (c) is held at the value before the occurrence of the abnormality.

When the microprocessor of the controller becomes abnormal, according to the present invention, as described above, the output value before the abnormality is held. Furthermore, the period until the watchdog timer times out is very short and can be ignored.

〔Effect of the invention〕

According to the present invention, even if the microprocessor of the controller becomes abnormal in any mode, the output can be backed up with the output value before the abnormality, so the effect is that the process can be maintained completely without disturbing it. There is.

[Brief explanation of drawings]

Fig. 1 is a functional block diagram showing one embodiment of the present invention;
The figure is a diagram for explaining the operation of one embodiment of the present invention.
4 is a flowchart of controller software, and FIG. 5 is a diagram for explaining the operation of the prior art. 1... Input terminal, 2... Input circuit, 3... Control calculation circuit. 4... Output circuit, 5... Output terminal, 6... Watchdog timer, 7... Hold circuit, 8... Output circuit, 9 Figure 1 Figure 2 Figure 3 Figure 3

Claims (1)

[Claims] 1. For processes equipped with a microprocessor and equipped with a backup circuit to maintain the output of the main circuit or enable manual operation when the main circuit consisting of the microprocessor malfunctions. In the controller, the output signal of the main circuit is held in a backup circuit by the reset signal of the watchdog timer that monitors the operation of the microprocessor of the main circuit, and the output signal of the controller is held in the backup circuit by the time-up signal of the watchdog timer. The circuit is switched to a backup circuit, and the backup circuit is configured to output the output signal of the output circuit that was being held, so that even if the main circuit's microprocessor becomes abnormal, it will back up from the output value immediately before the abnormality. A process controller characterized by being able to.