JP5893387B2 - 電子装置及びその製造方法 - Google Patents
電子装置及びその製造方法 Download PDFInfo
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- 239000011347 resin Substances 0.000 claims description 183
- 229910000679 solder Inorganic materials 0.000 claims description 160
- 238000007789 sealing Methods 0.000 claims description 52
- 230000004907 flux Effects 0.000 claims description 45
- 238000000034 method Methods 0.000 claims description 22
- 239000004065 semiconductor Substances 0.000 claims description 22
- 238000003384 imaging method Methods 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 15
- 229910052751 metal Inorganic materials 0.000 claims description 15
- 238000010438 heat treatment Methods 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 108
- 239000000758 substrate Substances 0.000 description 33
- 238000007747 plating Methods 0.000 description 9
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 7
- 239000010931 gold Substances 0.000 description 7
- 229910052737 gold Inorganic materials 0.000 description 7
- 239000011521 glass Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- RSWGJHLUYNHPMX-UHFFFAOYSA-N Abietic-Saeure Natural products C12CCC(C(C)C)=CC2=CCC2C1(C)CCCC2(C)C(O)=O RSWGJHLUYNHPMX-UHFFFAOYSA-N 0.000 description 1
- 235000008331 Pinus X rigitaeda Nutrition 0.000 description 1
- 235000011613 Pinus brutia Nutrition 0.000 description 1
- 241000018646 Pinus brutia Species 0.000 description 1
- KHPCPRHQVVSZAH-HUOMCSJISA-N Rosin Natural products O(C/C=C/c1ccccc1)[C@H]1[C@H](O)[C@@H](O)[C@@H](O)[C@@H](CO)O1 KHPCPRHQVVSZAH-HUOMCSJISA-N 0.000 description 1
- QCEUXSAXTBNJGO-UHFFFAOYSA-N [Ag].[Sn] Chemical compound [Ag].[Sn] QCEUXSAXTBNJGO-UHFFFAOYSA-N 0.000 description 1
- PQIJHIWFHSVPMH-UHFFFAOYSA-N [Cu].[Ag].[Sn] Chemical compound [Cu].[Ag].[Sn] PQIJHIWFHSVPMH-UHFFFAOYSA-N 0.000 description 1
- 150000008065 acid anhydrides Chemical class 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 150000001244 carboxylic acid anhydrides Chemical class 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 229910000969 tin-silver-copper Inorganic materials 0.000 description 1
- KHPCPRHQVVSZAH-UHFFFAOYSA-N trans-cinnamyl beta-D-glucopyranoside Natural products OC1C(O)C(O)C(CO)OC1OCC=CC1=CC=CC=C1 KHPCPRHQVVSZAH-UHFFFAOYSA-N 0.000 description 1
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- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
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- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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Description
図1〜図12は第1実施形態の電子装置の製造方法を示す図、図13は第1実施形態の電子装置を示す図である。
図14〜図20は第2実施形態の電子装置の製造方法を示す図、図21は第2実施形態の電子装置を示す図である。
Claims (10)
- 部品実装領域を備えた第1配線基板と、
前記第1配線基板の上に積層され、前記部品実装領域に対応する部分に開口部が設けられた第2配線基板と、
前記部品実装領域を取り囲むように間隔を空けて配置され、前記第1配線基板及び前記第2配線基板の各接続部に接続された複数の第1のはんだバンプと、
前記第1配線基板と前記第2配線基板との間であって、前記第1のはんだバンプの外側領域に配置された第2のはんだバンプと、
前記第2配線基板の外周よりも内側領域に配置され、前記部品実装領域の周囲の前記第1のはんだバンプの間に繋がり、かつ、前記第1配線基板及び前記第2配線基板に接触して形成され、前記部品実装領域を取り囲む枠状の樹脂ダム層と、
前記枠状の樹脂ダム層の外側領域の前記第1配線基板と前記第2配線基板との間に充填され、前記2のはんだバンプを封止する封止樹脂と
を有し、
前記枠状の樹脂ダム層の内側の前記部品実装領域の全体が、前記封止樹脂が存在しない樹脂非形成領域として形成されることを特徴とする電子装置。 - 前記第1配線基板の前記部品実装領域に実装された撮像素子をさらに有することを特徴とする請求項1に記載の電子装置。
- 前記第1配線基板の前記部品実装領域に実装された受動素子部品又は受光素子部品と、
前記枠状の樹脂ダム層の外側の前記第1配線基板の上に実装され、前記封止樹脂で封止された半導体チップをさらに有することを特徴とする請求項1に記載の電子装置。 - 前記第2のはんだバンプの配置ピッチは、前記第1のはんだバンプの配置ピッチよりも広く設定され、
前記第2のはんだバンプは、前記部品実装領域を取り囲むように配置された前記第1のはんだバンプを取り囲むように配置されていることを特徴とする請求項1乃至3のいずれか一項に記載の電子装置。 - 部品実装領域を備えた第1配線基板と、
前記第1配線基板の上に積層され、前記部品実装領域に対応する部分に開口部が設けられ、前記部品実装領域の周囲の枠状領域に並んで配置されたはんだバンプを介して前記第1配線基板に接続された第2配線基板と、
前記部品実装領域の周囲の前記はんだバンプの間に繋がって形成され、前記部品実装領域を取り囲む枠状の樹脂ダム層と、
前記第1配線基板の前記部品実装領域に実装された受動素子部品又は受光素子部品と、
前記枠状の樹脂ダム層の外側の前記第1配線基板の上に実装された半導体チップと、
前記第1配線基板と前記第2配線基板との間に、前記樹脂ダム層によって前記部品実装領域が樹脂非形成領域となるように充填され、前記半導体チップを封止する封止樹脂とを有することを特徴とする電子装置。 - 部品実装領域を備えた第1配線基板を用意する工程と、
前記部品実装領域に対応する部分に開口部が設けられ、前記部品実装領域を取り囲むように間隔を空けて配置された複数の第1のはんだバンプが接続部に接続され、前記第1のはんだバンプの外側領域に第2のはんだバンプが配置された第2配線基板を用意する工程と、
前記第2配線基板の前記第1のはんだバンプ及び前記第2のはんだバンプにフラックス機能含有樹脂を付着させた後に、前記第2配線基板の前記第1のはんだバンプ及び前記第2のはんだバンプを前記第1配線基板の上に配置し、リフロー加熱することにより、前記第2配線基板の前記第1はんだバンプ及び前記第2のはんだバンプを前記第1配線基板の接続部に接続すると共に、
前記フラックス機能含有樹脂から、前記部品実装領域の周囲の前記第1のはんだバンプの間に繋がって形成される枠状の樹脂ダム層を前記第2配線基板の外周よりも内側領域に前記第1配線基板及び前記第2配線基板に接触させた状態で形成する工程と、
前記枠状の樹脂ダム層の外側領域の前記第1配線基板と前記第2配線基板との間に封止樹脂を充填して、前記第2のはんだバンプを封止する工程とを有し、
前記樹脂ダム層によって前記封止樹脂が堰き止められて、前記樹脂ダム層の内側の前記部品実装領域が、前記封止樹脂が存在しない樹脂非形成領域となることを特徴とする電子装置の製造方法。 - 前記第1配線基板の前記部品実装領域に撮像素子が実装されていることを特徴とする請求項6に記載の電子装置の製造方法。
- 前記第1配線基板の前記部品実装領域の外側領域に半導体チップが実装されており、
前記封止樹脂を充填する工程で、前記半導体チップが前記封止樹脂で封止され、
前記封止樹脂を充填する工程の後に、前記第1配線基板の前記部品実装領域に受動素子部品又は受光素子部品を実装する工程をさらに有することを特徴とする請求項6に記載の電子装置の製造方法。 - 前記はんだバンプは、金属コアボールの外面がはんだ層で被覆された金属コアはんだボール、樹脂コアボールの外面がはんだ層で被覆された樹脂コアはんだボール、又は、前記第1配線基板と接続する箇所の少なくとも一部がはんだ層で被覆された金属柱から形成されることを特徴とする請求項6乃至8のいずれか一項に記載の電子装置の製造方法。
- 部品実装領域を備え、前記部品実装領域の外側領域に半導体チップが実装された第1配線基板と、前記部品実装領域に対応する部分に開口部が設けられ、前記部品実装領域の周囲の枠状領域に対応する部分に並んで配置されたはんだバンプを備えた第2配線基板とを用意し、
前記第2配線基板の前記はんだバンプにフラックス機能含有樹脂を付着させた後に、前記第2配線基板の前記はんだバンプを前記第1配線基板の上に配置し、リフロー加熱することにより、前記第2配線基板の前記はんだバンプを前記第1配線基板に接続すると共に、前記フラックス機能含有樹脂から、前記部品実装領域の周囲の前記はんだバンプの間に繋がって形成される枠状の樹脂ダム層を得る工程と、
前記第1配線基板と前記第2配線基板との間に封止樹脂を充填して、前記半導体チップを前記封止樹脂で封止する工程であって、前記樹脂ダム層によって前記封止樹脂が堰き止められて、前記部品実装領域が樹脂非形成領域となる工程と、
前記第1配線基板の前記部品実装領域に受動素子部品又は受光素子部品を実装する工程とを有することを特徴とする電子装置の製造方法。
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