JP5368926B2 - Programmable logic controller and fault diagnosis method in programmable logic controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a PLC capable of detecting the failure of an input circuit part by self-diagnosis. <P>SOLUTION: A control processing circuit 40 outputs diagnosis signals IT1 to IT generated by a diagnosis signal generation unit 43 from a diagnosis signal output unit 44, and captures the signals into a failure decision unit 42 via an AND circuit 30 and a signal input unit 41. The failure decision unit 42 compares the diagnosis signals IT1 to IT4 with the input signals DI1 to DI4 input from the signal input unit 41. It is determined that there is failure in the signal input unit 41 when they do not match with each other. Next, the control processing circuit 40 inputs diagnosis signals ET1, ET2 output from the diagnosis signal output unit 44 into a photocoupler 12 of an insulation input circuit 10 to operate a photocoupler 11 of the insulation input circuit 10. The output signals d1 to d4 thereof are obtained via the signal input unit 41, and the input signals DI1 to DI4 are compared with an expectation value with the diagnosis decision unit 42. When there is no match, it is determined that there is failure in the insulation input circuit 10. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a programmable logic controller used in a plant monitoring / control system and the like, and a failure diagnosis method in the programmable logic controller.

  In the case of process facilities with potential dangers, such as nuclear power plants and chemical plants, various measures are taken in case of emergency. For example, a safety control system, such as an emergency stop device, is provided that activates the equipment quickly and stops the operation of the equipment in an emergency when an abnormality or an indication of the process equipment is detected (active countermeasures). In the event that it occurs, a barrier is provided to prevent the spread of the effect (passive measures).

  Conventionally, the control means of the safety control system has been realized by electromagnetic / mechanical means such as a relay. However, in recent years, as the electronic control means, a so-called programmable logic controller (hereinafter, “Programmable Logic Controller”) The abbreviation PLC is often used.

  In response to these technological trends, the IEC (International Electrotechnical Commission) uses electronic and electronically programmable electronic devices (so-called PLCs) as part of the safety control system. The requirements are defined as IEC61508 standards (see Non-Patent Document 1). Incidentally, in the IEC61508 standard, SIL (Safety Integrity Level) is defined as a measure of the capability of the safety control system, and requirements corresponding to each level from 1 to 4 are defined. The SIL indicates that the greater the numerical value, the greater the degree to which the potential danger of the process equipment can be reduced, that is, how much certain safety control can be performed when an abnormality of the process equipment is detected. ing.

  In general, a safety control system is required to be activated immediately when an abnormality occurs in a process facility even if it is in an inactive state during normal operation. For that purpose, it is important that the safety control system always checks its own soundness by self-diagnosis or the like. In particular, in safety control systems that require a high level of SIL, it is required to minimize the probability that the system will not operate due to a failure that has not been detected by self-diagnosis, so that self-diagnosis can be performed over a wider range and with higher accuracy. Is required to implement.

  Cited Document 1 discloses an example of a PLC having a self-diagnosis function. According to the cited document 1, the PLC includes a plurality of processors that simultaneously execute the same processing, and a comparison / collation circuit that compares and collates processing results of the plurality of processors. The comparison / collation circuit includes a BIST (Built-In Self-Test) circuit, and can perform self-diagnosis using test data generated by the BIST circuit.

  The PLC disclosed in the cited document 1 can detect not only the failure of the processor but also the failure of the comparison and verification circuit. Therefore, it can be said that the PLC has achieved high-accuracy self-diagnosis for the most part.

JP 2008-267998 A

International Electrotechnical Commission, “IEC61508-SER (Functional safety of electrical / electronic / programmable electronic safety-related systems-Part 1-7)”, 2005-01-20

  In the PLC disclosed in the cited document 1, a self-diagnosis function is realized for the main body circuit portion, but it cannot be said that the self-diagnosis function is necessarily realized for the input circuit portion. Therefore, when a safety control system is configured using such a PLC, a failure such as a disconnection or a short circuit occurs in the input circuit, and the input circuit is a circuit that receives a signal for notifying abnormality of the process equipment. Sometimes, it becomes impossible to detect an abnormality in the process equipment.

  In view of the above problems of the conventional technology, an object of the present invention is to provide a PLC capable of detecting a failure in a signal input circuit portion and a diagnostic method therefor.

A PLC (programmable logic controller) according to the present invention is provided with a control processing circuit composed of a semiconductor integrated circuit and a signal current provided from an external load circuit provided at the outside of the semiconductor integrated circuit. And an insulating input circuit that is supplied to the control processing circuit. The control processing circuit includes a diagnostic signal generation unit that generates a diagnostic signal, a diagnostic signal output unit that outputs the diagnostic signal to the outside of the semiconductor integrated circuit, and a failure determination unit that determines whether there is a failure in a predetermined circuit portion .

In the PLC configured as described above, the control processing circuit outputs the first diagnostic signal generated by the diagnostic signal generation unit from the diagnostic signal output unit to the outside of the semiconductor integrated circuit as a signal that changes in the first period. , input via the signal input portion of the first diagnostic signal output, a malfunction determination unit, by comparing the its input signal the first diagnostic signal, first, the signal input of the control processor The presence or absence of a failure in the part is determined.
Next, the control processing circuit converts the second diagnostic signal generated by the diagnostic signal generation unit into a signal that changes in a second cycle longer than the first cycle via the diagnostic signal output unit . When output to the outside and the output second diagnostic signal is input to the isolated input circuit, the signal output from the isolated input circuit is input via the signal input unit, and the input signal is input to the second input signal. By comparing with the diagnostic signal, it is determined whether or not there is a failure in the insulation input circuit and the wiring portion from the insulation input circuit to the signal input portion.

  As described above, in the PLC according to the present invention, the signal input unit in the control processing circuit (semiconductor integrated circuit), the isolated input circuit functioning as an interface with the external load circuit, and further, from the isolated input circuit to the signal input unit. It is possible to detect a failure in the wiring section that arrives. That is, it is possible to detect a failure in the input circuit portion of the PLC.

  ADVANTAGE OF THE INVENTION According to this invention, the failure diagnosis method in PLC which can detect the failure of an input circuit part and PLC can be provided.

The figure which showed the example of the structure of PLC (programmable logic controller) which concerns on embodiment of this invention. The figure which showed the example of the diagnostic mode set by the diagnosis of PLC which concerns on embodiment of this invention, and the setting example of the internal diagnostic signal (IT1-IT4) and external diagnostic signal (ET1, ET2) in each diagnostic mode. The figure which showed the example of the diagnostic data used by the diagnosis of PLC which concerns on embodiment of this invention. The figure which showed the example of the timing chart of the diagnostic signal produced | generated based on the diagnostic data of FIG. The figure which showed the flow of the diagnostic process of diagnostic mode A 'performed in the control processing circuit which concerns on embodiment of this invention. The figure which showed the flow of the diagnostic process of diagnostic mode B 'performed in the control processing circuit which concerns on embodiment of this invention. It is the figure which showed the modification of the structure of PLC (programmable logic controller) which concerns on embodiment of this invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a diagram showing an example of a configuration of a PLC (programmable logic controller) according to an embodiment of the present invention. As shown in FIG. 1, the PLC 100 receives an ON / OFF signal of a current supplied from the load side circuit 20 and, for example, has a voltage level of 5 V (“High” level) / 0 V (“Low” level). An insulation input circuit 10 that converts the signal into an output signal, a control processing circuit 40 that acquires a signal output from the insulation input circuit 10 and executes a predetermined control process, and a control process that the control process circuit 40 executes. An insulation output circuit (not shown) that outputs a drive current for controlling an actuator (not shown) included in the load-side circuit 20 based on a signal output as a result is configured.

  Here, the control processing circuit 40 is configured by one or a plurality of semiconductor integrated circuits including a microprocessor, an FPGA (Field Programmable Gate Array), and the like, and includes an arithmetic processing circuit, a program processing circuit, and a program included therein. A programmable control function which is a basic function of the PLC 100 is realized by a storage memory or the like. Therefore, it can be said that the control processing circuit 40 is at least functionally a main body of the PLC 100.

  The load side circuit 20 is a circuit included in various monitoring devices and control devices to which the PLC 100 is connected. The equivalent circuit of the control signal transmission system is a power source 22 and a switch 21 as shown in the upper right part of FIG. And can be represented by: That is, when the switch 21 is appropriately turned ON / OFF, the signal current supplied to the isolated input circuit 10 of the PLC 100 is turned ON / OFF.

  In the present embodiment, the switch 21 is normally in an ON state, and is turned OFF by an operation signal (not shown) from a plant including the load side circuit 20. That is, in the case of the load side circuit 20 shown in FIG. 1, significant control information is transmitted to the PLC 100 when the switch 21 is turned off.

  As shown in the upper part of FIG. 1, the insulated input circuit 10 includes photocouplers 11 and 12, and an insulated output circuit (not shown) includes a photocoupler. In general, the photocouplers 11 and 12 are constituted by light emitting diodes 111 and 121 that are light emitting elements and phototransistors 112 and 122 that are light receiving elements, and signal transmission between them is performed by light. Therefore, the PLC 100 can be electrically insulated from the load side circuit 20 by using the photocouplers 11 and 12 as an interface portion for connecting the PLC 100 and the load side circuit 20.

  The isolated input circuit 10 is provided with two photocouplers 11 and 12. However, in the conventional general insulated input circuit, the lower photocoupler 12 is not provided. That is, the upper photocoupler 11 is used to transmit a signal from the load side circuit 20, and the lower photocoupler 12 facilitates diagnosis of the isolated input circuit 10 (that is, the photocoupler 11). In particular, this embodiment is provided for the purpose of achieving the above.

  Here, first, the operation of the upper photocoupler 11 will be described. In this case, it is assumed that the phototransistor 122 of the photocoupler 12 that is not normally provided is always ON (conductive).

  First, in a state where the switch 21 of the load side circuit 20 is ON, a current flows through the light emitting diode 111 in the isolated input circuit 10, the light emitting diode 111 emits light, and the phototransistor 112 is turned ON (conducted). As a result, the inverter 13 outputs a “High” level signal. When the switch 21 is turned off, the current flowing through the light emitting diode 111 is cut off, the light emitting diode 111 stops emitting light, and the phototransistor 112 is turned off. At this time, the inverter 13 outputs a “Low” level signal. That is, the photocoupler 11 functions as a signal conversion circuit that converts a current signal into a voltage signal.

  In this specification, a signal level that is significant as a control signal may be referred to as an active level, and a signal level that is not significant as a control signal, that is, not used for control may be referred to as an inactive level. A period when the control signal is not significant is called normal time. Therefore, the level of the control signal at the normal time is an inactive level.

  As described above, in the present embodiment, since the switch 21 is normally ON, the isolated input circuit 10 outputs a signal of “High” level at the normal time. That is, the output signal of the isolated input circuit 10 has a “High” level as an inactive level and a “Low” level as an active level. For example, in the load side circuit 20, when the plant instructs to switch the state, the switch 21 is turned OFF. As a result, the output signal of the insulation input circuit 10 becomes the “Low” level of the active level, and the load side The switch OFF information in the circuit 20 is transmitted to the PLC 100.

  Next, the operation of the photocoupler 12 will be described. In the present embodiment, the photocoupler 12 functions as a switch that cuts off the current supplied from the load side circuit 20. This switch is normally ON, and is appropriately turned ON / OFF in order to diagnose the operation of the photocoupler 11 in a predetermined diagnostic mode to be described later.

  That is, the diagnostic signal (ET1, ET2) of “High” level is normally input to the light emitting diode 121 of the photocoupler 12, so that a current flows through the light emitting diode 121, the light emitting diode 121 emits light, and the phototransistor 122 is turned on (conductive). On the other hand, when the diagnosis signal (ET1 or ET2) is appropriately activated at the time of diagnosis and becomes “Low” level, the current flowing through the light emitting diode 121 is cut off, the light emitting diode 121 stops emitting light, and the phototransistor 122 is turned off. Therefore, the current supplied from the load side circuit 20 is interrupted.

  Further, referring to FIG. 1, functions and operations of a diagnostic signal generation unit 43, a diagnostic signal output unit 44, and a failure determination unit 42, which are functional blocks provided in the control processing circuit 40, in order to diagnose the PLC 100. explain.

In the diagnosis of the PLC 100 in the present embodiment, the circuit portion (diagnosis target circuit) to be diagnosed is mainly the input circuit portion of the PLC 100, and the following portion is assumed in FIG.
(1) Insulation input circuit 10 that outputs a “High” or “Low” level signal in accordance with the ON / OFF signal of the current supplied from the load side circuit 20
(2) A signal input unit 41 for inputting a signal output from the insulation input circuit 10 into the control processing circuit 40 (semiconductor integrated circuit).
(3) Wiring section from the insulation input circuit 10 to the signal input section 41

  The diagnostic signal generation unit 43 generates a diagnostic signal necessary for diagnosing the input circuit portion of the PLC 100 described above. That is, the diagnostic signal generator 43 uses the (2) as a diagnostic target circuit to generate diagnostic signals (IT1 to IT4) for detecting a failure in the diagnostic target circuit, and the (1) and (3) Is used as a diagnosis target circuit, and diagnostic signals (ET1, ET2) for detecting a failure in the diagnosis target circuit are generated. Hereinafter, in this specification, the diagnostic signals (IT1 to IT4) are referred to as internal diagnostic signals, and the diagnostic signals (ET1, ET2) are referred to as external diagnostic signals. Specific examples of these diagnostic signals will be described separately in detail.

  The diagnostic signal output unit 44 outputs the internal diagnostic signals (IT1 to IT4) and the external diagnostic signals (ET1, ET2) generated by the diagnostic signal generation unit 43 to the outside of the control processing circuit 40 (semiconductor integrated circuit). At this time, the output internal diagnostic signals (IT1 to IT4) are taken into the control processing circuit 40 (semiconductor integrated circuit) via the AND circuit 30 and the signal input unit 41, and the input signal ( DI1-DI4).

  The other input terminal of the AND circuit 30 is connected to the output signals (d1 to d4) of the insulation input circuit 10 (# 1 to # 4) of the normal “High” level. Therefore, the number of internal diagnostic signals (IT1 to IT4) is in principle the same as the number of output signals (d1 to d4) of the isolated input circuit 10 or the number of input signals (DI1 to DI4) of the signal input unit 41. It is. In FIG. 1, the number is four, but the number is not limited to four.

  On the other hand, the external diagnostic signals (ET1, ET2) are input to the buffer circuit 14 that drives the light emitting diode 121 of the photocoupler 12 on the lower side of the insulating input circuit 10. Here, it is assumed that the number of external diagnostic signals (ET1, ET2) is smaller than the number of the isolated input circuits 10, and the isolated input circuits 10 are appropriately grouped and then assigned to the isolated input circuits 10 belonging to the same group. On the other hand, the same external diagnostic signals (ET1, ET2) are input, and different external diagnostic signals (ET1, ET2) are input to the isolated input circuits 10 belonging to different groups.

  Incidentally, in FIG. 1, the odd-numbered isolated input circuits 10 (# 1, # 3) are grouped as the first group, and the isolated input circuit 10 (# 1, # 3) has a first external input. A diagnostic signal (ET1) is input. In addition, even-numbered isolated input circuits 10 (# 2, # 4) are grouped as a second group, and the second external diagnostic signal (ET2) is supplied to the isolated input circuits 10 (# 2, # 4). ) Is entered.

  Such grouping is based on the premise that the insulation input circuits 10 belonging to the same group do not have a failure that affects each other, for example, a failure in which the output signals of each other are short-circuited. That is, in order to detect faults that affect each other, different diagnostic signals are required. However, if no faults that affect each other occur, detection of the faults is not necessary, so the same diagnostic signals are used. May be used.

  That is, in FIG. 1, the isolated input circuits 10 (# 1, # 3) are not directly adjacent to each other, so that they do not affect each other, including their output signals, and the isolated input circuit 10 (# 2 and # 4) are not directly adjacent to each other, and therefore, it can be considered that they do not influence each other including their output signals.

  In FIG. 1, the number of groups of the isolated input circuit 10 is 2. However, the actual positional relationship on the printed circuit board on which the isolated input circuit 10 is arranged and the wiring from the isolated input circuit 10 to the signal input unit 41 are shown. Depending on the positional relationship, three or more groups may be appropriately grouped.

  Such grouping of the isolated input circuits 10 is intended to shorten the diagnosis time by inputting the same external diagnosis signals (ET1, ET2) to the same group. Also, different external diagnostic signals (ET1, ET2) are input to the isolated input circuits 10 belonging to different groups, for example, between the adjacent isolated input circuits 10 and between their output wirings. This is designed to detect possible short circuit faults.

  FIG. 2 shows examples of diagnostic modes set in the diagnosis of the PLC 100 according to the embodiment of the present invention, and examples of setting of internal diagnostic signals (IT1 to IT4) and external diagnostic signals (ET1, ET2) in each diagnostic mode. FIG. 2 and the subsequent drawings, the “High” level of the signal is abbreviated as “1” and the “Low” level is abbreviated as “0”.

  The normal operation mode of the PLC 100 (see FIG. 2A) is an operation mode in which the PLC 100 operates normally (that is, not the diagnosis mode). In the normal operation mode, the internal diagnosis signal (IT1 to IT4) and the external diagnosis are performed. The signals (ET1, ET2) are both fixed to “1”. That is, since ET1 = ET2 = “1”, the phototransistor 122 of the photocoupler 12 on the lower side of the isolated input circuit 10 is turned on (conductive state). Accordingly, in the internal diagnosis signals (IT1 to IT4) and the external diagnosis signals (ET1, ET2), “1” is an inactive level and “0” is an active level.

  Therefore, in the normal operation mode, the information that the switch 21 of the load side circuit 20 (#j) is turned ON / OFF immediately becomes “1” / “0” of the output signal dj of the isolated input circuit 10 (#j). Communicated. Also, since ITj = “1”, the signal level “1” / “0” of the output signal dj of the isolated input circuit 10 passes through the AND circuit 30 as it is, and the signal of the input signal DIj of the signal input unit 41 The level becomes “1” / “0” and is taken into the control processing circuit 40 (j = 1, 2, 3, 4).

  Next, the diagnosis mode A (see FIG. 2B) is an operation mode in which diagnosis is performed to detect a failure in the signal input unit 41 inside the control processing circuit 40. In the diagnosis mode A, the signal level of the external diagnosis signal ETk (k = 1, 2) is fixed to “1”. Further, it is assumed that the signal level of the output signal dj of the isolated input circuit 10 is “1”, that is, the switch 21 of the load side circuit 20 is not turned off. Then, the diagnostic signal output unit 44 outputs internal diagnostic signals (IT1 to IT4) whose signal level changes to “1” or “0”.

  That is, in the diagnosis mode A, since the signal level of the output signals (d1 to d4) of the insulation input circuit 10 is “1”, the signal level of the internal diagnosis signals (IT1 to IT4) output from the diagnosis signal output unit 44. ("1" / "0") passes through the AND circuit 30 as it is, and the signal level ("1" / "0") of the input signals (DI1 to DI4) of the signal input unit 41 is output from the control processing circuit 40. It is taken inside.

  The failure determination unit 42 uses the internal diagnostic signal (IT1) output from the diagnostic signal output unit 44 based on the signal level (“1” / “0”) of the input signals (DI1 to DI4) input via the signal input unit 41. ... (IT4) to the signal level (“1” / “0”), and when both signal levels are different, it is determined that the signal input unit 41 has a failure.

  Next, the diagnosis mode B (see FIG. 2C) is an operation mode in which diagnosis is performed in order to detect a failure in the insulation input circuit 10 and a wiring part extending from the insulation input circuit 10 to the signal input part 41. In the diagnosis mode B, it is assumed that the signal level of the internal diagnosis signals (IT1 to IT4) is fixed to “1” and the switch 21 of the load side circuit 20 is not turned off. Then, the diagnostic signal output unit 44 outputs external diagnostic signals (ET1, ET2) whose signal level changes to “1” or “0”.

  The external diagnostic signals (ET1, ET2) have a function of turning on / off the phototransistor 122 of the photocoupler 12 on the lower side of the isolated input circuit 10 as described above. That is, the phototransistor 122 is turned on when the signal level of the external diagnostic signal (ET1, ET2) is “1”, but turned off when it is “0”. That is, the phototransistor 122 functions as a switch that conducts / cuts off the current supplied from the load side circuit 20.

  Therefore, when the signal level of the external diagnostic signal (ET1ET2) is “1”, the signal level of the output signals (d1 to d4) of the insulating input circuit 10 is “1”, and as a result, the input signal of the signal input unit 41 The signal level of (DI1 to DI4) is also “1”. Further, when the signal level of the external diagnostic signal (ET1, ET2) is “0”, the signal level of the output signals (d1 to d4) of the insulating input circuit 10 is “0”. The signal levels of the input signals (DI1 to DI4) are also “0”.

  The failure determination unit 42 outputs the signal level (“1” / “0”) of the input signals (DI 1 to DI 4) input via the signal input unit 41 from the diagnostic signal output unit 44. , IT4) and the signal level (“1” / “0”) of the two, and if the two signal levels differ, it is determined that the insulation input circuit 10 has a failure. Here, when it is determined that there is a failure in the isolated input circuit 10, there may be a failure in the wiring unit from the isolated input circuit 10 to the signal input unit 41, the AND circuit 30, and the signal input unit 41. included.

  As described above, when the switch 21 of the load side circuit 20 is not turned off, the PLC 100 illustrated in FIG. 1 performs the diagnosis in the diagnosis mode A and the diagnosis mode B illustrated in FIG. In addition, it is possible to detect a failure in the insulating input circuit 10 and the wiring section from the insulating input circuit 10 to the signal input section 41.

  Next, a case where it is assumed that the switch 21 of the load side circuit 20 can be turned off during the diagnosis of the diagnosis mode A or the diagnosis mode B shown in FIG. In this case, since the truth tables shown in FIGS. 2B and 2C are not established, failure detection of the signal input unit 41 and the insulation input circuit 10 cannot be performed. However, when the failure to be detected is limited to the dangerous failure, the dangerous failure can be detected by slightly changing the diagnostic mode A and the diagnostic mode B.

  Here, the dangerous failure refers to a failure in which the entire system to which the PLC 100 such as a plant is applied becomes in a dangerous state if the failure is left unattended. For example, assume that the “closed” and “open” states of a valve in the plant correspond to digital inputs “0” and “1”. Further, it is assumed that the furnace temperature is controlled by the water flow rate by opening and closing the valve. In that case, when the temperature of the furnace needs to be lowered by increasing the water flow rate, the controller of the system does not need to open if the valve is in the “open” state (“1”), but the “closed” state ("0") must be opened. If only the “open” state (“1”) signal is input to the controller, the controller recognizes that the valve is open and does not issue an instruction to open the valve.

  Here, if a signal in the “open” state (“1”) continues to be input due to a circuit failure inside the controller, and the actual valve is in the “closed” state (“0”), the valve is indefinitely Will not open. In that case, the plant cannot obtain the necessary water flow rate, the temperature of the furnace rises, and the plant falls into a dangerous state. In other words, in this case, a fault that mistakes the “closed” state (“0”) for the “open” state (“1”) corresponds to a dangerous failure. Such a dangerous failure needs to be detected immediately even during operation of the system.

  On the other hand, when only a “closed” (“0”) signal is input due to a circuit failure in the controller, an instruction to open the valve is issued even though the valve is open. In this case, since the water flow never stops, the temperature of the furnace will not rise and the plant will not be in danger. That is, a fault that mistakes the “open” state (“1”) as the “closed” state (“0”) does not correspond to a dangerous side failure. It is called a breakdown.

  Such a non-dangerous failure does not necessarily have to be detected immediately. It may be more convenient for the plant manager to operate in the event of a failure and repair the failure later. If all faults are detected and the system is stopped each time, the availability of the system will be reduced. That is, even if a non-hazardous failure is not detected, the safety of the system is not greatly impaired by this, and conversely, the system performance can be improved.

  Next, referring to FIGS. 2D and 2E, even if the switch 21 of the load side circuit 20 is turned OFF during diagnosis, at least a diagnosis mode A ′ and diagnosis capable of detecting a dangerous side failure. Mode B ′ will be described. Here, the dangerous failure in FIG. 1 is a failure in which the activation signal from the load circuit 20 is not transmitted to the control processing circuit 40 (signal input unit 41), and therefore the output signals (d1 to d4) of the insulation input circuit 10 are not used. ) Corresponds to a failure in which the activation level “0” is mistaken as “1”.

  The diagnosis mode A ′ (see FIG. 2D) is an operation mode for performing a diagnosis for detecting a dangerous failure in the signal input unit 41 inside the control processing circuit 40. In the diagnostic mode A ′, the diagnostic signal output unit 44 sets and outputs the signal level of the external diagnostic signal ETk (k = 1, 2) to the inactive level “1” and the internal diagnostic signals (IT1 to IT4). ) Is set to the active level “0” and output.

  In this case, the signal level “0” of the internal diagnostic signals (IT1 to IT4) output from the diagnostic signal output unit 44 is equal to the AND circuit 30 regardless of the signal level of the output signals (d1 to d4) of the insulation input circuit 10. And the signal level “0” of the input signals (DI1 to DI4) of the signal input unit 41 is taken into the control processing circuit 40.

  The failure determination unit 42 receives the signal level “0” of the input signals (DI1 to DI4) input via the signal input unit 41, and the signal level of the internal diagnosis signals (IT1 to IT4) output from the diagnosis signal output unit 44. If both signal levels are different from “0”, it is determined that the signal input unit 41 has a failure. Therefore, the failure determination unit 42 can detect a dangerous failure, which is a failure in which the signal input unit 4 mistakes “0” as “1”.

  In the diagnosis mode A ′, the failure determination unit 42 is input via the signal input unit 41 when the signal level of the internal diagnosis signals (IT1 to IT4) is set to the inactive level “1”. The signal levels of the input signals (DI1 to DI4) and the internal diagnostic signals (IT1 to IT4) output from the diagnostic signal output unit 44 are not compared. Accordingly, a non-dangerous fault that erroneously sets “1” in the signal input unit 41 to “0” is not always detected.

  In addition, if the diagnosis signal output unit 44 or the wiring part from the diagnosis signal output unit 44 to the signal input unit 41 is faulty by performing the diagnosis in the diagnosis mode A ′, the signal input unit 41 is faulty. It may be determined that there is. In that case, even if the failure is a failure that does not affect the normal operation of the PLC 100, a predetermined failure recovery process is performed, but a failure related to safety is not overlooked, so the so-called fail-safe property is ensured. Will be.

  When the switch 21 of the load side circuit 20 is turned from ON to OFF or from OFF to ON during execution of the diagnostic mode A ′, the signal level of the output signal dj of the isolated input circuit 10 is “0” to “1”, Alternatively, the output signal dj is changed from “1” to “0”, but the output signal dj is masked by the signal level “0” of the internal diagnosis signal ITj of the AND circuit 30. Therefore, ON / OFF of the switch 21 of the load side circuit 20 does not affect the operation of the diagnostic mode A ′.

  Next, the diagnosis mode B ′ (see FIG. 2E) is an operation mode in which diagnosis is performed to detect a dangerous failure in the insulated input circuit 10 and the wiring section from the insulated input circuit 10 to the signal input section 41. It is. In the diagnostic mode B ′, the signal level of the internal diagnostic signals (IT1 to IT4) is set to the inactive level “1” and output, and the signal level of the external diagnostic signals (ET1, ET2) is set to the active level “0”. Set and output.

  The external diagnostic signals (ET1, ET2) have a function of turning on / off the phototransistor 122 of the photocoupler 12 on the lower side of the isolated input circuit 10 as described above. That is, the phototransistor 122 is turned on when the signal level of the external diagnostic signal (ET1, ET2) is “1”, but turned off when it is “0”. That is, the phototransistor 122 functions as a switch that conducts / cuts off the current supplied from the load side circuit 20.

  In the diagnostic mode B ′, the signal level of the external diagnostic signal (ET1, ET2) is “0”, so that the signal level of the output signals (d1 to d4) of the insulating input circuit 10 is “0”. The signal level of the input signals (DI1 to DI4) of the input unit 41 is also “0”.

  The failure determination unit 42 outputs the signal level (“1” / “0”) of the input signals (DI 1 to DI 4) input via the signal input unit 41 from the diagnostic signal output unit 44. , ET2) compared to the signal level (“0”), and if the two signal levels are different, it is determined that the insulation input circuit 10 has a failure. Therefore, the failure determination unit 42 can detect a dangerous failure, which is a failure in which the isolated input circuit 10 erroneously outputs “0” as “1”.

  In the diagnosis mode B ′, the failure determination unit 42 is input via the signal input unit 41 when the signal level of the external diagnosis signal (ET1, ET2) is set to the inactive level “1”. The signal levels of the input signals (DI1 to DI4) and the external diagnostic signals (ET1, ET2) output from the diagnostic signal output unit 44 are not compared. Therefore, a non-hazardous failure in which the isolated input circuit 10 erroneously outputs “1” as “0” is not always detected.

  Further, when the switch 21 of the load side circuit 20 is turned from ON to OFF or from OFF to ON while the diagnosis mode B ′ is being executed, it seems that current flows through the light emitting diode 111 of the photocoupler 11 of the isolated input circuit 10. Since the lower photocoupler 12 is turned off by the external diagnostic signals (ET1, ET2), no current flows through the light emitting diode 111 of the photocoupler 11. Therefore, the operation of the diagnostic mode B 'is not affected.

  In the diagnosis in the diagnosis mode B ′, not only the failure of the insulation input circuit 10 but also the failure in the wiring portion from the insulation input circuit 10 to the signal input portion 41 of the control processing circuit 40 and the failure in the signal input portion 41 are detected. Detected.

  FIG. 3 is a diagram showing an example of diagnostic data used in the diagnosis of the PLC 100 according to the embodiment of the present invention, and FIG. 4 is an example of a timing chart of diagnostic signals generated based on the diagnostic data of FIG. FIG. Here, the diagnostic data refers to data that determines the signal level of (a plurality of) diagnostic signals supplied to the circuit to be diagnosed. Further, the diagnostic data may include an expected value of a signal level obtained from a signal included in a circuit to be diagnosed.

  In the present embodiment, the circuit to be diagnosed is the insulation input circuit 10, the signal input unit 41 of the control processing circuit 40, and the wiring part from the insulation input circuit 10 to the signal input unit 41. The diagnostic signals supplied to the diagnosis target circuit are internal diagnostic signals (IT1 to IT4) and external diagnostic signals (ET1, ET2). In addition, signals to be inspected in the diagnosis (hereinafter referred to as inspection target signals) are input signals (DI1 to DI4) of the signal input unit 41.

  In FIGS. 3 and 4, t0 to t8 represent diagnostic cycles. The diagnosis cycle is the main body (control processing circuit 40) that executes the diagnosis inputs the diagnosis signal based on a set of diagnosis data to the diagnosis target circuit, acquires the signal level of the inspection target signal, and acquires the signal level This is a cycle that is a unit of diagnostic processing until the signal level of the signal to be inspected is compared with a known expected value level to determine the presence or absence of a failure.

In FIG. 3, the diagnostic data of the diagnostic signals (IT1, IT2, IT3, IT4, ET1, ET2) for the diagnostic cycles t0, t1, t2, t3, t4 for executing the diagnostic modes A, A ′ are as follows:
t0: (1,1,1,1,1,1),
t1: (0, 1, 1, 1, 1, 1),
t2: (1, 0, 1, 1, 1, 1),
t3: (1,1,0,1,1,1),
t4: (1, 1, 1, 0, 1, 1)
It is.

Further, the inspection target signal at that time is an input signal (DI1, DI2, DI3, DI4) of the signal input unit 41, and an expected value thereof is
t0: (1, 1, 1, 1),
t1: (0, 1, 1, 1),
t2: (1, 0, 1, 1),
t3: (1, 1, 0, 1),
t4: (1, 1, 1, 0)
It is.

  FIG. 3 shows the diagnostic data of the diagnostic signals (IT1, IT2, IT3, IT4, ET1, ET2) and the input signal of the signal input unit 41 that is the inspection target signal in the case of the diagnostic modes B and B ′. Expected values of (DI1, DI2, DI3, DI4) are also described. In FIG. 3, the diagnostic data of the diagnostic cycles t0, t5, and t8 is diagnostic data for confirming the state of the normal operation mode.

  FIG. 4 is a timing chart showing the diagnostic signal and the expected value signal generated based on these diagnostic data. However, the expected value signal does not represent the time delay that occurs in the diagnostic target circuit.

  In FIG. 4, the diagnostic cycles in diagnostic modes A and A ′ are short and the diagnostic cycles in diagnostic modes B and B ′ are long. This is because the length of the diagnostic cycle is actually matched. is there. That is, in the diagnostic modes A and A ′, the isolated input circuit 10 including the photocouplers 11 and 12 having a slow response speed is not included in the diagnosis target circuit, and in the diagnostic modes B and B ′, the response speed is high. This is because the isolated input circuit 10 including the slow photocouplers 11 and 12 is included in the diagnosis target circuit. Incidentally, the diagnostic cycle in the diagnostic modes A and A 'only takes a few microseconds, whereas the diagnostic cycle in the diagnostic modes B and B' is at least 100 microseconds.

  In the diagnostic modes A and A ′, the internal diagnostic signals (IT1, IT2, IT3, IT4) are limited to one signal to be set to the active level (“0”) and the active level (“0”). The timing to be shifted is shifted by one diagnostic cycle. This is intended to make it possible to inspect whether or not the activated signal affects other signals that are not activated due to a short circuit between signals in the circuit to be diagnosed.

For example, when the input signals DI2 and DI3 are short-circuited inside the signal input unit 41, the input obtained at the diagnosis cycles t2 and t3 in the actual control processing circuit 40 (semiconductor integrated circuit). The signal level data of the signals (DI1, DI2, DI3, DI4) has an expected value of t2: (1, 0, 1, 1),
t3: (1, 1, 0, 1),
For example, t2: (1, 1, 1, 1),
t3: (1,1,1,1)
This is different from the expected value.

  Therefore, the diagnostic data for diagnosing the signal input unit 41 in the diagnostic modes A and A ′ shown in FIG. 3, that is, the data of one activation level “0” is one diagnostic signal for each diagnostic cycle. The diagnostic data that moves can be said to be diagnostic data that can detect a short circuit between the input signals of any combination of the input signals included in the signal input unit 41.

  In general, short circuits occur between circuits or wirings that are arranged to be physically adjacent. Therefore, it can be said that the diagnostic data of the diagnostic mode A shown in FIG. 3 is excessive diagnostic data. However, when the control processing circuit 40 is configured by a semiconductor integrated circuit, specifying how the circuits and wirings are arranged in the semiconductor integrated circuit is not possible for a semiconductor integrated circuit such as a semiconductor vendor. This is possible for those who design the internal wiring, but otherwise it is generally difficult. That is, the designer who designs the PLC 100 cannot specify which signals can be short-circuited. Therefore, since it is necessary to consider a short circuit between all combinations of signals, the diagnostic data in the diagnostic modes A and A ′ shown in FIG. 3 is not necessarily excessive and can be said to be appropriate diagnostic data.

  On the other hand, the diagnosis target circuit in the diagnosis modes B and B ′ is the isolated input circuit 10 installed on the printed circuit board constituting the PLC 100. In this case, for the designer of the PLC 100, the arrangement information of the insulated input circuits 10 (# 1 to # 4) is known information or information that can be easily obtained visually. In this case, it is possible to omit a diagnostic signal for detecting a short circuit failure between circuits or signals that are not likely to be short-circuited with each other.

  Therefore, in the present embodiment, in the diagnostic modes B and B ′, the isolated input circuits 10 that are not likely to be short-circuited with each other are grouped. The same diagnostic signal is supplied to the isolated input circuits 10 belonging to the same group. In this way, the number of different diagnostic signals can be reduced, and diagnostic data can be reduced.

  Here, the insulated input circuits 10 that are not likely to be short-circuited with each other means the insulated input circuits 10 arranged at positions that are not directly adjacent to each other on the printed circuit board, including wiring of their output signals. In addition, in the case of wiring, not only the adjacency in the planar positional relationship but also the adjacency in the positional relationship between the upper layer and the lower layer through the insulating layer is included.

  Incidentally, in the PLC 100 of FIG. 1, the isolated input circuits 10 (# 1, # 3) that are not adjacent to each other are set as the first group on the printed board on which the PLC 100 is mounted, and similarly, other isolated input circuits that are not adjacent to each other. Let 10 (# 2, # 4) be the second group. Then, an external diagnostic signal ET1 is supplied to the first group of isolated input circuits 10 (# 1, # 3), and an external diagnostic signal is supplied to the second group of isolated input circuits 10 (# 2, # 4). Supply signal ET2.

  That is, when the insulation input circuit 10 is not grouped, four external diagnostic signals are required. However, as a result of grouping, only two external diagnostic signals are required. Further, since the number of external diagnostic signals is two, the diagnostic data for generating the external diagnostic signals (ET1, ET2) is substantially diagnostic data with diagnostic cycles t6 and t7 (see FIG. 3, see Fig. 4).

  When the isolated input circuits 10 are grouped into two groups, the effect of reducing the number of external diagnostic signals and the number of diagnostic data increases as the number of isolated input circuits 10 increases. In the example of FIG. 1 (when the 4 isolated input circuits 10 are grouped into 2 groups), the number of external diagnostic signals and the number of diagnostic data are both reduced from 4 to 2, but 32 isolated inputs. When the circuit 10 is grouped into two groups, the number of external diagnostic signals and the number of diagnostic data are both reduced from 32 to 2.

  Here, the effect of reducing the diagnosis data is naturally connected to the effect of shortening the diagnosis time. This is because one diagnostic data corresponds to one diagnostic cycle.

  By the way, as described above, the diagnosis in the diagnosis modes B and B ′ is performed in order to detect a failure of the isolated input circuit 10. In that case, the isolated input circuit 10 includes the photocouplers 11 and 12, and the operation cycle time of the photocouplers 11 and 12 is long (for example, 100 μsec), so that the diagnosis cycle time is long (for example, 200 μsec). ) There are circumstances that must be done.

  For example, when the diagnosis cycle time is 200 μs and the number of diagnosis data is 32, the diagnosis time is 6400 μs. When the number of diagnosis data is 2, the diagnosis time is It only takes 400 microseconds. Therefore, it can be said that the effect of shortening the test time in the diagnosis modes B and B ′ is a particularly significant effect in the diagnosis of the PLC 100.

  As described above, the number of groups in which the isolated input circuit 10 is grouped is not limited to two. The mounting status of the insulated input circuit 10 on the printed circuit board, and further the mounting status of the wiring from the insulated input circuit 10 to the signal input unit 41 are examined, and a short circuit failure other than the adjacent insulated input circuits 10 is also examined. If there is a failure that affects each other, the isolated input circuit 10 may be appropriately grouped into three or more groups.

  FIG. 5 is a diagram showing a flow of diagnostic processing in the diagnostic mode A ′ performed in the control processing circuit 40, and FIG. 6 is a diagram showing a flow of diagnostic processing in the diagnostic mode B ′. These processes are performed by the diagnostic signal generation unit 43, the diagnostic signal output unit 44, and the failure determination unit 42 in the control processing circuit 40. In addition, although the execution subject that performs these processes is an arithmetic processing circuit or a program processing circuit included in the control processing circuit 40, it is described in this specification as “the control processing circuit 40 performs... . Note that the flow of diagnostic processing in diagnostic mode A and diagnostic mode B is similar to that in FIGS.

  As shown in FIG. 5, the control processing circuit 40 first sets the diagnosis mode A '(step S12). In this step, information indicating that the diagnosis in the diagnosis mode A ′ is being executed is stored in a predetermined storage element.

  Next, the control processing circuit 40 starts loop processing according to the diagnosis data in the diagnosis mode A ′ (see FIG. 3, diagnosis data of t0 to t4). That is, after that, the control processing circuit 40 loops and processes up to step S20 as many times as the number of diagnostic data (step S13). The diagnosis data is prepared in advance and is stored in a memory built in the control processing circuit 40, for example.

  Next, the control processing circuit 40 sets the internal diagnostic signals (IT1 to IT4) to the signal level “0” based on the given diagnostic data, and then goes to the outside of the control processing circuit 40 via the diagnostic signal output unit 44. Output (step S14). In the diagnostic mode A ′, the signal level of the external diagnostic signals (ET1, ET4) is fixed to the inactive level “1”.

  Next, the control processing circuit 40 inputs the output internal diagnostic signals (IT1 to IT4) into the control processing circuit 40 via the signal input unit 41 (step S15), and the input signal (DI1) -DI4) are hereinafter referred to as input diagnostic signals (DI1-DI4).

  Next, the control processing circuit 40 compares the output internal diagnostic signals (IT1 to IT4) and the input diagnostic signals (DI1 to DI4) (step S16), and if they do not match (in step S17). No), it is determined that there is a failure in the signal input unit 41 or its peripheral part (step S18). If they match (Yes in step S17), it is determined that there is no failure (step S19). When these determinations are finished, the processing of one diagnostic cycle is finished, and the loop processing of one unit from step S13 is finished (step S20).

  Note that the processing in one loop from step S13 to step S19 corresponds to the processing of one diagnostic cycle.

  When the control processing circuit 40 finishes the predetermined number of loop processes, the control processing circuit 40 determines whether or not there is a “failure” diagnostic cycle in the loop processing. (Yes in step S21), the above-described failure recovery processing is executed (step S22). If there is no “failure” diagnostic cycle (No in step S21), the setting of the diagnostic mode A ′ is canceled and the process is terminated.

  Next, the flow of diagnosis processing in the diagnosis mode B ′ will be described with reference to FIG. First, the control processing circuit 40 sets the diagnosis mode B '(step S32). In this step, information indicating that the diagnosis in the diagnosis mode B ′ is being executed is stored in a predetermined storage element.

  Next, the control processing circuit 40 starts loop processing according to the diagnostic data in the diagnostic mode B ′ (see FIG. 3, diagnostic data from t5 to t8). That is, after that, the control processing circuit 40 loops and processes up to step S41 as many times as the number of diagnostic data (step S33). The diagnosis data is prepared in advance and is stored in a memory built in the control processing circuit 40, for example.

  Next, the control processing circuit 40 sets the external diagnostic signals (ET1, ET2) to the signal level “0” based on the given diagnostic data, and outputs the generated external diagnostic signals (ET1, ET2) to the diagnostic signal output unit. It outputs to the outside of the control processing circuit 40 via 44 (step S34). In the diagnostic mode B ′, the signal level of the external diagnostic signals (ET1, ET4) is fixed to the inactive level “1”.

  Next, the control processing circuit 40 supplies the output external diagnostic signals (ET1, ET2) to the isolated input circuit 10 (step S35), and outputs the output signals (d1 to d4) obtained by the operation of the isolated input circuit 10. Then, the signal is input to the inside of the control processing circuit 40 via the signal input unit 41 (step S36) and is set as an input diagnostic signal (DI1 to DI4). In the isolated input circuit 10, the isolated input circuits 10 (# 1, # 3) that are not adjacent to each other are grouped into the first group, and the other isolated input circuits 10 (# 2, # 4) that are not adjacent to each other are the first. It is assumed that they are grouped into two groups.

  Next, the control processing circuit 40 compares the input diagnostic signals (DI1 to DI4) with the expected values predicted from the output external diagnostic signals (ET1, ET2) (step S37), and the two do not match. If it is determined (No in step S38), it is determined that there is a failure in the insulated input circuit 10 or the wiring part from the insulated input circuit 10 to the signal input unit 41 (step S39). If the two match (Yes in step S38), it is determined that there is no failure (step S40). When these determinations are finished, the processing of one diagnostic cycle is finished, and the loop processing of one unit from step S33 is finished (step S41).

  Next, after completing the predetermined number of loop processes, the control processing circuit 40 determines whether or not there is a “failure” diagnosis cycle in the loop process, and there is a “failure” diagnosis cycle. In such a case (Yes in step S42), the above-described failure recovery processing is executed (step S43). If there is no “failure” diagnostic cycle (No in step S42), the setting of the diagnostic mode B ′ is canceled and the process is terminated.

  As described above, according to the present embodiment, the input circuit for the isolated input circuit 10, the signal input unit 41 of the control processing circuit 40, and the wiring unit from the isolated input circuit 10 to the signal input unit 41, that is, the PLC 100. It becomes possible to detect the failure of the part. Further, the process for performing the failure detection is a process in which the control processing circuit 40, that is, the PLC 100, performs a failure detection in its own input circuit unit. Is.

  Therefore, if the method for self-diagnosis of the input circuit portion shown in this embodiment is added to the method for self-diagnosis of the PLC internal circuit as shown in the cited document 1, a more reliable PLC can be obtained. It can be realized.

  FIG. 7 is a diagram showing a modification of the configuration of the PLC 100 according to the embodiment of the present invention. As shown in FIG. 7, the PLC 100a according to the modification of the embodiment is obtained by inverting the configuration of the PLC 100 according to the embodiment described above and the signal level in the diagnostic processing. In FIG. 7, the same components as those shown in FIG. Further, in a modification of the present embodiment, a state in which the control processing circuit 40 recognizes that the switch is turned on even though the switch 21 is turned off is regarded as a dangerous failure. It is assumed that the failure should be detected in the modified example. Hereinafter, only the parts of this modification that are different from the original embodiment will be described.

  In the PLC 100a of this modified example, the signal input to the signal input unit 41 is a signal obtained by inverting the signal level of the output (IT1 to IT4) from the diagnostic signal output unit 44 via the OR circuit 30a, and the isolated input circuit. OR of the signal level with the output dj. In the isolated input circuit 10a, a photocoupler 11a driven from a load side circuit and a photocoupler 12a driven by a signal obtained by inverting diagnostic signals (ET1 to ET2) by an inverter element are connected in parallel. In the load side circuit, it is assumed that the switch 21a is normally OFF. Therefore, if the signals (IT1 to IT4, ET1 to ET2) output from the diagnostic signal output unit are at the signal level “1”, the state of the switch 21 of the load side circuit is transmitted to the signal input units (DI1 to DI4). If the signals (IT1 to IT4, ET1 to ET2) output from the diagnostic signal output unit are the signal level “0”, the inputs to the signal input units (DI1 to DI4) are forcibly set to the signal level “1”.

  Accordingly, the signal levels determined by the failure determination unit 42a in both the diagnosis modes A and A ′ and the diagnosis modes B and B ′ are inverted values of the signals (IT1 to IT4 and ET1 to ET2) output from the diagnosis signal output unit 44. become. That is, the signal level of the signals (IT1 to IT4, ET1 to ET2) output from the diagnostic signal output unit 44 is “0”, whereas the failure determination unit receives signals (DI1 to DI1) from the signal input unit 41. If the signal level of DI4) is “1”, it is normal, and if it is “0”, it is determined that there is a failure.

  Except for the above, the configuration of the PLC 100a and the diagnostic processing performed in the PLC 100a are the same as those in the original embodiment. By such a configuration of the PLC 100a and its diagnostic processing, a failure is detected in the isolated input circuit 10, the signal input unit 41 in the control processing circuit 40a, and the wiring unit from the isolated input circuit 10 to the signal input unit 41. Can be able to. However, the failure modes (short-circuit / disconnection between wirings) that can be detected differ between the two circuit configurations. In the PLC 100, a signal level “0” is input to one of a plurality of signal input units (DI1 to DI4), and “1” is input to the other. Therefore, if adjacent wires are short-circuited, “0” is input. A short circuit can be detected by detecting an input of “1” with a wiring that is expected. On the other hand, since the PLC 100a inputs the signal level “1” to any one of the plurality of signal input units (DI1 to DI4) and inputs “0” to the other, the input of “1” is expected like the PLC 100. A short circuit can be detected by detecting an input of “0” by wiring. Furthermore, not only that, but also a case where a signal is not transmitted due to the disconnection of the wiring can be detected.

  It should be noted that the modification of this embodiment can be operated in combination with the configuration of the PLC 100. Thereby, it becomes possible to detect a non-dangerous fault that is not so at the same time as a dangerous fault.

DESCRIPTION OF SYMBOLS 10 Insulation input circuit 11, 12 Photocoupler 13 Inverter 14 Buffer circuit 20 Load side circuit 21 Switch 22 Power supply 30 AND circuit 40 Control processing circuit 41 Signal input part 42 Fault determination part 43 Diagnostic signal generation part 44 Diagnostic signal output part 100 PLC
111, 121 Light-emitting diode 112, 122 Phototransistor

Claims (4)

It provided in the semi conductor integrated circuit, the signal input unit for inputting an external signal of the semiconductor integrated circuit to the interior thereof, a diagnostic signal generation unit for generating a predetermined diagnostic signal, the diagnostic signal wherein the generating semiconductor a diagnostic signal output section for outputting to the outside of the integrated circuit, and the basis of the signal input portion signals and the generated diagnostic signal acquired through determines failure determination section whether a failure in a predetermined circuit section, A control processing circuit comprising:
Insulated input circuit provided outside the semiconductor integrated circuit and having a signal conversion unit for converting a signal current supplied from an external load side circuit into a predetermined signal level, and a switch for cutting off the signal current When,
A programmable logic controller comprising:
The control processing circuit includes:
The first diagnostic signal generated by the diagnostic signal generation unit is output from the diagnostic signal output unit to the outside of the semiconductor integrated circuit as a signal that changes in a first period ,
The output first diagnostic signal is input as it is through the signal input unit,
The failure determination unit determines whether or not there is a failure in the signal input unit by comparing the input signal and the output first diagnostic signal,
further,
The second diagnostic signal generated by the diagnostic signal generation unit is output from the diagnostic signal output unit to the outside of the semiconductor integrated circuit as a signal that changes in a second cycle longer than the first cycle ,
When the output second diagnostic signal is input to the insulation input circuit as a signal for controlling opening and closing of a switch included in the insulation input circuit, the signal output from the insulation input circuit is converted to the signal input unit. Enter through
By comparing the input signal and the output second diagnostic signal by the failure determination unit, a failure occurs in the insulation input circuit and the wiring unit from the insulation input circuit to the signal input unit. A programmable logic controller characterized by determining whether or not it exists. In contrast to the isolated input circuits that are grouped so that the isolated input circuits that are not adjacent to each other, including the wiring of their output signals, belong to the same group, the isolated input circuits that belong to the same group include the second same diagnostic signal of the diagnostic signal is input, the said isolated input circuits belonging to different groups from each other, programmable according to claim 1, characterized in that different diagnostic signal of the second diagnostic signal is input Logic controller. It provided in the semi conductor integrated circuit, the signal input unit for inputting an external signal of the semiconductor integrated circuit to the interior thereof, a diagnostic signal generation unit for generating a predetermined diagnostic signal, the diagnostic signal wherein the generating semiconductor a diagnostic signal output section for outputting to the outside of the integrated circuit, and the basis of the signal input portion signals and the generated diagnostic signal acquired through determines failure determination section whether a failure in a predetermined circuit section, A control processing circuit comprising:
Insulated input circuit provided outside the semiconductor integrated circuit and having a signal conversion unit for converting a signal current supplied from an external load side circuit into a predetermined signal level, and a switch for cutting off the signal current When,
A fault diagnosis method in a programmable logic controller configured to include:
The control processing circuit includes:
The first diagnostic signal generated by the diagnostic signal generation unit is output from the diagnostic signal output unit to the outside of the semiconductor integrated circuit as a signal that changes in a first period ,
The output first diagnostic signal is input as it is through the signal input unit,
The failure determination unit determines whether or not there is a failure in the signal input unit by comparing the input signal and the output first diagnostic signal,
further,
The second diagnostic signal generated by the diagnostic signal generation unit is output from the diagnostic signal output unit to the outside of the semiconductor integrated circuit as a signal that changes in a second cycle longer than the first cycle ,
When the output second diagnostic signal is input to the insulation input circuit as a signal for controlling opening and closing of a switch included in the insulation input circuit, the signal output from the insulation input circuit is converted to the signal input unit. Enter through
By comparing the input signal and the output second diagnostic signal by the failure determination unit, a failure occurs in the insulation input circuit and the wiring unit from the insulation input circuit to the signal input unit. A fault diagnosis method in a programmable logic controller, characterized by determining whether or not it exists. In contrast to the isolated input circuits that are grouped so that the isolated input circuits that are not adjacent to each other, including the wiring of their output signals, belong to the same group, the isolated input circuits that belong to the same group include the second 4. The programmable signal according to claim 3 , wherein diagnostic signals having the same diagnostic signal are input, and different diagnostic signals of the second diagnostic signal are input to the isolated input circuits belonging to different groups. Fault diagnosis method for logic controller.

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