JP5064824B2 - Semiconductor element - Google Patents

Description

  The present invention relates to a semiconductor element including a compound semiconductor layer stacked on a substrate via a buffer layer.

  A semiconductor element formed using a compound semiconductor is a promising electronic element as a high-voltage element and a high-speed element because of the characteristics inherent to compound semiconductor materials such as direct transition. As such a semiconductor element, a high electron mobility transistor (HEMT) formed using a nitride compound semiconductor, which is a kind of field effect transistor (FET), has recently attracted attention. Various HEMTs have been proposed.

  FIG. 8 is a cross-sectional view showing an example of a conventional HEMT formed using a GaN-based compound semiconductor as a nitride-based compound semiconductor. In the HEMT 21 shown in FIG. 8, a low-temperature buffer layer 23 made of GaN, a buffer layer 24 made of GaN, an electron transit layer 25 made of GaN, and an electron supply made of AlGaN are formed on a substrate 22 such as a sapphire substrate. The layer 26 is stacked in this order to form a heterojunction structure. On the electron supply layer 26, a source electrode 27S, a gate electrode 27G, and a drain electrode 27D are disposed. A contact layer made of n-GaN (not shown) is formed between the source electrode 27S and the drain electrode 27D and the electron supply layer 26 to reduce the contact resistance between the layers.

  In the HEMT 21 having such a configuration, a two-dimensional electron gas formed immediately below the heterojunction interface between the electron transit layer 25 and the electron supply layer 26 is used as a carrier. When the source electrode 27S and the drain electrode 27D are operated, the electrons supplied to the electron transit layer 25 travel at a high speed in the two-dimensional electron gas layer 25a and move to the drain electrode 27D. At this time, by controlling the voltage applied to the gate electrode 27G and changing the thickness of the depletion layer immediately below the gate electrode 27G, electrons moving from the source electrode 27S to the drain electrode 27D, that is, the drain current can be controlled. .

  By the way, in a semiconductor element such as HEMT, it is generally necessary to increase the resistance of the buffer layer for the purpose of suppressing the occurrence of leakage current in the buffer layer. In the case where the buffer layer has not been increased in resistance, for example, in the HEMT 21 shown in FIG. 8, even if the depletion layer directly under the gate electrode 27G is expanded to turn off the drain current, the leakage current flows into the buffer layer 24 and the low-temperature buffer layer 23. Causes a problem that it cannot be completely turned off. On the other hand, a method of increasing the resistance of the buffer layer has been proposed (see, for example, Patent Documents 1 and 2). Patent Documents 1 and 2 disclose a method of increasing resistance by adding (doping) impurities such as Zn and Mg to a buffer layer made of GaN.

JP 2002-57158 A JP 2003-197643 A

  However, in a semiconductor device such as a HEMT having a buffer layer whose resistance is increased by doping impurities, the electrical characteristics related to the output current change over time, in other words, the phenomenon where the reproducibility of the output current characteristics deteriorates. There was a problem that the occurrence of “current collapse” became prominent. This current collapse occurs when a part of the doped impurities that are not activated are charged when a current is passed through the semiconductor element, preventing the movement of electrons in the two-dimensional electron gas layer. Presumed to be.

  On the other hand, in the case of a charge effect transistor having an insulated gate, such as a MISFET (Metal Insulator Semiconductor FET) and a MOSFET (Metal Oxide Semiconductor FET), the impurity concentration when a p-type impurity such as Zn or Mg is added to a GaN compound semiconductor. Accordingly, the resistance of the buffer layer can be increased to increase the breakdown voltage of the element, but the threshold voltage increases with the increase of the breakdown voltage, and there is a problem that the controllability of the field effect transistor is lowered.

  The present invention has been made in view of the above, and provides a semiconductor device in which impurities are doped to increase the resistance of a buffer layer without deteriorating current collapse, and leakage current generated in the buffer layer is reduced. The purpose is to do.

  Another object of the present invention is to provide a semiconductor element that can increase the breakdown voltage of the element without increasing the threshold voltage.

  In order to solve the above-described problems and achieve the object, a semiconductor element according to the present invention includes a compound semiconductor layer stacked on a substrate via a buffer layer, and the buffer layer is added with carbon. The added carbon concentration is equal to or lower than the concentration at which the current collapse rapidly changes with respect to the carbon concentration, and is equal to or higher than the concentration at which the breakdown voltage of the semiconductor element changes rapidly with respect to the carbon concentration. It is characterized by.

In the semiconductor device according to the present invention, the carbon concentration is 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less.

  Further, the semiconductor element according to the present invention is a semiconductor element comprising a compound semiconductor layer stacked on a substrate via a buffer layer, and a layer thickness from a layer serving as a current path in the compound semiconductor layer to the buffer layer is The current collapse is not less than the thickness at which the current collapse is rapidly changed with respect to the layer thickness, and is not more than the thickness at which the breakdown voltage of the semiconductor element is rapidly changed with respect to the layer thickness.

  In the semiconductor device according to the present invention as set forth in the invention described above, the layer serving as the current path is a two-dimensional electron gas layer formed at a heterojunction interface in the compound semiconductor layer.

  In the semiconductor device according to the present invention, the layer thickness is 0.05 μm or more and 1 μm or less.

  The semiconductor device according to the present invention is a semiconductor device comprising a compound semiconductor layer stacked on a substrate via a buffer layer, and is stacked between the buffer layer and the compound semiconductor layer, and the compound semiconductor It is characterized by comprising a carbon concentration transition layer to which carbon is added so that the addition concentration increases according to the distance in the stacking direction from the layer toward the buffer layer.

  The semiconductor element according to the present invention is stacked between the buffer layer and the compound semiconductor layer in the above invention, and added according to the distance in the stacking direction from the compound semiconductor layer toward the buffer layer. A carbon concentration transition layer to which carbon is added so as to increase the concentration is provided.

  The semiconductor element according to the present invention is the above-described invention, wherein the concentration of carbon added to the carbon concentration transition layer is determined from the carbon concentration of the compound semiconductor layer according to the distance in the stacking direction. It is characterized by changing to a carbon concentration of.

  In the semiconductor device according to the present invention, the thickness of the carbon concentration transition layer is 1 μm or less.

In the semiconductor device according to the present invention, the carbon concentration between layer thicknesses from the heterojunction interface in the compound semiconductor layer to the buffer layer or the carbon concentration transition layer is 1 × 10 ¹⁷ cm ^{−. It is 3} or less.

In the semiconductor device according to the present invention, in the above invention, the compound semiconductor layer and at least one of the buffer layer and the carbon concentration transition layer may be Al _1-xy Ga _x In _y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) based semiconductor material.

  The semiconductor element according to the present invention is characterized in that, in the above invention, the semiconductor element is a diode or a field effect transistor.

  The semiconductor device according to the present invention is a semiconductor device comprising a buffer layer, a semiconductor operation layer, an insulating layer, and an electrode layer sequentially stacked on a substrate, wherein the buffer layer is a nitride compound semiconductor to which carbon is added. The nitride compound semiconductor layer includes a layer, and the carbon concentration of the nitride-based compound semiconductor layer is not less than a concentration at which the breakdown voltage of the semiconductor element changes rapidly with respect to the carbon concentration and not more than a saturation concentration.

In the semiconductor device according to the present invention, the carbon concentration is 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less.

In the semiconductor device according to the present invention, in the above invention, the impurity concentration of carbon other than carbon in the nitride-based compound semiconductor layer is 1 × 10 ¹⁶ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less. It is characterized by.

  In the semiconductor device according to the present invention as set forth in the invention described above, the semiconductor operating layer is not added with carbon, and the layer thickness is 200 nm or more and 400 nm or less.

  In the semiconductor device according to the present invention as set forth in the invention described above, the nitride compound semiconductor layer is formed of a GaN compound semiconductor.

  According to the semiconductor device of the present invention, it is possible to increase the resistance of the buffer layer without reducing current collapse by doping impurities, and to reduce the leakage current generated in the buffer layer.

  In addition, according to the semiconductor element of the present invention, it is possible to increase the breakdown voltage of the element without increasing the threshold voltage.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the embodiments. In the description of the drawings, the same parts are denoted by the same reference numerals.

(Embodiment 1)
First, the semiconductor element according to the first embodiment of the present invention will be described. FIG. 1 is a cross-sectional view showing a configuration of a HEMT 1 as a semiconductor element according to the first embodiment. As shown in FIG. 1, the HEMT 1 includes a compound semiconductor layer stacked on a substrate 2 made of sapphire, Si, SiC, or the like via a buffer layer. Specifically, a low-temperature buffer layer 3 made of GaN, a buffer layer 4 made of GaN, an electron transit layer 5 made of GaN, and an electron supply layer 6 made of AlGaN are formed in this order on the substrate 2. It has a heterojunction structure formed by stacking.

  The HEMT 1 includes a source electrode 7S, a gate electrode 7G, and a drain electrode 7D on the electron supply layer 6. The source electrode 7S and the drain electrode 7D as ohmic electrodes are formed by laminating Al, Ti, and Au in this order on the electron supply layer 6, and the gate electrode 7G as a Schottky electrode is formed on the electron supply layer 6 with Pt. , Au are laminated in this order.

  In the HEMT 1 having such a configuration, the electron supply layer 6 has a larger band gap energy than the electron transit layer 5, and a two-dimensional electron gas layer 5a is formed immediately below the heterojunction interface between the two layers. 5a is used as a carrier. That is, when the source electrode 7S and the drain electrode 7D are operated, the electrons supplied to the electron transit layer 5 travel at a high speed in the two-dimensional electron gas layer 5a and move to the drain electrode 7D. At this time, by controlling the voltage applied to the gate electrode 7G and changing the thickness of the depletion layer immediately below the gate electrode 7G, electrons moving from the source electrode 7S to the drain electrode 7D, that is, the drain current can be controlled. .

  Here, the buffer layer 4 included in the HEMT 1 will be described. The buffer layer 4 is doped with impurities and has a high resistance so as to reduce the leakage current generated in this layer without deteriorating the current collapse as a characteristic of the HEMT 1. In forming such a buffer layer 4, the present inventors first found that it is preferable to dope carbon (C) as an impurity into this layer.

  That is, the present inventors presume that the impurity concentration in the buffer layer 4 contributes to the resistance of this layer and the current collapse of the HEMT 1, and carbon is suitable as an impurity that makes it easier to control the addition concentration in device fabrication. I found out. Specifically, by using carbon as an impurity, the impurity concentration distribution in the buffer layer 4 can be finely controlled as compared with the case of doping Zn, Mg, etc. used in Patent Documents 1 and 2. It has become possible. In particular, the carbon concentration can be changed steeply in the stacking direction without diffusing carbon in the electron transit layer 5 at the interface with the electron transit layer 5.

  Next, the inventors of the present invention have actually derived the correspondence relationship between the carbon concentration in the buffer layer 4 and the breakdown voltage and current collapse of the HEMT 1. FIG. 2 is a graph showing the derivation result. Here, the withstand voltage of the HEMT 1 is a characteristic that uniquely corresponds to the resistance of the buffer layer 4. The greater the withstand voltage, the greater the resistance of the buffer layer 4. The current collapse is performed by sweeping the source-drain voltage (voltage between the source electrode 7S and the drain electrode 7D) in the range of 0 to 10 V and 0 to 30 V when the HEMT 1 is turned on. It is the ratio of the current value obtained for 10V. That is, this current collapse indicates that the reproducibility of the output current characteristic of the HEMT 1 is better as the value is larger and closer to “1.0”. The carbon concentration indicates a value measured using SIMS (Secondary Ion Mass Spectroscopy).

From the results shown in FIG. 2, the current collapse decreases (deteriorates) as the carbon concentration in the buffer layer 4 increases. In particular, when the carbon concentration increases to about 1 × 10 ²⁰ cm ⁻³ or more, the current collapse increases rapidly. It turns out that it falls to. In addition, the breakdown voltage, that is, the resistance of the buffer layer 4 decreases as the carbon concentration in the buffer layer 4 decreases, and particularly when the carbon concentration decreases to about 1 × 10 ¹⁷ cm ⁻³ or less, the breakdown voltage rapidly decreases. I understand that. At this time, the thickness of the electron transit layer 5 is set to 0.1 μm.

Accordingly, the present inventors have found that the carbon concentration doped in the buffer layer 4 is equal to or lower than the concentration at which the current collapse changes rapidly with respect to the carbon concentration, and the breakdown voltage of the HEMT 1 is increased with respect to the carbon concentration. It has been found that the concentration is preferably not less than a rapidly changing concentration. Specifically, it has been found that the carbon concentration doped in the buffer layer 4 is preferably 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less. When the carbon concentration is within this range, HEMT 1 has a current collapse of 0.8 or more and a breakdown voltage of 400 V or more, and has practically effective characteristics.

Further, when the carbon concentration is 5 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ¹⁹ cm ⁻³ or less, the breakdown voltage is 750 V or more. The withstand voltage required when using an AC power supply supplied as a commercial power supply in Japan is about 400V. However, if the withstand voltage is 750V or higher, it is necessary for the commercial power supply in most other countries. Can withstand the breakdown voltage. Furthermore, when the carbon concentration is 5 × 10 ¹⁷ cm ⁻³ or more and 5 × 10 ¹⁸ cm ⁻³ or less, the withstand voltage is 750 V or more and the current collapse can be 0.9 or more, which is more preferable.

  Subsequently, the inventors speculated that the distance (layer thickness) from the layer serving as the current path between the electrodes in the compound semiconductor layer to the buffer layer as the high resistance layer contributes to the breakdown voltage and current collapse. In the field effect transistor, this distance corresponds to the layer thickness from the channel layer to the high resistance layer. In the HEMT 1, the channel layer is a two-dimensional electron gas layer 5 a formed immediately below the heterojunction interface between the electron transit layer 5 and the electron supply layer 6, and the two-dimensional electron gas layer 5 a to the buffer layer 4 are formed. The distance is substantially equal to the layer thickness of the electron transit layer 5. Therefore, the present inventors have derived by actually measuring the correspondence between the layer thickness of the electron transit layer 5, the withstand voltage, and the current collapse.

FIG. 3 is a graph showing the derivation result. From FIG. 3, it can be seen that the current collapse decreases as the layer thickness of the electron transit layer 5 decreases, and particularly when the layer thickness is about 0.05 μm or less, the current collapse rapidly decreases. It can also be seen that the breakdown voltage decreases with increasing layer thickness of the electron transit layer 5, and particularly when the layer thickness is about 1.0 μm or more, the breakdown voltage rapidly decreases. At this time, the carbon concentration of the buffer layer 4 is set to 1 × 10 ¹⁹ cm ⁻³ .

  Accordingly, the inventors have determined that the layer thickness of the electron transit layer 5, that is, the layer thickness from the heterojunction interface between the electron transit layer 5 and the electron supply layer 6 to the buffer layer 4 is a current collapse with respect to this layer thickness. It is found that the thickness is preferably equal to or greater than the thickness at which the abruptly changes and is equal to or less than the thickness at which the withstand voltage of the HEMT 1 is rapidly changed with respect to the thickness. Specifically, it has been found that the thickness of the electron transit layer 5 is preferably 0.05 μm or more and 1 μm or less. When the layer thickness of the electron transit layer 5 is within this range, the HEMT 1 has a current collapse of 0.8 or more and a withstand voltage of 400 V or more, and has practically effective characteristics.

  Further, when the layer thickness of the electron transit layer 5 is 0.05 μm or more and 0.5 μm or less, the withstand voltage is 750 V or more. In this case, in most countries including Japan, the withstand voltage required for the commercial power supply can be satisfied. Furthermore, when the layer thickness of the electron transit layer 5 is 0.05 μm or more and 0.1 μm or less, a breakdown voltage of 800 V or more can be obtained, which is particularly suitable for applications requiring a breakdown voltage.

From the above, in the HEMT 1 according to the first embodiment, the buffer layer 4 is formed so that the doped carbon concentration is 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less, The electron transit layer 5 is formed to have a layer thickness of 0.05 μm or more and 1 μm or less. As a result, in the HEMT 1, the buffer layer 4 is increased in resistance without deteriorating the current collapse, and the leakage current generated in the buffer layer 4 is reduced. The electron transit layer 5 is made of high-purity GaN so that current collapse does not occur due to the impurity concentration of this layer. Specifically, the carbon concentration is 1 × 10 ¹⁷ cm ^{−. 3} or less.

Here, the manufacturing process of HEMT1 is demonstrated. The HEMT 1 is formed by laminating a nitride compound semiconductor layer on the substrate 2 by MOCVD (Metal Organic Chemical Vapor Deposition) method. Specifically, first, trimethylgallium (TMGa) and ammonia (NH ₃ ), which are raw materials for a compound semiconductor, are respectively 14 μmol / min, in a MOCVD apparatus in which a substrate 2 made of sapphire, Si, SiC, or the like is installed. The low temperature buffer layer 3 made of GaN with a layer thickness of 30 nm is epitaxially grown on the substrate 2 at a growth temperature of 550 ° C., introduced at a flow rate of 12 l / min.

Next, TMGa and NH ₃ are introduced at flow rates of 58 μmol / min and 12 l / min, respectively, and the buffer layer 4 made of GaN doped with carbon having a layer thickness of 3 μm is grown on the low-temperature buffer layer 3 at a growth temperature of 1050 ° C. Epitaxial growth. At this time, the carbon concentration in the buffer layer 4 is set to 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less by controlling the growth rate.

Subsequently, TMGa and NH ₃ were introduced at a flow rate of 19 μmol / min and 12 l / min, respectively, and an electron transit layer 5 made of GaN having a layer thickness of 0.05 to 0.1 μm was formed as a buffer layer at a growth temperature of 1050 ° C. 4 is epitaxially grown. Further, trimethylaluminum (TMAl), TMGa, and NH ₃ are introduced at flow rates of 100 μmol / min, 19 μmol / min, and 12 l / min, respectively, and an electron supply layer 6 made of AlGaN with a growth temperature of 1050 ° C. and a layer thickness of 30 nm. Is epitaxially grown on the electron transit layer 5. In the formation process of each layer, hydrogen having a concentration of 100% is used as a carrier gas for introducing TMAl, TMGa, and NH ₃ .

Thereafter, a mask made of a SiO ₂ film is formed on the electron supply layer 6 by patterning using photolithography, and an opening corresponding to each electrode shape is formed in a region where the source electrode 7S and the drain electrode 7D are to be formed. Form. Then, Al, Ti, and Au are vapor-deposited in this order in this opening to form the source electrode 7S and the drain electrode 7D. Further, the mask on the electron supply layer 6 is temporarily removed, and a mask made of a SiO ₂ film is formed on the electron supply layer 6 again, and an opening corresponding to the gate electrode shape is formed in a region where the gate electrode 7G is to be formed. Form. Then, Pt and Au are vapor deposited in this order in this opening to form the gate electrode 7G.

As described above, in the HEMT 1 according to the first embodiment, the buffer layer 4 is doped with carbon, and the current collapse of the HEMT 1 rapidly changes with respect to the carbon concentration in the buffer layer 4. The concentration is equal to or lower than the concentration and the concentration at which the breakdown voltage of the HEMT 1 changes rapidly with respect to the carbon concentration, specifically, 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less. . For this reason, the HEMT 1 can increase the resistance of the buffer layer 4 without deteriorating the current collapse, reduce the leakage current generated in the buffer layer 4, and increase the breakdown voltage of the HEMT 1 itself.

  In the HEMT 1, the layer thickness from the heterojunction interface in the compound semiconductor layer to the buffer layer 4, that is, the layer thickness of the electron transit layer 5, is greater than the thickness at which the current collapse of the HEMT 1 changes rapidly with respect to this layer thickness. In addition, the thickness of the HEMT 1 is set to be not more than a thickness at which the pressure resistance of the HEMT 1 is rapidly changed with respect to the thickness of the layer, and specifically, 0.05 μm to 1 μm. For this reason, the HEMT 1 can increase the resistance of the buffer layer 4 without deteriorating the current collapse, reduce the leakage current generated in the buffer layer 4, and increase the breakdown voltage of the HEMT 1 itself.

(Embodiment 2)
Next, a semiconductor element according to the second embodiment of the present invention will be described. FIG. 4 is a cross-sectional view showing a configuration of the HEMT 11 as a semiconductor element according to the second embodiment. As shown in FIG. 4, the HEMT 11 includes a buffer layer 14 and an electron transit layer 15 made of GaN instead of the buffer layer 4 and the electron transit layer 5 based on the configuration of the HEMT 1. A carbon concentration transition layer 18 made of GaN is further provided between the electron transit layer 15. Other configurations are the same as those of the HEMT 1, and the same components are denoted by the same reference numerals.

The buffer layer 14 is formed by doping carbon in the same manner as the buffer layer 4 in the HEMT 1 and has a carbon concentration of 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less. The electron transit layer 15 is formed of high-purity GaN like the electron transit layer 5 and has a carbon concentration of 1 × 10 ¹⁷ cm ⁻³ or less. The layer thickness of the electron transit layer 15 is set to 0.05 μm or more and 1 μm or less similarly to the electron transit layer 5.

  The carbon concentration transition layer 18 is doped with carbon so that the additive concentration increases according to the distance in the stacking direction from the electron transit layer 15 toward the buffer layer 14. FIG. 5A and FIG. 5B are graphs schematically showing this state. Here, the horizontal axis indicates the depth (distance) in the stacking direction from the heterojunction interface between the electron transit layer 15 and the electron supply layer 6, and the vertical axis indicates the carbon concentration corresponding to this depth. .

  As shown in FIGS. 5A and 5B, the carbon concentration in the carbon concentration transition layer 18 depends on the distance in the stacking direction from the electron transit layer 15 toward the buffer layer 14. To a carbon concentration of the buffer layer 14 continuously or stepwise. However, the continuous transition is not limited to the linear transition as shown in FIG. 5A and may be a curved transition represented by a quadratic function, a logarithmic function, an exponential function, or the like. Further, the stepwise transition is not limited to the four-step transition (four-step transition) as shown in FIG. 5B, and may be an arbitrary multi-step transition. Further, the transition amount of the carbon concentration in each stage in the multistage step does not need to be equal and may be arbitrary.

  Thus, by providing the carbon concentration transition layer 18 in which the carbon concentration transitions continuously or stepwise, in the HEMT 11, the correspondence between the current collapse and the breakdown voltage according to the tendency of the transition of the carbon concentration (transition type). The relationship can be finely controlled. Here, examples of the actual measurement results are shown in FIGS. 6-1 and 6-2 and FIGS. 7-1 and 7-2.

In FIGS. 6A and 6B, the layer thickness of the carbon concentration transition layer 18 is 0.5 μm and 1 μm, respectively, and the carbon concentration is changed linearly and curvedly in steps of 1 to 4 steps within each layer thickness. The carbon concentration profile with respect to the depth from the heterojunction interface is shown. FIGS. 7-1 and 7-2 show current collapse and breakdown voltage corresponding to the carbon concentration profiles of FIGS. 6-1 and 6-2, respectively. Here, “1-step” to “4-step”, “linear transition”, and “curve transition” as transition types of the carbon concentration shown in FIGS. -2 corresponds to the carbon concentration profile indicated by the mark *, *, *, ●, ■, and ▲. In each case, the electron transit layer 15 has a layer thickness of 0.1 μm and a carbon concentration of 1 × 10 ¹⁷ cm ⁻³ , and the buffer layer 14 has a layer thickness of 2 μm and a carbon concentration of 1 × 10 ¹⁹ cm ^−3. It is.

  From the results shown in FIGS. 7A and 7B, depending on the carbon concentration transition type of the carbon concentration transition layer 18, that is, “1-step” to “4-step”, “linear transition”, or “curve transition”. It can be seen that the current collapse and the breakdown voltage of the HEMT 11 can be changed. It can also be seen that when the thickness of the carbon concentration transition layer 18 is relatively large, the amount of change in breakdown voltage with respect to the carbon concentration change type is relatively large. Further, it can be seen that when the thickness of the carbon concentration transition layer 18 is 1 μm or less, a practical breakdown voltage of about 500 V or more can be obtained. However, if this layer thickness is thicker than this, it is presumed that a practical breakdown voltage may not be obtained. That is, it is found that the thickness of the carbon concentration transition layer 18 is preferably 1 μm or less.

  As described above, the HEMT 11 according to the second embodiment is laminated between the buffer layer 14 and the electron transit layer 15 and also according to the distance in the lamination direction from the electron transit layer 15 toward the buffer layer 14. Since the carbon concentration transition layer 18 doped with carbon so as to increase the addition concentration is provided, the correspondence between the current collapse and the breakdown voltage is finely controlled according to the transition tendency (transition type) of the carbon concentration. can do.

In the HEMT 11, the carbon concentration of the buffer layer 14 is 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less, and the carbon concentration of the electron transit layer 15 is 1 × 10 ¹⁷ cm ⁻³ or less. The carbon concentration of the carbon concentration transition layer 18 is continuously or stepwise from the carbon concentration of the electron transit layer 15 to the carbon concentration of the buffer layer 14 according to the distance in the stacking direction from the electron transit layer 15 toward the buffer layer 14. Since it is supposed to transition, the resistance of the buffer layer 14 and the carbon concentration transition layer 18 can be increased without deteriorating the current collapse, and the leakage current generated in the buffer layer 14 and the carbon concentration transition layer 18 can be reduced. The HEMT 11 itself can have a high breakdown voltage.

  Here, the carbon concentration of the carbon concentration transition layer 18 has been described as transitioning from the carbon concentration of the electron transit layer 15 to the carbon concentration of the buffer layer 14. 18 and the electron transit layer 15 do not necessarily have to have the same carbon concentration. Similarly, the carbon concentrations of the carbon concentration transition layer 18 and the buffer layer 14 do not necessarily have to be equal at the interface to the buffer layer 14.

Here, the carbon concentration of the buffer layer 14 has been described as being 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less, but the carbon concentration of the carbon concentration transition layer 18 at the interface to the buffer layer 14 is described. Is 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less, the carbon concentration of the buffer layer 14 is not necessarily within the above-mentioned range.

(Embodiment 3)
FIG. 9 is a cross-sectional view showing a configuration of a field effect transistor 100 as a semiconductor element according to the third embodiment of the present invention. As shown in this figure, a field effect transistor 100 includes buffer layers 32 to 34 and a semiconductor operation layer 35 formed on a substrate 31 made of, for example, Si, sapphire, SiC, or ZnO using a nitride compound semiconductor. A source electrode 36S, a drain electrode 36D, and an insulated gate 36G are formed on the stacked layers.

  The buffer layer 32 is made of AlN and has a layer thickness of 40 nm. The buffer layer 33 includes a first layer 41 formed using a nitride compound semiconductor, and a second layer formed using a nitride compound semiconductor having an Al composition higher than that of the first layer 41. 42 is formed by laminating a plurality of composite layers 40 laminated with 42. Specifically, the first layer 41 is made of GaN, the second layer 42 is made of AlN, and the thickness of each layer is 200 nm and 20 nm, respectively. Further, the composite layer 40 is laminated in eight layers.

  Note that the semiconductor material for forming the buffer layer 32, the first layer 41, and the second layer 42 is not limited to AlN or GaN, but may be a semiconductor material containing other elements. Moreover, the number of laminated layers of the composite layer 40 is not limited to eight, and may be any number as long as it is one or more. However, it is preferable to laminate four or more layers.

The buffer layer 34 is made of p-GaN and has a layer thickness of 1 μm. For example, Mg is added to the buffer layer 34 as a p-type impurity, and the Mg concentration as the impurity concentration is 5 × 10 ¹⁶ cm ⁻³ . In addition, carbon is added to the buffer layer 34, and the carbon concentration is set to 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less. Note that the p-type impurity used for the buffer layer 34 and the semiconductor operation layer 35 described later is not limited to Mg, and may be Zn, Be, or the like.

The semiconductor operation layer 35 includes a buffer layer including a channel layer 35a made of p-GaN, a resurf layer 35b made of n ⁻ -GaN as an n-type semiconductor, and contact layers 35c and 35d made of n ⁺ -GaN. 34 in parallel. The resurf layer 35b is provided between the channel layer 35a and the contact layer 35d, and the contact layer 35c is provided on the opposite side of the channel layer 35a from the resurf layer 35b. In the channel layer 35a, for example, Mg is added as a p-type impurity, and the Mg concentration as the impurity concentration is 5 × 10 ¹⁶ cm ⁻³ . For example, Si is added as an n-type impurity to the RESURF layer 35b and the contact layers 35c and 35d, and the Si concentrations are 5 × 10 ¹⁷ cm ⁻³ and 5 × 10 ²⁰ cm ⁻³ , respectively. The semiconductor operation layer 35 is not added with carbon and has a layer thickness of 300 nm.

The insulating gate 36G is formed by stacking a gate insulating film 36Ga as an insulating layer and a gate electrode 36Gb as an electrode layer in this order on the channel layer 35a. For the gate insulating film 36Ga, an oxide film having a sufficient dielectric breakdown electric field strength such as SiO ₂ or Al ₂ O ₃ is used, and the layer thickness is, for example, about 50 to 100 nm in the case of SiO ₂ . In addition, the gate insulating film 36Ga is formed so that both ends of the gate insulating film 36Ga protrude on the contact layer 35c and the RESURF layer 35b in the direction in which the drain current flows (the left-right direction in FIG. 9). The gate electrode 36Gb is formed using polysilicon or a metal film such as Ni / Au or WSi. The source electrode 36S and the drain electrode 36D are formed on the contact layers 35c and 35d, respectively, and are formed using a metal film such as Ti / Al or Ti / AlSi / Mo that can make ohmic contact with the contact layers 35c and 35d. Has been.

  In the field effect transistor 100 configured as described above, an inversion layer 35e is generated in the vicinity of the boundary with the gate insulating film 36Ga at the upper end of the channel layer 35a by applying a positive voltage higher than a predetermined potential to the gate electrode 36Gb. . The inversion layer 35e serves as a channel, and the contact layer 35c, the RESURF layer 35b, and the contact layer 35d are electrically connected, and a drain current is conducted between the source electrode 36S and the drain electrode 36D. At this time, the drain current ON / OFF control, that is, the ON / OFF of the field effect transistor 100 is changed by changing the thickness of a depletion layer (not shown) formed immediately below the gate insulating film 36Ga by the voltage applied to the gate electrode 36Gb. Control can be performed.

Next, the buffer layer 34 will be described in detail. FIG. 10 is a graph showing results of actually measuring the withstand voltage of the field effect transistor 100 with respect to the carbon concentration of the p-GaN buffer layer as the buffer layer 34. From the results shown in this graph, it can be seen that the breakdown voltage can be increased in the field effect transistor 100 by increasing the carbon concentration of the buffer layer 34. In particular, when the carbon concentration is about 1 × 10 ¹⁷ (= 1.0E + 17) cm ⁻³ , the breakdown voltage changes rapidly, and by setting the carbon concentration to 1 × 10 ¹⁷ cm ⁻³ or more, the breakdown voltage is increased to 750 V or more. It can be seen that the breakdown voltage can be increased. It can also be seen that the breakdown voltage can be increased to about 850 V by setting the carbon concentration to 1 × 10 ²⁰ cm ⁻³ .

FIG. 11 is a graph showing the results of actual measurement of the threshold voltage of the field effect transistor 100 with respect to the carbon concentration and Mg concentration of the p-GaN layer as the buffer layer 34. From the results shown in this graph, it can be seen that in the field effect transistor 100, the threshold voltage can be maintained constant even when the carbon concentration of the buffer layer 34 is increased. In contrast, when the Mg concentration of the buffer layer 34 is increased, the threshold voltage increases. It can also be seen that the threshold voltage can be reduced to about 3 V by setting the Mg concentration of the buffer layer 34 to 5 × 10 ¹⁶ cm ⁻³ . The result corresponding to the carbon concentration shown in FIG. 11 is a result obtained by adding carbon after setting the Mg concentration of the buffer layer 34 to 5 × 10 ¹⁶ cm ⁻³ . The carbon concentrations shown in FIGS. 10 and 11 are values measured using SIMS (Secondary Ion Mass Spectroscopy).

Based on the above results, in the field effect transistor 100, the carbon concentration of the buffer layer 34 is set to a concentration higher than the concentration at which the breakdown voltage of the field effect transistor 100 rapidly changes with respect to this carbon concentration. Is 1 × 10 ¹⁷ cm ⁻³ or more. Further, the Mg concentration as the impurity concentration other than carbon in the buffer layer 34 is set to 5 × 10 ¹⁶ cm ⁻³ . As a result, the field effect transistor 100 can increase the breakdown voltage of the device without increasing the threshold voltage, and specifically satisfies the breakdown voltage required when using a commercial power supply regardless of the country. A possible breakdown voltage of 750 V or more can be obtained. In addition, a threshold voltage of about 3 V, which is generally suitable for controlling a semiconductor element such as a field effect transistor, can be obtained.

In the field effect transistor according to the prior art, when Zn or Mg is added to the buffer layer in order to increase the breakdown voltage as in the field effect transistor described in Patent Document 1, for example, it can be easily estimated from the result of FIG. Thus, the threshold voltage increases as the impurity concentration of Zn or Mg increases. In Patent Document 1, it is desirable that the impurity concentration is 1 × 10 ¹⁸ cm ⁻³ or more. In this case, the threshold voltage is at least 10 V or more, which is much higher than the preferred value of 3 V. This is predicted from the result of FIG. That is, in the field effect transistor according to the prior art, it has been difficult to simultaneously realize the high breakdown voltage of the element and the optimization of the threshold voltage, whereas in the field effect transistor 100, as described above, the buffer layer By adding carbon to 34, there is an effect that both high breakdown voltage of the element and optimization of the threshold voltage can be achieved.

Note that the preferred value of the threshold voltage in the field effect transistor 100 is not limited to 3 V, and is preferably set within a range of about 3 ± 1 V depending on the use of the element. Therefore, in the field effect transistor 100, based on the result of FIG. 11, the Mg concentration of the buffer layer 34 is set within a range of 1 × 10 ¹⁶ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less. It is preferable.

In the field effect transistor 100, as shown in FIG. 10, the breakdown voltage can be increased by increasing the carbon concentration of the buffer layer 34, but the carbon concentration is saturated at a certain concentration. That is, the added carbon atoms cannot be replaced with atoms forming the p-GaN crystal lattice in the buffer layer 34 when the added amount exceeds a certain ratio, and the buffer layer 34 is normally epitaxially grown. become unable. Specifically, the saturation concentration of carbon in the buffer layer 34 is experimentally required to be about 1 × 10 ²⁰ cm ⁻³ based on the data in FIG.

For this reason, the carbon concentration of the buffer layer 34 as the epitaxial film is set to a saturation concentration or less, and specifically, it is set to 1 × 10 ²⁰ cm ⁻³ or less as a standard value. Thereby, in the field effect transistor 100, the buffer layer 34 and the semiconductor operation layer 35 stacked thereon can be normally epitaxially grown, and a breakdown voltage of up to about 850 V can be obtained without increasing the threshold voltage. be able to.

Next, the manufacturing process of the field effect transistor 100 will be described. The field effect transistor 100 is formed by sequentially laminating various nitride-based compound semiconductors on the substrate 31 by, for example, MOCVD (Metal Organic Chemical Vapor Deposition). Specifically, first, the substrate 31 is introduced into the MOCVD apparatus, and trimethylaluminum (TMAl) and ammonia (NH ₃ ) as raw materials for the compound semiconductor are respectively supplied at a flow rate of 19 μmol / min and 12 liter / min. The buffer layer 32 made of AlN is grown on the substrate 31 to a thickness of 40 nm.

Next, trimethylgallium (TMGa) and NH ₃ are introduced onto the buffer layer 32 at flow rates of 58 μmol / min and 12 liter / min, respectively, and the first layer 41 made of GaN is epitaxially grown on the buffer layer 32. . Subsequently, TMAl and NH ₃ are introduced onto the first layer 41 at a flow rate of 19 μmol / min and 12 liter / min, respectively, and the second layer 42 made of AlN is epitaxially grown on the first layer 41. . Then, the growth of the first layer 41 and the second layer 42 is repeated eight times, for example, thereby forming the buffer layer 33 composed of the eight composite layers 40. Here, the layer thicknesses of the first layer 41 and the second layer 42 are 200 nm and 20 nm, respectively.

Next, TMGa and NH ₃ are introduced onto the buffer layer 33 at flow rates of 58 μmol / min and 12 liter / min, respectively, and Cp 2 Mg (bis-cyclopentadienyl Mg) and carbon gas are introduced, and p-GaN is introduced. The buffer layer 34 to be formed is epitaxially grown on the buffer layer 33 to a thickness of 1 μm. At this time, the Mg concentration is set to 5 × 10 ¹⁶ cm ⁻³ by adjusting the flow rate of Cp 2 Mg, and the carbon concentration is set to 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ by adjusting the growth pressure. The following. The carbon concentration does not have to be uniform in the buffer layer 34, and may have a concentration gradient in the stacking direction of the buffer layer 34, for example.

Next, TMGa and NH ₃ are introduced onto the buffer layer 34 at flow rates of 58 μmol / min and 12 liter / min, respectively, and Cp 2 Mg is introduced to form a p-GaN layer serving as the semiconductor operation layer 35 as the buffer layer 34. Epitaxially grown to a thickness of 300 nm above. At this time, the flow rate of Cp2Mg is adjusted so that the Mg concentration becomes 5 × 10 ¹⁶ cm ⁻³ .

In the formation process of each layer so far, the growth temperature is set to 1050 ° C. Further, 100% hydrogen gas is used as a carrier gas used for introducing TMAl, TMGa and NH ₃ .

Next, Si is added to the p-GaN layer formed on the buffer layer 34 by ion implantation. At this time, the Si implantation depth is made equal to the thickness of the semiconductor operation layer 35, and the Si concentration is 1 × 10 ¹⁷ cm ⁻³ in the region corresponding to the RESURF layer 35b, and the region corresponding to the contact layers 35c and 35d. Then, it is set to 1 × 10 ²⁰ cm ⁻³ . Thereafter, activation annealing is performed at a temperature of 1200 ° C. for 1 minute. As a result, the semiconductor operation layer 35 including the channel layer 35 a, the RESURF layer 35 b, and the contact layers 35 c and 35 d is formed on the buffer layer 34. The Si implantation depth by ion implantation does not have to be exactly equal to the thickness of the semiconductor operation layer 35, and may be equal to or greater than the thickness of the semiconductor operation layer 35. That is, Si may enter the buffer layer 34.

Next, an oxide film made of, for example, SiO ₂ or Al ₂ O _{3 is formed} to a thickness of 50 to 100 nm on the semiconductor operation layer 35 by PCVD (Plasma Chemical Vapor Deposition) method. The gate insulating film 36Ga is formed by etching with the above. Thereafter, a metal film made of, for example, Ti / Al or Ti / AlSi / Mo is formed on the contact layers 35c and 35d by a lift-off method, and a heat treatment at 600 ° C. is performed for 10 minutes, whereby the source electrode 36S as an ohmic electrode is obtained. Then, the drain electrode 36D is formed. Further, a metal film made of, for example, Ni / Au or WSi is formed on the gate insulating film 36Ga by a lift-off method to form the gate electrode 36Gb.

  The layer thickness of the semiconductor operation layer 35 is not limited to 300 nm, and may be a layer thickness that is not excessive or insufficient for forming a drain current channel, specifically about 200 to 400 nm. When the thickness of the RESURF layer 35b as the layer thickness of the semiconductor operation layer 35 is too thick, current leaks through the RESURF layer 35b, and the breakdown voltage of the element decreases. On the other hand, when the thickness of the RESURF layer 35b is too thin, the on-resistance increases. Therefore, in the field effect transistor 100, the layer thickness of the semiconductor operation layer 35 is set to 200 nm or more and 400 nm or less as a layer thickness that can suppress an increase in on-resistance while ensuring a breakdown voltage of 750 V or more. Note that this layer thickness does not necessarily have to be satisfied over the entire area of the semiconductor operation layer 35, as long as it is satisfied at least in the channel layer 35a and the RESURF layer 35b.

As described above, the field effect transistor 100 according to the third embodiment includes the buffer layers 32 to 34, the semiconductor operation layer 35, and the insulating gate 36G sequentially stacked on the substrate 31, and is nitrided with carbon added. The carbon concentration of the buffer layer 34 as the physical compound semiconductor layer is set to a concentration higher than the concentration at which the breakdown voltage of the field effect transistor 100 rapidly changes with respect to the carbon concentration and lower than a saturation concentration, specifically 1 × 10 ^17. cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less. For this reason, in the field effect transistor 100, it is possible to increase the breakdown voltage of the element without increasing the threshold voltage.

Further, in the field effect transistor 100, the Mg concentration as the impurity concentration other than carbon in the buffer layer 34 is set to 2 × 10 ¹⁶ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less. A threshold voltage of about 3 ± 1 V suitable for controlling the semiconductor element can be obtained. Further, in the field effect transistor 100, since the semiconductor operation layer 35 is not added with carbon and has a layer thickness of 200 nm or more and 400 nm or less, an increase in on-resistance is suppressed while ensuring a breakdown voltage of 750 V or more. be able to.

  So far, the best mode for carrying out the present invention has been described as the first to third embodiments. However, the present invention is not limited to the first to third embodiments, as long as it does not depart from the spirit of the present invention. Various modifications are possible. For example, in the first and second embodiments described above, it has been described that the low-temperature buffer layer 3 is interposed between the substrate 2 and the buffer layers 4 and 14, but a buffer layer suitable for the substrate and the semiconductor layer is provided as appropriate. It may be. In particular, when the difference in lattice constant between the substrate and the semiconductor layer is large, the stress applied to the semiconductor layer can be reduced by providing a buffer layer in which layers having greatly different lattice constants are alternately stacked.

  Specifically, for example, in a GaN-based semiconductor element, a buffer layer in which AlN layers and GaN layers each having a thickness of about 1 to 3000 nm are alternately stacked, or a buffer layer in which InGa layers and AlGaN layers are alternately stacked. It is good to provide. In this case, a two-dimensional electron gas layer is easily formed at each junction interface between the AlN layer and the GaN layer, and the breakdown voltage of the semiconductor element is lowered and the leakage current is likely to be increased. However, by applying the configuration of the present invention, The leakage current can be reduced without deteriorating the current collapse.

In the first and second embodiments described above, the buffer layers 4, 14, the carbon concentration transition layer 18, and the electron transit layers 5, 15 are formed using GaN, and the electron supply layer 6 is formed using AlGaN. Although described as being formed, each layer may be formed using a semiconductor material to which other elements are appropriately added. For example, the compound semiconductor layer and at least one of the buffer layer and the carbon concentration transition layer are formed using an Al _1-xy Ga _x In _y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) -based semiconductor material. can do. More specifically, for example, the electron transit layer 5 can be formed using InGaN.

  Further, in the above-described first and second embodiments, the HEMT which is a kind of FET has been described as the semiconductor element according to the present invention. However, it is not necessary to interpret the invention limited to the HEMT, and a MISFET (Metal Insulator Semiconductor FET), The present invention is applicable to various FETs such as MOSFET (Metal Oxide Semiconductor FET) and MESFET (Metal Semiconductor FET).

  In addition to FETs, the present invention can be applied to various diodes such as Schottky diodes. As a diode to which the present invention is applied, for example, a diode in which a cathode electrode and an anode electrode are formed instead of the source electrode 7S, the drain electrode 7D, and the gate electrode 7G provided in the HEMTs 1 and 11 can be realized.

  In the first and second embodiments described above, the semiconductor element according to the present invention has been described as including a compound semiconductor layer formed using a nitride compound semiconductor, particularly a GaN compound semiconductor. The present invention is not necessarily limited to the system and the GaN system, and the present invention can be applied to a semiconductor element including a compound semiconductor layer formed using another compound semiconductor.

  In Embodiment 3 described above, the buffer layer 34 as a nitride-based compound semiconductor layer to which carbon is added is formed of GaN. However, the buffer layer 34 need not be interpreted as being limited to GaN. It may be formed of a GaN-based compound semiconductor containing an element. In addition to GaN, other nitrides may be used, and any compound semiconductor other than nitride may be used as long as it can be activated by adding carbon.

  Note that the low-temperature buffer layer 3 in the first and second embodiments and the buffer layers 32 and 33 in the third embodiment can be used interchangeably. Specifically, for example, the buffer layers 32 and 33 can be stacked between the substrate 2 and the buffer layer 4 or 14 instead of the low temperature buffer layer 3 in the HEMTs 1 and 11. Similarly, the low temperature buffer layer 3 can be laminated between the substrate 31 and the buffer layer 34 instead of the buffer layers 32 and 33 in the field effect transistor 100.

It is sectional drawing which shows the structure of the semiconductor element concerning Embodiment 1 of this invention. It is a graph which shows the correspondence of the carbon concentration of a buffer layer, current collapse, and a proof pressure. It is a graph which shows the correspondence of the layer thickness of an electron transit layer, current collapse, and a proof pressure. It is sectional drawing which shows the structure of the semiconductor element concerning Embodiment 2 of this invention. It is a graph which shows the correspondence of the depth from a heterojunction interface, and carbon concentration. It is a graph which shows the correspondence of the depth from a heterojunction interface, and carbon concentration. It is a graph which shows the actual value of the correspondence of the depth from a heterojunction interface, and carbon concentration. It is a graph which shows the actual value of the correspondence of the depth from a heterojunction interface, and carbon concentration. It is a graph which shows the correspondence of the carbon concentration transition type of a carbon concentration transition layer, current collapse, and pressure | voltage resistance. It is a graph which shows the correspondence of the carbon concentration transition type of a carbon concentration transition layer, current collapse, and pressure | voltage resistance. It is sectional drawing which shows the structure of the semiconductor element concerning a prior art. It is sectional drawing which shows the structure of the semiconductor element concerning Embodiment 3 of this invention. It is a graph which shows the pressure | voltage resistance with respect to the carbon concentration of a buffer layer. It is a graph which shows the relationship of the threshold voltage with respect to the carbon concentration and Mg density | concentration of a buffer layer.

Explanation of symbols

1,11,21 HEMT
2,22 Substrate 3,23 Low temperature buffer layer 4,14,24 Buffer layer 5,15,25 Electron traveling layer 5a, 25a Two-dimensional electron gas layer 6,26 Electron supply layer 7D, 27D Drain electrode 7G, 27G Gate electrode 7S , 27S source electrode 18 carbon concentration transition layer 31 substrate 32-34 buffer layer 35 semiconductor operation layer 35a channel layer 35b RESURF layer 35c, 35d contact layer 35e inversion layer 36D drain electrode 36G insulation gate 36Ga gate insulation film 36Gb gate electrode 36S source electrode 40 composite layer 41 first layer 42 second layer 100 field effect transistor

Claims (6)

In a semiconductor device comprising a compound semiconductor layer stacked on a substrate via a buffer layer,
The compound semiconductor layer includes a layer in which a two-dimensional electron gas layer serves as a current path,
Stacked between the buffer layer and the compound semiconductor layer, and added from the carbon concentration of the compound semiconductor layer to the carbon concentration of the buffer layer according to the distance in the stacking direction from the compound semiconductor layer toward the buffer layer A carbon concentration transition layer to which carbon is added so that the concentration is increased,
The buffer layer, the compound semiconductor layer, and the carbon concentration transition layer are formed of a GaN-based compound semiconductor,
The semiconductor element, wherein the buffer layer and the carbon concentration transition layer have a carbon concentration of 1 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less. The semiconductor element according to claim 1, wherein the carbon concentration is 5 × 10 ¹⁷ cm ⁻³ or more and 1 × 10 ¹⁹ cm ⁻³ or less.   The layer thickness from the layer serving as the current path in the compound semiconductor layer to the buffer layer is equal to or greater than the thickness at which the current collapse changes rapidly with respect to the layer thickness, and the semiconductor element with respect to the layer thickness The semiconductor element according to claim 1, wherein the withstand voltage of the semiconductor element is equal to or less than a thickness at which the withstand voltage changes rapidly.   The layer thickness of the layer used as the said current path is 0.05 micrometer or more and 1 micrometer or less, The semiconductor element as described in any one of Claims 1-3 characterized by the above-mentioned. The thickness of the carbon concentration transition layer, the semiconductor device according to any one of claims 1-4, characterized in that it is 1μm or less. The semiconductor device, the semiconductor device according to any one of claims 1-5, characterized in that a diode or a field effect transistor.

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