JP4258159B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a step of forming a trench element isolation film on a single crystal Si layer of an SOI substrate and a method for manufacturing the same.
[0002]
[Prior art]
5 and 6 are cross-sectional views illustrating a conventional method for manufacturing a semiconductor device. This method of manufacturing a semiconductor device includes a step of forming a shallow trench isolation (STI) trench.
[0003]
First, an SOI (silicon on insulator) substrate 104 is prepared. The SOI substrate 104 includes a support substrate 101 made of single crystal silicon, a buried oxide film (BOX layer) 102 formed on the support substrate 101, and a single crystal Si layer 103 formed on the buried oxide film 102. , Is composed of.
[0004]
Next, as shown in FIG. 5A, a silicon oxide film 105 is formed on the surface of the single crystal Si layer 103 by a thermal oxidation method. Next, a silicon nitride film (SiN film) 106 is deposited on the silicon oxide film 105 by a CVD (Chemical Vapor Deposition) method. This silicon nitride film 106 functions as a polishing stopper during CMP (Chemical Mechanical Polishing) described later. Next, a photoresist film (not shown) is applied on the silicon nitride film 106, and the photoresist film is exposed and developed, whereby a resist having an opening above the trench formation region is formed on the silicon nitride film 106. A pattern is formed.
[0005]
Next, the silicon nitride film 106 and the silicon oxide film 105 are selectively etched using this resist pattern as a mask. Thereby, openings are formed in the silicon nitride film 106 and the silicon oxide film 105, and the surface of the single crystal Si layer 103 under the openings is exposed.
[0006]
Next, the resist pattern is peeled off. Thereafter, the single crystal Si layer 103 is selectively etched using the silicon nitride film 106 as a mask, whereby a trench 103 a is formed in the single crystal Si layer 103. Next, hydrofluoric acid treatment is performed in the trench. This hydrofluoric acid treatment is a treatment for effectively performing a round oxidation process.
[0007]
Next, as shown in FIG. 5B, a round oxidation process is performed to form roundness at the corners of the trench 103a. That is, the silicon oxide film 107 is formed in the trench 103a by a thermal oxidation method.
[0008]
Thereafter, as shown in FIG. 6C, a silicon oxide film 108 for element isolation is deposited in the trench 103a and on the silicon nitride film 106 by plasma CVD.
[0009]
Next, as shown in FIG. 6D, the silicon oxide film 108 is polished by the CMP technique using the silicon nitride film 106 as a polishing stopper. Next, the remaining silicon nitride film 106 is selectively removed, and then the silicon oxide film 105 is selectively removed by etching. In this manner, the silicon oxide film is buried in the trench 103a, and the trench element isolation film 108a is formed.
[0010]
[Problems to be solved by the invention]
By the way, in the conventional method for manufacturing a semiconductor device, hydrofluoric acid treatment is performed in the trench before the round oxidation process in order to perform effective round oxidation. In the case of the SOI substrate 104, since the buried oxide film 102 exists under the single-crystal Si layer 103, the interface between the buried oxide film 102 and the buried oxide film 102 is obtained by hydrofluoric acid treatment and round oxidation in the trench as shown in FIG. An inversely tapered shape is formed in the single crystal Si layer 103. When the silicon oxide film 108 is buried in the trench 103a having the reverse taper shape by the plasma CVD method as described above, the silicon oxide film is not completely buried, the step coverage is deteriorated, and the void 109 is generated in the vicinity of the reverse taper shape portion. There are things to do. As a result, the reliability of the semiconductor device decreases.
[0011]
The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor device in which generation of voids in a trench element isolation film is suppressed, and a method for manufacturing the same.
[0012]
[Means for Solving the Problems]
In order to solve the above problems, a method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device in which a trench element isolation film is formed in a single crystal Si layer of an SOI substrate,
Forming a trench in the single crystal Si layer;
A step of burying a first oxide film having a thickness of 20% or more and 50% or less of the trench depth in the bottom of the trench;
A step of round oxidation in the trench;
Forming a trench element isolation film by embedding a second oxide film in the trench;
It is characterized by comprising.
[0013]
According to the method for manufacturing a semiconductor device, when round oxidation is performed in the trench, the interface between the single crystal Si layer and the buried oxide film therebelow is already buried with the first oxide film. For this reason, even if round oxidation is performed in the trench, it is possible to suppress the formation of an inversely tapered shape as in the prior art. Therefore, when the second oxide film is embedded in the trench, the oxide film is completely embedded in the trench, and as a result, generation of voids in the trench as in the conventional semiconductor device can be suppressed.
[0014]
The semiconductor device manufacturing method according to the present invention may further include a step of performing hydrofluoric acid treatment in the trench between the step of filling the first oxide film and the step of performing the round oxidation. .
[0015]
In the method for manufacturing a semiconductor device according to the present invention, the step of filling the first oxide film is preferably a step of forming a silicon oxide film at the bottom of the trench by a high density plasma CVD method.
[0016]
In the method of manufacturing a semiconductor device according to the present invention, the step of forming the trench includes forming a silicon nitride film on the single crystal Si layer, and forming a portion located above the trench formation region of the silicon nitride film. The step is preferably a step of forming a trench in the single crystal Si layer by opening and etching the single crystal Si layer using the silicon nitride film as a mask.
[0017]
A manufacturing method of a semiconductor device according to the present invention is a manufacturing method of a semiconductor device in which a trench element isolation film is formed in a single crystal Si layer of an SOI substrate,
Forming a silicon nitride film on the single crystal Si layer;
Opening a portion of the silicon nitride film located above the trench formation region;
Forming a trench in the single crystal Si layer by etching the single crystal Si layer using the silicon nitride film as a mask;
A step of forming a first oxide film having a trench depth of 20% or more and 50% or less in the trench and on the silicon nitride film by a high density plasma CVD method;
Forming a second oxide film in the trench and on the first oxide film;
Forming a trench element isolation film in the trench by polishing the second oxide film and the first oxide film by CMP using the silicon nitride film as a polishing stopper;
It is characterized by comprising.
[0018]
A semiconductor device according to the present invention is a semiconductor device in which a trench element isolation film is formed in a single crystal Si layer of an SOI substrate,
A trench formed in a single crystal Si layer;
A first oxide film having a depth of 20% to 50% and embedded in the bottom of the trench;
A second oxide film embedded in the trench and formed on the first oxide film;
Comprising
The trench element isolation film is composed of a first oxide film and a second oxide film.
[0019]
In the semiconductor device according to the present invention, it is preferable that the first oxide film is a silicon oxide film formed at a bottom portion in the trench by a high density plasma CVD method.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
1 to 4 are sectional views showing a method for manufacturing a semiconductor device according to an embodiment of the present invention. This method of manufacturing a semiconductor device includes a step of forming an STI trench.
[0021]
First, as shown in FIG. 1A, an SOI substrate 4 is prepared. The SOI substrate 4 includes a support substrate 1 made of single crystal silicon, a buried oxide film (BOX layer) 2 formed on the support substrate 1, and a single crystal Si layer 3 formed on the buried oxide film 2. , Is composed of.
[0022]
Next, a silicon oxide film 5 having a thickness of about 10 to 30 nm is formed on the surface of the single crystal Si layer 3 by a thermal oxidation method. This silicon oxide film 5 is a film for relaxing the stress on the single crystal Si layer 3. Next, a silicon nitride film (SiN film) 6 having a thickness of about 100 to 200 nm is deposited on the silicon oxide film 5 by a CVD method. This silicon nitride film 6 functions as a polishing stopper during CMP, which will be described later.
[0023]
Next, a photoresist film is applied on the silicon nitride film 6, and this photoresist film is exposed and developed to form a resist pattern 10 having an opening above the trench formation region on the silicon nitride film 6. The
[0024]
Next, the silicon nitride film 6 is selectively removed by etching using the resist pattern 10 as a mask, and then the silicon oxide film 5 is selectively removed by etching. Thereby, an opening 6a is formed in the silicon nitride film 6 and the silicon oxide film 5, and the surface of the single crystal Si layer 3 under the opening is exposed. Thereafter, the resist pattern 10 is peeled off.
[0025]
Next, as shown in FIG. 1B, the single crystal Si layer 3 is selectively etched using the silicon nitride film 6 as a mask, whereby a trench 3a having a depth of about 160 nm is formed in the single crystal Si layer 3. Is done. The etching conditions at this time are ICP anisotropic etching using Cl ₂ and O ₂ .
[0026]
Thereafter, as shown in FIG. 2C, a silicon oxide film 11 is deposited in the trench 3a and on the silicon nitride film 6 by a high density plasma CVD method. The thickness of the silicon oxide film 11 is preferably 20% or more and 50% or less of the depth of the trench 3a. In the present embodiment, the thickness is preferably 32 nm or more and 80 nm or less. The high-density plasma CVD method is a CVD in which a silicon oxide film is deposited by reacting a source gas based on, for example, SiH ₄ (silane) and O ₂ (oxygen) with plasma having a plasma density of 10 ¹¹ / cm ³ or more. Is the law. The reason why the high-density plasma CVD method is used is to bury the silicon oxide film 11 in the bottom of the trench with good coverage. However, the high-density plasma CVD method is not limited to the high-density plasma CVD method. It is also possible to use this method. For example, a low pressure CVD method using TEOS (tetraethylorthosilicate) or an atmospheric pressure CVD method using ozone and TEOS may be used.
[0027]
Next, as shown in FIG. 2D, hydrofluoric acid treatment is performed in the trench 3a. This hydrofluoric acid treatment is a treatment for effectively performing a round oxidation process, and the condition is desirably a treatment under conditions for removing an amount of 5 to 50 nm in terms of the thickness of the thermal oxide film. Next, a round oxidation process is performed to form roundness at the corners of the trench 3a. That is, the silicon oxide film 7 is formed in the trench 3a by a thermal oxidation method. The conditions at this time are preferably 900 ° C. to 1200 ° C., more preferably 950 ° C. to 1050 ° C., and the oxidation amount is 10 to 50 nm. The same effect can be obtained whether the atmosphere is dry or wet. In addition, since the effect of round oxidation affects the interface between the single crystal Si layer 3 and the buried oxide film 2 through the silicon oxide film 11, damage after etching is removed. Therefore, it is possible to embed without voids.
[0028]
Next, as shown in FIG. 3E, a silicon oxide film 8 for element isolation is deposited in the trench 3a and on the silicon oxide film 11 by plasma CVD.
[0029]
Thereafter, as shown in FIG. 3F, the silicon oxide films 8 and 11 are polished by the CMP technique using the silicon nitride film 6 as a polishing stopper. Thereby, trench element isolation films 8a and 11 are formed in the trench. At this time, the silicon nitride film 3 is left slightly. Further, the CMP polishing conditions at this time are preferably a table rotation speed of 75 rpm, a top ring rotation speed of 50 rpm, and a pressure of 20 kPa, a foaming polyurethane system is used for the polishing cloth, and a silica system is used for the slurry.
[0030]
Next, as shown in FIG. 4, the silicon nitride film 6 is selectively removed by etching, and then the silicon oxide film 5 is selectively removed by etching.
[0031]
According to the above embodiment, when the round oxidation shown in FIG. 2D is performed, the interface between the single crystal Si layer 3 and the buried oxide film 2 is already buried with the silicon oxide film 11 by the high-density plasma CVD method. Yes. For this reason, even if hydrofluoric acid treatment is performed in the trench and round oxidation is performed in the trench, it is possible to suppress the formation of an inversely tapered shape as in the prior art. Therefore, if the silicon oxide film 8 for element isolation is embedded in the trench 3a, the silicon oxide film is completely embedded in the trench, and as a result, generation of voids in the trench as in the conventional semiconductor device is suppressed. it can. Thereby, the fall of the reliability of a semiconductor device can be suppressed.
[0032]
The present invention is not limited to the above embodiment, and can be implemented with various modifications.
[0033]
【The invention's effect】
As described above, according to the present invention, when round oxidation is performed in the trench, the interface between the single crystal Si layer and the buried oxide film thereunder is already buried with the first oxide film. Therefore, it is possible to provide a semiconductor device in which generation of voids in the trench element isolation film is suppressed and a manufacturing method thereof.
[Brief description of the drawings]
1A is a cross-sectional view showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 1B is a cross-sectional view showing a step subsequent to the step shown in FIG.
2C is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention, showing a step subsequent to the step illustrated in FIG. 1B; FIG. It is sectional drawing which shows the next process of the process shown to (c).
3E is a cross-sectional view showing the next step of the step shown in FIG. 2D, which shows the manufacturing method of the semiconductor device according to the embodiment of the present invention, and FIG. It is sectional drawing which shows the next process of the process shown to (e).
FIG. 4 is a cross-sectional view showing a method for manufacturing the semiconductor device according to the embodiment of the present invention and showing a step subsequent to the step shown in FIG.
5A is a cross-sectional view showing a conventional method for manufacturing a semiconductor device, and FIG. 5B is a cross-sectional view showing a step subsequent to the step shown in FIG. 5A.
6C is a cross-sectional view showing a conventional method for manufacturing a semiconductor device, showing a step subsequent to the step shown in FIG. 5B; FIG. 6D is a cross-sectional view of FIG. It is sectional drawing which shows the next process of the process to show.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1,101 ... Support substrate 2,102 ... Embedded oxide film (BOX layer)
3, 103 ... single crystal Si layers 3a, 103a ... trench 4, 104 ... SOI substrate 5, 105 ... silicon oxide film 6, 106 ... silicon nitride film 6a ... openings 7, 8, 107, 108 ... silicon oxide film 8a, 108a ... trench element isolation film 10 ... resist pattern 11 ... silicon oxide film 109 ... void

Claims (4)

Forming an SOI substrate having a single-crystal Si layer on an insulating film, a trench penetrating through the single-crystal Si layer on the single crystalline Si layer,
The bottom of the train Ji, forming a first oxide film with 50% or less of thickness of 20% or more of the depth of the trench has,
Applying hydrofluoric acid treatment to the trench;
A step of performing round oxide in the trench,
Comprises a higher write No Engineering fills second oxide layer in the trench,
A method of manufacturing a semiconductor device , wherein a bottom portion of the trench after the hydrofluoric acid treatment is completely covered with the first oxide film . The first step of forming an oxide film, a method of manufacturing a semiconductor device according to claim 1, wherein the benzalkonium be formed by high-density plasma CVD method on the bottom of the train Ji. The step of forming the trench includes:
Forming a silicon nitride film on the single-crystal Si layer,
The method of manufacturing a semiconductor device according to claim 1 or 2, further comprising a, a step of opening the silicon nitride film in a portion located above the trench forming region. The SOI substrate having a single-crystal Si layer on an insulating film, forming a silicon nitride film on the single-crystal Si layer,
Forming an opening in the silicon nitride film,
Through the opening, by etching Gus Rukoto the single-crystal Si layer, a step of forming a trench through the single-crystal Si layer on the single crystalline Si layer,
And forming the bottom of the trench, the first oxide film with 50% or less of thickness of 20% or more of the depth of the trench has a high density plasma CVD method,
Applying hydrofluoric acid treatment to the trench;
A step of performing round oxide at the corners of the trench,
Forming a second oxide layer on the trench and the first oxide film,
Until said silicon nitride film is exposed, and a step of polishing by CMP,
A method of manufacturing a semiconductor device , wherein a bottom portion of the trench after the hydrofluoric acid treatment is completely covered with the first oxide film .

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