JP4005952B2 - 薄膜トランジスタを具備したフラットパネルディスプレイ - Google Patents
薄膜トランジスタを具備したフラットパネルディスプレイ Download PDFInfo
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- JP4005952B2 JP4005952B2 JP2003274643A JP2003274643A JP4005952B2 JP 4005952 B2 JP4005952 B2 JP 4005952B2 JP 2003274643 A JP2003274643 A JP 2003274643A JP 2003274643 A JP2003274643 A JP 2003274643A JP 4005952 B2 JP4005952 B2 JP 4005952B2
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
- H10D86/0223—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials
- H10D86/0229—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials characterised by control of the annealing or irradiation parameters
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/40—Crystalline structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0251—Manufacture or treatment of multiple TFTs characterised by increasing the uniformity of device parameters
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/30—Devices specially adapted for multicolour light emission
- H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Electroluminescent Light Sources (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Recrystallisation Techniques (AREA)
Description
52 データライン
53 駆動ライン
10r、10g、10b 第1TFT
20r、20g、20b 第2TFT
11r、11g、11b 第1活性層
21r、21g、21b 第2活性層
Claims (24)
- 自発光素子を具備する複数の副画素を含む画素と、
前記副画素の各々に備えられた、少なくともチャンネル領域を有し、異方性結晶粒を有する多結晶シリコンからなる半導体活性層を具備し、前記自発光素子に電流を供給するために前記自発光素子に接続されてなる、駆動用薄膜トランジスタとを含むフラットパネルディスプレイであって、
前記半導体活性層のチャンネル領域が、少なくとも2つの前記副画素に関して相異なる方向に配置されてなることを特徴とするフラットパネルディスプレイ。 - 前記副画素は異なる色相を有する、請求項1に記載のフラットパネルディスプレイ。
- 前記チャンネル領域は、前記副画素の色相別に相異なる方向に配置されていることを特徴とする請求項2に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記副画素の自発光素子の発光効率が高くなるにつれて、同一の駆動電圧が前記副画素に加えられた際に、前記副画素の自発光素子を流れる電流値が低くなるように決定されてなる、請求項1に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記副画素の自発光素子の発光効率が高くなるにつれて前記チャンネル領域の電子移動度が低くなるように決定されてなる、請求項1に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記副画素のチャンネル領域において電流が流れる方向と前記チャンネル領域を形成する前記多結晶シリコンの結晶粒界とがなす角度が、前記副画素の自発光素子の発光効率が高くなるにつれて大きくなるように決定されてなる、請求項1に記載のフラットパネルディスプレイ。
- 前記多結晶シリコンは、連続側面結晶化法により形成されてなる、請求項1に記載のフラットパネルディスプレイ。
- 自発光素子を具備する、赤色、緑色及び青色の副画素を含む画素と、
前記副画素の各々に備えられた、少なくともチャンネル領域を有し、異方性結晶粒を有する多結晶シリコンからなる半導体活性層を具備し、前記自発光素子に電流を供給するために前記自発光素子に接続されてなる、駆動用薄膜トランジスタとを含むフラットパネルディスプレイであって、
前記半導体活性層のチャンネル領域が、前記副画素の色相別に相異なる方向に配置されてなることを特徴とするフラットパネルディスプレイ。 - 前記チャンネル領域の方向は、前記副画素の自発光素子の発光効率が高くなるにつれて、同一の駆動電圧が前記副画素に加えられた際に、それぞれの前記副画素の自発光素子を流れる電流値が低くなるように決定されてなる、請求項8に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記緑色の副画素の自発光素子を流れる電流値が最も低くなる方向に決定されてなる、請求項8に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記電流値が赤色、青色及び緑色の副画素の順に低くなる方向に決定されてなる、請求項8に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記副画素の自発光素子の発光効率が高くなるにつれて前記チャンネル領域の電子移動度が低くなるように決定されてなる、請求項8に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記緑色の副画素の駆動用薄膜トランジスタにおける前記半導体活性層のチャンネル領域の電子移動度が、最も低くなる方向に決定されてなる、請求項8に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記半導体活性層のチャンネル領域の電子移動度が、赤色、青色及び緑色の副画素の順に低くなる方向に決定されてなる、請求項8に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記緑色の副画素のチャンネル領域において電流が流れる方向と前記緑色の副画素のチャンネル領域を形成する前記多結晶シリコンの結晶粒界とがなす角度が、他の副画素における角度より大きくなるように決定されてなる、請求項8に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記赤色の副画素のチャンネル領域において電流が流れる方向と前記赤色の副画素のチャンネル領域を形成する前記多結晶シリコンの結晶粒界とがなす角度が、他の副画素における角度より小さくなるように決定されてなる、請求項8に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記副画素のチャンネル領域において電流が流れる方向と前記チャンネル領域を形成する多結晶シリコンの結晶粒界とがなす角度が、緑色、青色及び赤色の副画素の順に小さくなる方向に決定されてなる、請求項8に記載のフラットパネルディスプレイ。
- 前記多結晶シリコンは、平行に配列された第1結晶粒界と、前記第1結晶粒界の間に前記第1結晶粒界にほぼ垂直に延びた第2結晶粒界とからなる、請求項8に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記緑色の副画素のチャンネル領域において電流が流れる方向と前記緑色の副画素のチャンネル領域を形成する前記多結晶シリコンの第1結晶粒界とがなす角度が、他の副画素における角度より小さくなるように決定されてなる、請求項8に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記赤色の副画素のチャンネル領域において電流が流れる方向と前記赤色の副画素のチャンネル領域を形成する前記多結晶シリコンの第1結晶粒界とがなす角度が、他の副画素における角度より大きくなるように決定されてなる、請求項8に記載のフラットパネルディスプレイ。
- 前記チャンネル領域の方向は、前記副画素のチャンネル領域において電流が流れる方向と前記副画素のチャンネル領域を形成する前記多結晶シリコンの第1結晶粒界とがなす角度が、緑色、青色及び赤色の順に大きくなるように決定されてなる、請求項8に記載のフラットパネルディスプレイ。
- 前記緑色の副画素のチャンネル領域において電流が流れる方向は、前記緑色の副画素のチャンネル領域を形成する前記多結晶シリコンの第1結晶粒界に対して平行である、請求項8に記載のフラットパネルディスプレイ。
- 前記赤色の副画素のチャンネル領域において電流が流れる方向は、前記赤色の副画素のチャンネル領域を形成する前記多結晶シリコンの第1結晶粒界に対して垂直である、請求項8に記載のフラットパネルディスプレイ。
- 前記多結晶シリコンは、連続側面結晶化法により形成されてなる、請求項8に記載のフラットパネルディスプレイ。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2003-0014001A KR100496297B1 (ko) | 2003-03-06 | 2003-03-06 | 박막 트랜지스터를 구비한 평판표시장치 |
Publications (2)
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JP2004272193A JP2004272193A (ja) | 2004-09-30 |
JP4005952B2 true JP4005952B2 (ja) | 2007-11-14 |
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Application Number | Title | Priority Date | Filing Date |
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JP2003274643A Expired - Lifetime JP4005952B2 (ja) | 2003-03-06 | 2003-07-15 | 薄膜トランジスタを具備したフラットパネルディスプレイ |
Country Status (5)
Country | Link |
---|---|
US (1) | US7265737B2 (ja) |
EP (1) | EP1455396B1 (ja) |
JP (1) | JP4005952B2 (ja) |
KR (1) | KR100496297B1 (ja) |
CN (1) | CN1293523C (ja) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4265788B2 (ja) * | 2003-12-05 | 2009-05-20 | シャープ株式会社 | 液晶表示装置 |
KR100615211B1 (ko) * | 2004-02-26 | 2006-08-25 | 삼성에스디아이 주식회사 | 유기 전계 발광 표시장치 및 그 제조방법 |
KR100647693B1 (ko) * | 2005-05-24 | 2006-11-23 | 삼성에스디아이 주식회사 | 유기박막 트랜지스터 및 그의 제조방법과 유기 박막트랜지스터를 구비한 유기전계 발광표시장치 |
JP2007080853A (ja) * | 2005-09-09 | 2007-03-29 | Toshiba Corp | 素子形成基板、アクティブマトリクス基板及びその製造方法 |
JP4169071B2 (ja) | 2006-05-25 | 2008-10-22 | ソニー株式会社 | 表示装置 |
US8654045B2 (en) | 2006-07-31 | 2014-02-18 | Sony Corporation | Display and method for manufacturing display |
JP5109302B2 (ja) * | 2006-07-31 | 2012-12-26 | ソニー株式会社 | 表示装置およびその製造方法 |
JP5181164B2 (ja) * | 2008-03-17 | 2013-04-10 | ユー・ディー・シー アイルランド リミテッド | 有機電界発光表示装置 |
KR101065413B1 (ko) | 2009-07-03 | 2011-09-16 | 삼성모바일디스플레이주식회사 | 유기전계발광표시장치 및 그의 제조방법 |
KR20110041107A (ko) | 2009-10-15 | 2011-04-21 | 삼성모바일디스플레이주식회사 | 유기전계발광표시장치 및 그의 제조 방법 |
KR101795691B1 (ko) * | 2010-11-11 | 2017-11-09 | 삼성디스플레이 주식회사 | 표시장치 |
CN105336294B (zh) * | 2014-08-12 | 2018-01-30 | 上海和辉光电有限公司 | 有机电致发光显示器 |
CN104465673B (zh) * | 2014-12-30 | 2018-02-23 | 京东方科技集团股份有限公司 | 阵列基板及其制造方法、以及显示装置 |
US10200697B2 (en) * | 2015-07-09 | 2019-02-05 | Qualcomm Incorporated | Display stream compression pixel format extensions using subpixel packing |
KR102546657B1 (ko) * | 2017-12-11 | 2023-06-22 | 엘지디스플레이 주식회사 | 유기발광표시장치 |
US10727279B2 (en) * | 2017-12-11 | 2020-07-28 | Lg Display Co., Ltd. | Organic light emitting diode display device |
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JP2784615B2 (ja) | 1991-10-16 | 1998-08-06 | 株式会社半導体エネルギー研究所 | 電気光学表示装置およびその駆動方法 |
JP3450376B2 (ja) * | 1993-06-12 | 2003-09-22 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JP3188167B2 (ja) * | 1995-12-15 | 2001-07-16 | 三洋電機株式会社 | 薄膜トランジスタ |
CA2256699C (en) | 1996-05-28 | 2003-02-25 | The Trustees Of Columbia University In The City Of New York | Crystallization processing of semiconductor film regions on a substrate, and devices made therewith |
JP2000243963A (ja) * | 1999-02-17 | 2000-09-08 | Sanyo Electric Co Ltd | 薄膜トランジスタ及び表示装置 |
JP3670923B2 (ja) | 1999-02-26 | 2005-07-13 | 三洋電機株式会社 | カラー有機el表示装置 |
JP4497596B2 (ja) * | 1999-09-30 | 2010-07-07 | 三洋電機株式会社 | 薄膜トランジスタ及び表示装置 |
JP2001109399A (ja) * | 1999-10-04 | 2001-04-20 | Sanyo Electric Co Ltd | カラー表示装置 |
JP4925528B2 (ja) * | 2000-09-29 | 2012-04-25 | 三洋電機株式会社 | 表示装置 |
JP2002151697A (ja) * | 2000-11-14 | 2002-05-24 | Sharp Corp | 半導体集積回路およびそれを用いた画像表示装置 |
US6495405B2 (en) * | 2001-01-29 | 2002-12-17 | Sharp Laboratories Of America, Inc. | Method of optimizing channel characteristics using laterally-crystallized ELA poly-Si films |
US20020102821A1 (en) * | 2001-01-29 | 2002-08-01 | Apostolos Voutsas | Mask pattern design to improve quality uniformity in lateral laser crystallized poly-Si films |
JP2003091245A (ja) * | 2001-09-18 | 2003-03-28 | Semiconductor Energy Lab Co Ltd | 表示装置 |
KR100496300B1 (ko) * | 2003-04-02 | 2005-06-17 | 삼성에스디아이 주식회사 | 박막 트랜지스터를 구비한 평판표시장치 |
-
2003
- 2003-03-06 KR KR10-2003-0014001A patent/KR100496297B1/ko active IP Right Grant
- 2003-07-15 JP JP2003274643A patent/JP4005952B2/ja not_active Expired - Lifetime
- 2003-12-03 US US10/725,469 patent/US7265737B2/en active Active
- 2003-12-15 EP EP03090435.3A patent/EP1455396B1/en not_active Expired - Lifetime
- 2003-12-31 CN CNB200310124056XA patent/CN1293523C/zh not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
CN1293523C (zh) | 2007-01-03 |
CN1527260A (zh) | 2004-09-08 |
KR100496297B1 (ko) | 2005-06-17 |
EP1455396A1 (en) | 2004-09-08 |
EP1455396B1 (en) | 2017-08-23 |
US20040183767A1 (en) | 2004-09-23 |
US7265737B2 (en) | 2007-09-04 |
KR20040079081A (ko) | 2004-09-14 |
JP2004272193A (ja) | 2004-09-30 |
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