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JP3216305B2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JP3216305B2
JP3216305B2 JP05037093A JP5037093A JP3216305B2 JP 3216305 B2 JP3216305 B2 JP 3216305B2 JP 05037093 A JP05037093 A JP 05037093A JP 5037093 A JP5037093 A JP 5037093A JP 3216305 B2 JP3216305 B2 JP 3216305B2
Authority
JP
Japan
Prior art keywords
pad
wire
semiconductor device
bonding
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP05037093A
Other languages
English (en)
Other versions
JPH06268027A (ja
Inventor
正博 小泉
仁 大貫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP05037093A priority Critical patent/JP3216305B2/ja
Publication of JPH06268027A publication Critical patent/JPH06268027A/ja
Application granted granted Critical
Publication of JP3216305B2 publication Critical patent/JP3216305B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
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Description

【発明の詳細な説明】
【０００１】
【産業上の利用分野】本発明は半導体装置に関するもの
であり、特に電力用半導体装置に関するものである。
【０００２】
【従来の技術】電力用半導体装置はコレクタ電極，エミ
ッタ電極，ゲート電極及び半導体素子が搭載された絶縁
基板が放熱板上に固着され、これら全体が樹脂で覆われ
ている構造である。この装置の組立ては、始めに各電極
が搭載された絶縁基板上に半導体素子を固着し、この半
導体素子と上記各電極とをアルミニウムワイヤで接続す
る。その後、この絶縁基板を放熱板に固着し全体を樹脂
で覆い組立てが完了する。
【０００３】従来、半導体素子のパッドはアルミニウム
合金膜で形成されており、またこのパッドと各電極との
接続にはアルミニウムワイヤを用いた超音波接合で行わ
れている。接合の工程は、半導体素子上のパッドにツー
ルを介して荷重と超音波を印加してワイヤの端部を接合
し、そのワイヤの一方を電極上に同様の方法で接合す
る。ひとつのモジュールには数個の半導体素子が搭載さ
れているため、ワイヤの数も多い。組立て工程の中でこ
のワイヤボンディングに関する不良が最も多く発生す
る。
【０００４】一方、半導体装置は動作中高い電流が流れ
るため素子ならびにパッドとワイヤとの接合部は発熱し
高温になる。この温度上昇により、ワイヤとシリコン素
子との熱膨張の差に基づく応力が発生するので、接合部
には高い信頼性が要求される。
【０００５】ワイヤを用いて接続を行う従来技術は、例
えば特開昭57−15453 号公報に記載されている。
【０００６】
【発明が解決しようとする課題】パッドとワイヤとの接
合に関して二つの課題がある。一つはワイヤボンディン
グのときに発生する素子の損傷がある。パッドの下には
活性領域があり、この部分がワイヤをパッドに接合する
際に損傷し、素子の特性が損なわれることである。これ
は太いワイヤをパッドに強固に接合するために大きな荷
重と超音波をワイヤに印加するために起こり易く、従来
のボンデイングの方法では避けがたい問題である。
【０００７】もう一つは、長時間の通電によりパッドと
ワイヤとの接合部が劣化あるいは断線し、半導体装置の
機能が損なわれることである。劣化の原因は、前述した
ように接合部に熱応力が負荷されるためである。
【０００８】本発明の目的は、ワイヤボンディングの際
の素子損傷を防止し、かつ通電時における接合部の劣化
の低減を図り、信頼性の高い電力用半導体装置を提供す
ることにある。
【０００９】
【課題を解決するための手段】素子損傷はボンディング
の際にワイヤが大きな力で押しつけられると同時に超音
波によって振動を負荷されるため、大きな応力がパッド
下の活性領域まで影響を及ぼすためにひきおこされるも
のと考えられる。荷重と超音波出力を小さくすればその
発生を低減できるが、それでは十分な接合は困難であ
る。したがって従来のワイヤボンディングで素子損傷が
起こらない接合を行うにはパッド下の活性領域まで応力
の影響が及ぼさない方法で行うか、ワイヤボンディング
以外の小さな応力で接合できる方法が不可欠である。
【００１０】一方、通電による接合部の劣化は熱応力が
原因であるため、その対策は熱応力の低減あるいはその
応力に耐えるだけの接合強度を有する接合部にすること
である。
【００１１】本発明の特徴は、パッドと電極との接続に
従来のワイヤの替わりに板状の導電性部材を用いること
にある。ここにいう板状の部材とは、部材の厚さよりも
部材の幅が大きいものを言う。この導電部材とパッドと
の接合はハンダやペーストのようなインサート材の利用
及び低温での拡散接合を利用した接合とするため、素子
に負荷される応力は小さくてすみその結果素子損傷の問
題は起こらない。さらに、板状の導電体のため表面積が
従来のワイヤを用いた場合より大きくなり、その結果放
熱効果が向上し熱応力の低減が図られる。
【００１２】また、本発明の他の特徴は、複数のパッド
同士を１枚の板状の導電部材で接続し、更にこの導電部
材を電極に接続することにある。これによれば、パッド
への接合の際に応力が負荷されないので素子に損傷を与
えない。また、放熱効果が著しく向上するので従来のワ
イヤを用いた場合よりも接合部の温度上昇を抑制でき、
熱応力の低減が図られる。
【００１３】さらに本発明の他の特徴は、複数のパッド
同士を１枚の板状の導電部材で接続し、その板状の導電
部材と電極とは、導電性ワイヤ等の部材で接続すること
にある。板状の導電部材にワイヤボンディングするので
大きな荷重および超音波を印加しても素子まで影響を及
ぼさないため素子に損傷を与えない効果がある。また、
板状の導電体による放熱効果さらにワイヤの本数を従来
構造の場合よりも多くできるのでワイヤからの放熱も加
わることによって、接合部の温度上昇を抑制され熱応力
を低減できる。
【００１４】
【作用】本発明はパッドと電極との接続に板状の導電体
を用い、接合方法が従来の超音波および大きな荷重を必
要としない例えばハンダやペーストのようなインサート
材を介して、又は、拡散接合等で行うので素子の損傷が
起こらない。また、板状の導電体のため表面積が大きく
なることにより放熱特性が向上し、素子の発熱を軽減で
きるので接合部に負荷される熱応力が小さくなり、その
結果劣化しにくくなる。
【００１５】
【実施例】
（実施例１）図１及び図２は、それぞれ発明の一実施例
のＩＧＢＴ（Insulated GateBipolar Transistor）モジ
ュールをあらわす断面図及び斜視図である。本実施例に
おいては、まず１のエミッタ、２のゲートおよび３のコ
レクタ電極が設けてある絶縁板４上のコレクタ電極上に
ＩＧＢＴ素子５ならびにダイオード素子をハンダで接着
し、半導体素子上のパッドとパッドに接触する部分に薄
く金が設けられているアルミニウム板６とを接触させ、
１００ないし３００℃に加熱し拡散接合によってパッド
にアルミニウム板を接合する。図２は斜視図であるがダ
イオード素子１６とエミッタ電極１とは一枚のアルミニ
ウム板６で同様の方法で接続されている。アルミニウム
板と活性領域１４の上に設けてあるパッド１３との間に
は金−アルミニウム金属間化合物１５が形成され、強固
に接合している。
【００１６】ここで、従来のボンディングワイヤによる
接合を図８に示す。従来の接合方法の場合では、アルミ
ニウムワイヤ１２に大きな荷重と超音波を印加してパッ
ド１３に接合するため、パッド下の活性領域１４にクラ
ック１７が認められる。しかし、本実施例ではパッドな
らびに活性領域に応力が負荷されない接合方法を採用す
るため、活性領域に損傷が起らないという効果がある。
【００１７】本実施例では、アルミニウム板の一方も同
様の方法で各電極に接合する。この方法で全ての半導体
素子と電極とを接続した後、絶縁板４を放熱板７にハン
ダで接着する。次に、樹脂でできているケース８に接続
されているエミッタ端子９，ゲート端子１０よびコレク
タ端子１１をそれぞれの電極にハンダで接着し、ケース
８をかぶせその中にゲル及び樹脂を注入して封止し、半
導体装置が完成する。本実施例ではパッドと電極との接
続にアルミニウムを用い、これを拡散接合によって接合
したが、本発明はアルミニウムに限定されず、他の導電
体例えば銅，金，ニッケル等でもよく、また接続の方法
もハンダ及びペーストなどのインサート材を用いてもよ
い。ダイオード素子１６も同様にアルミニウム板６で接
続されている （実施例２）図３及び図４は、本発明の一実施例のＩＧ
ＢＴモジュールである。その構造は、ＩＧＢＴ素子５な
らびにダイオード素子１６が搭載され、１のエミッタ、
２のゲートおよび３のコレクタ電極が設けてある絶縁板
４が放熱板７に固着され、ＩＧＢＴ素子５上のそれぞれ
のエミッタパッドとパッドに接触する部分に薄く金が設
けてある一枚のアルミニウム板６とが拡散接合されて接
続され、そのアルミニウム板６の一端がエミッタ電極１
に接続されている。図４の本実施例の斜視図に示すよう
にダイオード素子１６とエミッタ電極１との接続におい
ても、一枚のアルミニウム板６で同様の方法で接続され
ている。拡散接合によってアルミニウム板を接続するの
で、パッド下にある活性領域に損傷を与えない効果があ
る。ＩＧＢＴ素子の場合ではゲートパッドとゲート電極
２とがアルミニウムワイヤ１２で接続されている。ケー
ス８に接続されているエミッタ端子９，ゲート端子１０
よびコレクタ端子１１をそれぞれの電極にハンダで接着
され、ケース８で全体が覆われその中が樹脂で満たされ
た構成のＩＧＢＴモジュールである。
【００１８】（実施例３）図５及び図６は、本発明の一
実施例であるＩＧＢＴモジュールである。その構成は、
絶縁板４上にＩＧＢＴ素子５ならびに図６の斜視図に示
すようにダイオード素子１６及びエミッタ電極１とコレ
クタ電極３、ゲート電極２がハンダで接着されている。
ＩＧＢＴ素子５ならびにダイオード素子１６のパッド１
３には、パッドと接触する部分に薄く金が施されている
一枚のアルミニウム板６が拡散接合によって接合され、
間に金属間化合物１５が形成されている。そのアルミニ
ウム板とエミッタ電極とは複数のアルミニウムワイヤ１
２によって接続されている。また、ゲートパッドとゲー
ト電極２とはアルミニウムワイヤ１２によって接続され
ている。アルミニウム板の上にワイヤボンディングする
ので、大きな荷重及び超音波を印加しても活性領域に損
傷が起らない効果がある。この絶縁板４が放熱板７に固
着され、ケース８に接続されているエミッタ端子９、ゲ
ート端子１０よびコレクタ端子１１をそれぞれの電極に
ハンダで接着され、ケース８で全体が覆われその中が樹
脂で満たされた構成のＩＧＢＴモジュールである。本実
施例ではアルミニウムワイヤでアルミニウム板６と電極
とを接続しているが、本発明はアルミニウムワイヤに限
定されず例えば銅，金及びニッケルなどの導電性の材料
であればよい。またワイヤに替えて実施例１で示したよ
うな板状の導電部材を更に用いて接続しても良いことは
明らかである。
【００１９】（実施例４）図７は、本発明の一実施例の
ＩＧＢＴモジュール１８を用いた電力変換装置である。
上述したＩＧＢＴ素子５とダイオード１６を搭載した複
数のＩＧＢＴモジュール１８によって電力変換装置が構
成されている。
【００２０】本電力変換装置は、上述した半導体装置を
用いるので、通電時の劣化が少なく、信頼性の高い電力
変換装置となる。
【００２１】
【発明の効果】この発明は、以上の説明から明らかなよ
うに、ボンディングパッドと電極とを板状の導電体を用
いて接続し、パッドとはハンダやペースト及び拡散接合
等の小さな荷重によって接合するので素子の損傷がない
こと、また板状の導電体を用いるので放熱特性が向上
し、通電の際の温度上昇が抑制できるため発生する熱応
力が軽減され、接合部の劣化が起こりにくい高信頼の半
導体装置が達成される。
【図面の簡単な説明】
【図１】本発明の一実施例である半導体装置の断面図で
ある。
【図２】本発明の一実施例である半導体装置の斜視図で
ある。
【図３】本発明の一実施例である半導体装置の断面図で
ある。
【図４】本発明の一実施例である半導体装置の斜視図で
ある。
【図５】本発明の一実施例である半導体装置の断面図で
ある。
【図６】本発明の一実施例である半導体装置の斜視図で
ある。
【図７】本発明の一実施例である電力変換装置を表す図
である。
【図８】従来の技術によるワイヤボンディング部を表す
図である。
【符号の説明】
１…エミッタ電極、２…ゲート電極、３…コレクタ電
極、４…絶縁板、５…ＩＧＢＴ素子、６…アルミニウム
板、７…放熱板、８…ケース、９…エミッタ端子、１０
…ゲート端子、１１…コレクタ端子、１２…アルミニウ
ムワイヤ、１３…パッド、１４…活性領域、１５…金属
間化合物層、１６…ダイオード素子、１７…クラック、
１８…ＩＧＢＴモジュール。
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 25/00 H01L 21/60 H01L 27/04 H01L 29/78

Claims (2)

    (57)【特許請求の範囲】
  1. 【請求項１】半導体素子の活性領域となる半導体層の上
    に、素子の外部の電極と電気的に接続される複数のボン
    ディングパッドを有する半導体装置において、前記複数
    のボンディングパッド同士が板状の導電性部材で接続さ
    れ、この板状の導電性部材と素子の外部の電極とは、他
    の導電性部材を介して接続されていることを特徴とする
    半導体装置。
  2. 【請求項２】請求項１記載の半導体装置において、前記
    他の導電性部材は、ボンディングワイヤであることを特
    徴とする半導体装置。
JP05037093A 1993-03-11 1993-03-11 半導体装置 Expired - Lifetime JP3216305B2 (ja)

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JPH06268027A JPH06268027A (ja) 1994-09-22
JP3216305B2 true JP3216305B2 (ja) 2001-10-09

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JP2009302579A (ja) * 2009-09-28 2009-12-24 Fuji Electric Device Technology Co Ltd 半導体装置およびその製造方法
US9312234B2 (en) 2012-05-29 2016-04-12 Nsk Ltd. Semiconductor module and method for manufacturing the same
DE102013104207A1 (de) 2013-04-25 2014-11-13 Epcos Ag Vorrichtung und Verfahren zur Herstellung einer elektrisch leitfähigen und mechanischen Verbindung

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WO2018189276A1 (en) * 2017-04-11 2018-10-18 Audi Ag Power electronics module
US11183489B2 (en) 2017-04-11 2021-11-23 Audi Ag Power electronics module

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