JP2854151B2 - Data search control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data search control system for searching data at a specific address at high speed in an information processing system including a data search device and an information processing device.

[0002]

2. Description of the Related Art A conventional information processing system including a data search apparatus and an information processing apparatus will be described with reference to the drawings. FIG. 3 shows a data search apparatus and an information processing apparatus which are interconnected by a conventional connection method. FIG. 1 is a configuration diagram of an information processing system including devices. The information processing device 31 and the data search device 32 are connected by an address bus 33 and a data bus 34. The data search device 32 has an address signal and an operation instruction signal (a setting operation signal 35, a binding operation signal 36, a binding release operation). The signal 37 and the search operation signal 38) are input, and a data signal input / output operation is performed on a data storage area (not shown). That is, four types of operations, data binding, data binding release, data setting, and data search, are performed on the data storage area in the data search device 32 specified by the address signal from the information processing device 31 in accordance with the operation instruction signal. Is performed.

Here, the data binding operation is an operation of saving old value data in the data search device 32 and setting new value data from the information processing device 31. The data binding release operation refers to an operation of recovering old value data in the data search device 32. The data setting operation and the data search operation are performed by the data search device 3 respectively.
2 and a read operation from the data search device 32.

For example, if the data of an old value at a certain address is "1" and the data is bound with the value "2", the value "1" is saved and the value "2" is written, and in this state, the data "2" is written. When the search operation is performed, the value “2” is read. If you search for data after setting the value "3",
The value "3" is read. Then, when the data binding release operation is performed, the old value “1” is recovered, and the value “1” is read out by the data search operation.

[0005]

Since the conventional apparatus is configured as described above, the time required for the data search of the information processing apparatus depends on the operation time of the data search apparatus itself. For example, in the case of executing a plurality of processes in the list processing language LISP, that is, in the case where independent control is performed for each process at the same address, the operation speed of the data search device decreases. For this reason, if the frequency of data search is high in the entire processing in the information processing device, there is a problem that the operation speed of the information processing device is significantly reduced.

An object of the present invention is to provide a data search control method that shortens the time required for data search and improves the operation efficiency of an information processing apparatus.

[0007]

In order to achieve the above object, the present invention provides an address signal, a data signal and a data signal.
Generates four types of operation instruction signals: fixed, bound, unbound, and search
Information processing device to execute and an address from the information processing device
The information is stored in the data storage area designated by the signal.
Data setting and data in accordance with the operation instruction signal from the
Data that performs data binding, data binding release, and data search operations.
In an information processing system consisting of
Between the data processing device and the data search device.
A control mechanism is provided, wherein the control mechanism determines whether the address signal is a specific one.
Means for detecting the presence of a range (address detection circuit)
Means for holding a specific value (specific value generating circuit);
Between the write / read data of the data search device and the specific value.
Means for determining a match (data match determination circuit);
The specific value data is stored in the specific range address of the storage area.
A specific value flag (specified value flag register
Star) and data setting or data binding operation mode
The write address is in the specific range, and
When the write data matches the specific value, the
Means for setting fixed value flag and data binding release operation
In the mode, when the address is within the specific range
Means for resetting the specific value flag, and data search
In the operation mode described above, the read address is
And the specific value flag is set.
In this case, the search operation of the data search device is suppressed and the
The specific value held in the information processing device as a search result
In the transfer means and the data search operation mode,
The specific value flag is reset and the data search
Read data by device search operation matches the specified value
And when the read address is within the specific range,
Means for setting the specific value flag .

[0008]

In the setting operation or the binding operation, the address specified by the information processing device is sent out on the address bus, the specified address is input to the address detection circuit, and the specified address signal is set in advance. It is determined whether or not it is within the set range, and if it is within the set range,
Drive the decoder. The decoder decodes the input address signal and selects a corresponding data search control unit if one exists. The data match determination circuit is driven by the selection signal, and the write data from the information processing device and the data of the specific value generation circuit are compared and determined. If they match, "1" indicating the match is set in the specific value flag register. If they do not match, the flag register is in "0" state
Take . At the same time, the write data on the data bus is written to a predetermined area addressed in the data search device.

If the address signal is not within the preset range, the data search control section is not selected, so that no match determination is made in the data match determination circuit, and the write data on the data bus is designated in the data search device. Is written to the area.

In the binding release operation, the data release signal restores the data of the old address specified in the data search device, inputs the specified address to the address detection circuit, and outputs the specified address signal. Is determined to be within a preset range, and if it is within the preset range, the decoder is driven. The decoder decodes the input address signal, selects the corresponding data search control unit if it exists, and generates a selection signal, thereby driving the clear signal generator and clearing from the clear signal generator. The signal clears the specific value flag register.

In the search operation, it is determined whether or not the designated address is in a range set in advance by an address detection circuit. If the address is in the set range, the decoder is driven to decode the input address signal. Then, if a corresponding data search control unit exists, it is selected. As a result, the contents of the selected specific value flag register are checked, and if "1" is set in the specific value flag register, the search result always matches the specific value. The data is read out as a result of the data search and output on the data bus. At this time, no search instruction signal is output, and the search operation of the data search device is suppressed.

As a result of checking the selected specific value flag register, if "1" is not set, a search operation signal from the information processing device is input to the data search device, and the data search is executed. The result of the data search is output to the data bus and input to the data search control unit,
Data match determining circuit reads out data (data search result) from the data search device and comparing determines the data of the specific value generating circuit, if the match, the specific value flag register
Set to "1".

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be specifically described below with reference to the drawings. The present invention utilizes the characteristic of data accumulation that, when data search is actually performed, the rate at which a search result at a specific address matches data of a specific value is extremely high. In other words, a configuration is adopted in which information indicating whether the result of data search always matches certain specific data (that is, information reflecting the search result) is held, and a data search instruction is issued from the information processing apparatus. If there is, it is first determined whether or not the data always matches a specific data. When the match is found, the data search result is the same as the value held in advance, so that the operation of the data search device is suppressed. , The data search operation is performed on the data search device when they do not match.

FIG. 1 is a diagram showing a configuration of a data search control system according to an embodiment of the present invention.
A plurality of data search control units 103 (1031 to 1033) are provided between the data search device 102 and the data search device 102. The information processing device 101 and the data search device 102
A data bus 104 for exchanging data (write data, read data) between the devices, and an address bus 105 for designating an address from the information processing device 101 to the data search device 102. The setting operation signal 106, the binding operation signal 107, the binding release operation signal 108, and the search operation signal 109 are input from the information processing apparatus 101 to the data search apparatus 102,
A data signal input / output operation is performed on a data storage area in the data search device 102. The data search control unit 103 monitors all operations issued from the information processing device 101 to the data search device 102.

An address detection circuit 110 receives an address signal and determines whether or not the address signal is within a preset range. If the address signal is within the preset range, it generates an enable signal on a line 112, The decoder 111 is enabled. If the address signal is not within the preset range, the inverter 113, the OR gate 114,
The gate 120 is controlled to be open via 19. When the address signal is within the set range, the decoder 111
The input address signal is decoded, and a selection signal 115 is given to the data search control unit 103. If the corresponding data search control unit 103 exists, it is selected.

The search instruction signal 116 from the data search control unit 103 is applied to the gate 118 via the OR gates 117 and 114, so that the gate 118 is opened, and the search operation signal 109 from the information processing apparatus 101 is transmitted to the data gate 101. It is input to the search device 102. Further, the search instruction signal 116 is applied to the gate 120 via the OR gate 119 together with the setting operation signal 106 and the binding operation signal 107, and the gate 120 is opened. Data can be input and output.

FIG. 2 is a diagram showing a specific configuration of the data search control unit 103. The specific value generation circuit 201 is a circuit that generates data of a specific value, in other words, a circuit that generates, as a specific value, a value whose value matches at the highest rate as a result of a data search at a specific address. For example, the value is set by a dip switch, a jumper line, or the like. The data match determination circuit 202 is enabled by the selection signal 115 and determines whether or not the data on the data bus 104 matches the data on the specific value generation circuit 201. ,
“1” indicating coincidence is set in the 1-bit specific value flag register 203. That is, 1 in particular value flag register 203 of the bit "1" if it is set, the specific
This indicates that the data of the address in the range is a specific value.

The clear signal generator 204 outputs the selection signal 11
When the gate 206 is open, the specific value flag register 203 is cleared. When the gate 206 is open, the specific value flag register 203 is cleared. The AND gate 208 takes the logical product of the selection signal 115, the contents of the specific value flag register 203, and the search operation signal 109 from the information processing apparatus 101, and opens the gate 207 when the AND logic is established, so that the specific value generating circuit 2
The specific value set to “01” is output to the data bus 104. If the AND logic does not hold, the inverter 21
0 to generate a search instruction signal 116. Further, the gate 205 is opened by one of the search instruction signal 116, the setting operation signal 106, and the binding operation signal 107 via the OR gate 209, and the result of the determination by the data match determination circuit 202 is written to the specific value flag register 203. It is.

Hereinafter, the operation of the present invention will be described in detail by dividing into (1) setting operation or binding operation, (2) binding release operation, and (3) search operation. (1) Setting operation or binding operation; The setting operation is an operation of writing data to a specified address of the data search device 102 as described above, and the data binding operation is a process of writing a specified address in the data search device 102. This is an operation of saving old value data and writing new value data from the information processing apparatus 101. Since both operations are the same in terms of write operation, the two operations will be described together.

At the time of the setting operation or the binding operation, the address specified by the information processing device 101
05, and the specified address is input to the address detection circuit 110. Address detection circuit 110
Determines whether the designated address signal is within a preset range, and if it is within the preset range, line 11
2 to generate an enable signal to enable the decoder 111. The decoder 111 decodes the input address signal, and
If exists, select it. In the selected data search control unit 103 of FIG. 2, the gate 205 is opened by the setting operation signal 106 or the binding operation signal 107 via the OR gate 209, and since there is no search operation signal 109, the AND gate 208 is closed. 207 is closed.

Since the data match determination circuit 202 is enabled by the selection signal 115, the information processing apparatus 1
The write data from 01 and the data of the specific value generation circuit 201 are compared and determined. If they match, “1” indicating the match is set in the specific value flag register 203 via the gate 205, and if they do not match. In this case, the flag register assumes the "0" state. At the same time, OR gate 11
Setting operation signal 106 or binding operation signal 10 via
7, the gate 120 is opened, so that the write data on the data bus 104
The data is written to a specified area in the data search device 102 that is addressed.

On the other hand, if the address signal is not within the preset range, the data search control section 103 is not selected, so the data match determination circuit 202 does not perform a match determination, and the write data on the data bus 104 is
0 is written to a designated area in the data search device 102.

(2) Binding release operation: As described above, the data with the old value specified in the data search device 102 is recovered by the data binding release signal 108. Further, the designated address is input to the address detection circuit 110, and the address detection circuit 110 determines whether or not the designated address signal is within a preset range. Is enabled. The decoder 111 decodes the input address signal, selects the corresponding data search control unit 103 if it exists, and generates a selection signal 115. The clear signal generator 204 is enabled by the selection signal 115, and the gate 206 of the selected data search control unit 103 is opened by the data binding release signal 108 (the gates 205 and 207 are closed). The specific value flag register 203 is cleared by the clear signal from the device 204. That is, it is unknown what data the recovered old value data is, and it is of course also unknown whether or not it matches the specific value. Therefore, the flag register 203 is cleared.

As apparent from the above (1) setting operation or binding operation and (2) binding release operation, when data search is performed in a state where "1" is set in the specific value flag register 203, It is guaranteed that the search result always matches the specific value.

(3) Search operation: When the information processing apparatus 101 instructs the data search apparatus 102 to perform a data search operation, it is determined whether or not the designated address is within a range set by the address detection circuit 110 in advance. , The decoder 111 is enabled. The decoder 111 decodes the input address signal and selects the corresponding data search control unit 103 if it exists. Thereby, the selection signal 115 is output,
Since the search operation is instructed, the contents of the selected specific value flag register 203 are checked by the AND gate 208.

That is, if "1" is set in the specific value flag register 203, it is guaranteed that the search result always matches the specific value.
The gate 207 is opened by the output of 8 (the gate 205 is closed at this time), the specific value of the specific value generation circuit 201 is read out as a result of the data search, and output to the data bus 104. At this time, since the output of the AND gate 208 is inverted and output by the inverter 210, the search instruction signal 116 is not output, and therefore the gate 118 is not opened and the data search operation signal 109 is not supplied. The search operation is suppressed.

On the other hand, the selected specific value flag register 2
03, if "1" is not set (it is very likely that the search result does not match the specific value), the specific value flag register 203 is "0", and the AND gate 208 is closed. The gate 205 is opened and the gate 207 is closed by the search signal 116 via the inverter 210 and the OR gate 209. Further, the generated search instruction signal 116 is applied to the gate 118 via the OR gates 117 and 114, and to the gate 120 via the gate 119, whereby the gate 1
18 and 120 are opened, the search operation signal 109 from the information processing apparatus 101 is input to the data search apparatus 102, and the data search is executed.

The result of the data search is output to the data bus 104 via the gate 120 and also to the data search control unit 103 selected previously, and the data match judgment circuit 202 reads the data from the data search device 102. The data (data search result) is compared with the data of the specific value generation circuit 201, and if they match , the specific value flag register 203 is set to “1” via the gate 205.
You .

As is clear from the above description, when the data search device is instructed to search for data within an address within a preset range, the search result matches the specific value set for each address. Is not activated, the actual data search operation is suppressed, and the data search control unit 10
3 is returned to the information processing apparatus 101 as a search result, thereby speeding up the search operation.

[0030]

As described above, according to the present invention, in an information processing apparatus having a low-speed data search device as a component, a data search control unit for holding data searched from a specific address range. Has been established,
At the time of data search for a specific address range, if the search result is held in the data search control unit, the search result can be obtained without operating the data search device, and the operation speed of data search is remarkably increased. To improve. In particular,
When the frequency of data search for a specific address is high, the processing in the information processing device can be speeded up.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a data search control method according to an embodiment of the present invention.

FIG. 2 is a diagram showing a specific configuration of a data search control unit of the present invention.

FIG. 3 is a configuration diagram of an information processing system including a data search device and an information processing device mutually connected by a conventional connection method.

[Explanation of symbols]

 Reference Signs List 101 information processing device 102 data search device 103 data search control unit 104 data bus 105 address bus 106 setting operation signal 107 binding operation signal 108 binding release operation signal 109 search operation signal 110 address detection circuit 111 decoder 115 selection signal 116 search instruction signal 201 Specific value generation circuit 202 Data match determination circuit 203 Specific value flag register 204 Clear signal generator

Claims (1)

(57) [Claims] An address signal, a data signal and a setting;
An information processing device that issues four types of operation instruction signals of binding, release of binding, and search; and a data storage area designated by an address signal from the information processing device, in accordance with the operation instruction signal from the information processing device. A data search control method in an information processing system including a data search device that performs data setting, data binding, data binding release, and data search operations, wherein an address signal is provided between the information processing device and the data search device. Means for detecting that the value is within a specific range; means for holding a specific value; means for determining whether the read / write data of the data search device matches the specific value; A specific value flag indicating whether or not data of a specific value is stored, and an operation mode of data setting or data binding, Means for setting the specific value flag when the write address is in the specific range, and when the write data matches the specific value, and when the address is in the specific range in the data binding release operation mode. Means for resetting the specific value flag, and in a data search operation mode, when a read address is in the specific range and the specific value flag is set, a search operation of the data search device is suppressed. Means for transferring the held specific value to the information processing device as a search result; and in the data search operation mode, the specific value flag is reset, and the read data obtained by the search operation of the data search device is read. Sets the specific value flag when the specified value matches the specific value and the read address is in the specific range. Data search control method characterized by comprising means, the control means comprising a.