JP2621507B2 - Insulated gate semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an insulated gate semiconductor device, and
The present invention relates to a resin-encapsulated semiconductor device (hereinafter referred to as a power module) in which a resin is injected and sealed in a tank-shaped container formed of a metal substrate supporting one or a plurality of semiconductor elements and an insulating material frame.

[Conventional technology]

In recent years, power modules have been shifting from bipolar devices to insulated gate semiconductor devices typified by power MOSFETs in response to demands for higher frequency devices.

In the case of an insulated gate type semiconductor device, dielectric breakdown occurs due to static electricity or the like, so that it is difficult to handle.

FIG. 3 shows an example of a circuit configuration of the power MOSETF module. In this figure, 11 is the power MOSFET and 12 is this power MO
Reflux diode (MOSFET connected in anti-parallel to SFET11)
, A built-in diode may be used). D, S, and G indicate a drain, a source, and a gate electrode, respectively.

Since the power MOSFET 11 described above has a gate structure of an insulated gate made of an oxide film or the like, when the element is incorporated in a device, the element may be broken down due to static electricity.

It is also known to connect an anti-series zener diode between the gate and source of an insulated gate semiconductor device to prevent gate breakdown. This is shown in FIG. Two
Zener diodes 3 and 24 are connected between the source S and the gate G in anti-series. In this case,
Even if a surge voltage is applied between the source and the gate, the voltage is clamped by the Zener diodes 23 and 24, so that gate insulation breakdown hardly occurs.

[Problems to be solved by the invention]

However, in the case of the conventional example shown in FIG. 4, when a voltage is applied to the device while the connection between the gate and the source signal is in a loose contact state, the device may be broken.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and it is an object of the present invention to provide an insulated gate semiconductor device which is resistant to static electricity and destruction by voltage application due to loose contact between a gate and a source.

[Means for solving the problem]

In the insulated gate semiconductor device according to the present invention, at least one semiconductor device is an insulated gate semiconductor device, and a resistor is connected in parallel with each of the anti-series zener diodes between the gate and the source of the insulated gate semiconductor device. It was done.

[Action]

In the present invention, the Zener diode gate
Since an anti-series zener diode is connected between the sources and a resistor is connected in parallel with each of these zener diodes, even if the connection of the signal terminal between the source and gate is loose contact and voltage is applied. Then, the gate-source capacitance is discharged to the resistor, and the gate dielectric breakdown is prevented.

〔Example〕

 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing an example of a circuit configuration of an insulated gate semiconductor device showing one embodiment of the present invention. In this figure,
Reference numeral 21 denotes a power MOSFET, and reference numeral 22 denotes a freewheeling diode connected in anti-parallel to the power MOSFET 21. Reference numerals 23 and 24 denote Zener diodes connected in reverse series between the source and gate of the power MOSFET 21. Reference numerals 25 and 26 denote resistors connected in parallel to the Zener diodes 23 and 24, respectively.

In this case, even if a surge voltage is applied between the source and the gate due to static electricity, the voltage is clamped by the Zener diodes 23 and 24, so that gate insulation breakdown hardly occurs. Recently, power MOSFETs that operate at a gate voltage of 4 V, which can be directly driven by ICs, have been used. In this case, the thickness of the gate oxide film is generally about
The gate oxide film has a withstand voltage of about 30 V because it is as thin as 400 mm
And low. Therefore, if the Zener breakdown voltage of the Zener diodes 23 and 24 is properly selected, the Zener diodes 23 and 24 can be used for protection against external surge breakdown voltage.

Then, resistors 25, 25 are connected in parallel with the Zener diodes 23, 24.
The connection of 26 serves to discharge the charge of the capacitance between the gate and the source of the MOSFET. For this reason, even if the connection of the signal terminal between the gate and source is accidentally applied with a loose contact and a seed voltage is applied, the electrification of the gate-source capacitance is discharged by the low antibodies 25 and 26,
Element destruction does not occur.

Next, an embodiment of the structure of the insulated gate semiconductor device of the present invention will be described.

FIG. 2 is a perspective view showing the internal structure of the power MOS module of the present invention. In this figure, reference numeral 301 denotes a metal substrate made of Cu or the like, 302 denotes an insulating substrate made of ceramic or the like mounted on the metal substrate 301 by a method such as brazing, and the insulating substrate 302 has a frame-like shape. After the tanks have been mounted, the resin is injected into the tanks and sealing is performed after the components have been attached. However, the configuration of the tanks is omitted in FIG. Reference numeral 303 denotes a drain electrode soldered on the insulating substrate 302, and the drain electrode 303 is connected to a drain terminal 310 for external extraction. A MOSFE chip 304 is soldered on the drain electrode 303. In this case, the reflux diode 22 is MOSF
Although the structure is built in the ET chip 304, another chip may be used. Reference numerals 305 and 306 denote a source electrode and a gate electrode, respectively. 307 is two Zener diodes (or a Zener diode with a resistor composed of one chip)
Metal electrodes for connecting 308 and 309, which are soldered on the insulating substrate 302. The resistors 25 and 26 in FIG. 1 are not shown.

The source 311 and the gate 312 of the MOSFET chip 304 are electrically connected to the source electrode 305 and the gate electrode 306 by wire bonding or the like, respectively. Further, one of the two Zener diodes 308 and 309 is
Then, it is already connected to the source electrode 305.

In the above embodiment, the case where the resistor and the Zener diode are formed on one chip has been described. In the above embodiment, a power MOSFET is taken as an example, but the present invention can be applied to all insulated gate devices such as IGBTs (insulated gate bipolar transistors) and MCTs (MOS control thyristors). Especially IG
In the case of BT, when the gate voltage becomes high, a large amount of saturation current flows, and there is a surface in which the withstand voltage at the time of short circuit is weakened. Therefore, by appropriately controlling the Zener withstand voltage, it becomes easier to use than the conventional one. It is desirable to select an appropriate Zener withstand voltage in the range of 10 to 20 V depending on the application. In particular, for inverter applications, which are the main market, it is desirable to set the voltage within the range of 12 to 15V.

〔The invention's effect〕

As described above, according to the present invention, at least one semiconductor element is an insulated gate semiconductor element, an anti-series zener diode is connected between the gate and source of the insulated gate semiconductor element, and each of the zener diodes is Since the resistor is connected in parallel, the gate-source capacitance is discharged to the resistor even if a loose connection is applied to the signal terminal connection between the source and gate, preventing gate breakdown. .

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an insulated gate semiconductor device showing an embodiment of the present invention, FIG. 2 is a perspective view showing an internal structure of the insulated gate semiconductor device of the present invention, and FIG. FIG. 4 is a diagram for explaining an example, and FIG. 4 is a diagram for explaining another conventional example. In the figure, 21 is a power MOSFET, 22 is a reflux diode, 23 and 24 are Zener diodes, 25 and 26 are resistors, S is a source electrode, G is a gate electrode, and D is a drain electrode.

Claims (1)

(57) [Claims] 1. A resin-encapsulated semiconductor device in which a resin is injected and sealed in a tank-shaped container formed of a metal substrate supporting one or a plurality of semiconductor elements and an insulating material frame, wherein at least one semiconductor element is provided. An insulated gate semiconductor device, wherein an anti-series zener diode is connected between the gate and source of the insulated gate semiconductor device, and a resistor is connected in parallel to each of the zener diodes. element.