JP2019220703A - Imaging device and method for manufacturing the same, and camera - Google Patents

Abstract

To provide a technique useful for suppressing the creation of a residual image.SOLUTION: A method for manufacturing an imaging device comprises the steps of: preparing a substrate including a wafer having a first semiconductor region including single crystal silicon of which the oxygen density is within a range of 2×10to 4×10atoms/cm, and a silicon layer disposed on the first semiconductor region, and having a second semiconductor region including single crystal silicon of which the oxygen density is lower than that of the first semiconductor region; performing a thermal treatment on the substrate in an oxygen-containing atmosphere, thereby making the oxygen density of the second semiconductor region fall within a range of 2×10to 4×10atoms/cm; and forming a photoelectric conversion element in the second semiconductor region after the thermal treatment.SELECTED DRAWING: Figure 7

Description

  The present invention relates to an imaging device, a method for manufacturing the same, and a camera.

  In an imaging apparatus, image quality deteriorates when an afterimage occurs. The cause of the afterimage is the presence of oxygen in silicon. Patent Document 1 relates to a solid-state imaging device, and it describes that the lower the oxygen concentration in a semiconductor substrate, the smaller the afterimage.

JP 2007-251074 A

  Patent Literature 1 is not sufficiently studied in suppressing afterimages. Therefore, in the solid-state imaging device described in Patent Literature 1, an afterimage may occur in a pixel whose oxygen concentration does not become sufficiently small.

  The present invention has been made in consideration of the above problems, and has as its object to provide an advantageous technique for suppressing occurrence of an afterimage.

One aspect of the present technology includes a wafer having a first semiconductor region made of single-crystal silicon having an oxygen concentration in a range of 2 × 10 ¹⁶ atoms / cm ³ or more and 4 × 10 ¹⁷ atoms / cm ³ or less, and the wafer Providing a silicon layer having a second semiconductor region made of single crystal silicon having a lower oxygen concentration than that of the first semiconductor region. Heat-treating the substrate to make the oxygen concentration in the second semiconductor region in the range of 2 × 10 ¹⁶ atoms / cm ^{3 to} 4 × 10 ¹⁷ atoms / cm ³ , and after the heat treatment, Forming a photoelectric conversion element.

According to another aspect of the present technology, the imaging device includes a pixel portion in which a plurality of pixels are arranged on a substrate made of silicon, and a peripheral portion arranged around the pixel portion on the substrate. A peripheral circuit section including a circuit for processing a signal from each pixel, wherein the peripheral circuit section includes a transistor having a silicide region containing at least one of nickel and cobalt. Each pixel is formed on the substrate and includes a first region of a first conductivity type including a portion for accumulating charges generated by photoelectric conversion, and a first region of the substrate that is deeper than the first region and has a first position. A second region of the first conductivity type disposed at a position distant from the region, and a second conductive region disposed between the first region and the second region in a depth direction from a surface of the substrate. A third region of the mold, A region disposed at a position away from the second region in the depth direction, a first portion including a position at which a net impurity concentration of the second conductivity type exhibits a first local maximum, and a region in the depth direction. A second portion disposed between the first portion and the second region, the second portion including a position where the net impurity concentration of the second conductivity type shows a second maximum value lower than the first maximum value. And wherein the second portion has an oxygen concentration of 1 × 10 ¹⁷ [atoms / cm ³ ] or less.

  According to the present invention, an advantageous technique for suppressing the occurrence of an afterimage is provided.

FIG. 1 is a diagram schematically showing a cross-sectional structure of an imaging device according to one embodiment of the present invention. FIG. 5 is a view for exemplifying a method for manufacturing the imaging device according to one embodiment of the present invention. FIG. 5 is a view for exemplifying a method for manufacturing the imaging device according to one embodiment of the present invention. FIG. 5 is a view for exemplifying a method for manufacturing the imaging device according to one embodiment of the present invention. FIG. 5 is a view for exemplifying a method for manufacturing the imaging device according to one embodiment of the present invention. The figure which shows the distribution of the oxygen concentration in the depth direction of the semiconductor substrate about embodiment and a comparative example (before execution of a heat treatment process). FIG. 4 is a view showing the distribution of oxygen concentration in the depth direction of the semiconductor substrate according to the embodiment and the comparative example (after a heat treatment step in an atmosphere containing oxygen). FIG. 7 is a view showing distribution of oxygen concentration in the depth direction of the semiconductor substrate in the embodiment and the comparative example (after the heat treatment in an oxygen-containing atmosphere and the heat treatment in an oxygen-free atmosphere). FIG. 4 is a diagram showing a distribution of oxygen concentration in a semiconductor substrate of a manufactured imaging device. FIG. 4 illustrates an example of a structure of an imaging device. FIG. 4 is a diagram for explaining an impurity concentration distribution and an oxygen concentration distribution in a substrate. FIG. 9 is a diagram for explaining the oxygen concentration dependency in the substrate on the afterimage in the image and the determination result on the afterimage and white flaw. FIG. 4 is a diagram illustrating an example of a method for manufacturing an imaging device. FIG. 4 is a diagram illustrating an example of a method for forming an element isolation portion. FIG. 3 is a diagram illustrating a configuration example of a camera. FIG. 4 is a diagram for explaining an element isolation unit. FIG. 4 is a diagram for explaining an element isolation unit. FIG. 4 is a diagram for explaining an element isolation unit.

  Hereinafter, the present invention will be described through a first exemplary embodiment thereof with reference to the accompanying drawings.

In an imaging apparatus, image quality deteriorates when an afterimage occurs. The cause of the afterimage is the presence of oxygen in silicon. Japanese Patent Application Laid-Open No. 2007-251074 relates to an image sensor. Japanese Patent Application Laid-Open No. 2007-251074 describes that the lower the oxygen concentration in the semiconductor substrate, the smaller the afterimage. As a specific example, JP-A-2007-251074 describes that a photodiode is formed on a silicon substrate having an oxygen concentration in a range of 13.3 × 10 ^{17 to} 13.7 × 10 ¹⁷ / cm ^3. ing. JP 2010-34195 A relates to a silicon wafer such as an epitaxial wafer. Japanese Patent Application Laid-Open No. 2010-34195 discloses that a silicon wafer having a concentration distribution having a maximum value and a minimum value of dissolved oxygen at a fixed depth is obtained by subjecting a wafer to a rapid temperature raising / lowering heat treatment in an oxygen gas atmosphere. It is described.

  If the gradient of the oxygen concentration in the depth direction of the semiconductor substrate for forming the imaging device is large, the degree of diffusion of oxygen may vary due to a process error in a manufacturing stage. As a result, the oxygen concentration may vary among a plurality of manufactured imaging devices. Then, an afterimage may occur in an individual whose oxygen concentration does not become sufficiently small. Alternatively, distribution of oxygen concentration may occur between pixels in the imaging device. Then, an afterimage may occur in a pixel where the oxygen concentration does not become sufficiently small.

  The present embodiment has been made in recognition of the above problem, and has as its object to provide an advantageous technique for suppressing occurrence of an afterimage.

One side surface of the present embodiment is as follows: (a) a first semiconductor region made of single-crystal silicon having an oxygen concentration in a range of 2 × 10 ¹⁶ atoms / cm ³ or more and 4 × 10 ¹⁷ atoms / cm ³ or less;
A second semiconductor region disposed on the first semiconductor region, the second semiconductor region being made of single crystal silicon and having a lower oxygen concentration than the first semiconductor region;
Preparing a semiconductor substrate including:
(B) a step of heat-treating the semiconductor substrate in an atmosphere containing oxygen so that the oxygen concentration of the second semiconductor region falls within a range from 2 × 10 ¹⁶ atoms / cm ^{3 to} 4 × 10 ¹⁷ atoms / cm ^3. When,
(C) forming a photoelectric conversion element in the second semiconductor region.

  According to the present embodiment, an advantageous technique for suppressing occurrence of an afterimage is provided.

  In the following description, the first conductivity type and the second conductivity type are terms used to distinguish the conductivity types, and when the first conductivity type is n-type, the second conductivity type is p-type. Yes, conversely, if the first conductivity type is p-type, the second conductivity type is n-type.

  FIG. 1 schematically shows a cross-sectional structure of an imaging device 100 according to one embodiment of the present invention. The imaging device 100 is a solid-state imaging device having a semiconductor substrate SS including a first semiconductor region 101 and a second semiconductor region 102 disposed on the first semiconductor region 101. Of the two surfaces of the second semiconductor region 102, the surface opposite to the first semiconductor region 101 forms the surface of the semiconductor substrate SS. The first semiconductor region 101 can be formed on the back surface of the semiconductor substrate SS. The second semiconductor region 102 is continuous with the first semiconductor region 101. That is, there is no insulator region between the first semiconductor region 101 and the second semiconductor region 102. In this example, the first semiconductor region 101 and the second semiconductor region 102 both have the first conductivity type. That is, in this example, the first semiconductor region 101 and the second semiconductor region 102 have the same conductivity type. The first semiconductor region 101 and the second semiconductor region 102 may have different conductivity types from each other. As described later, a plurality of impurity regions having different conductivity types and impurity concentrations are provided in the second semiconductor region 102.

  The concentration of the first conductivity type impurity in the first semiconductor region 101 is different from the concentration of the first conductivity type impurity in the second semiconductor region 102. In one example, the concentration of the first conductivity type impurity in the first semiconductor region 101 is higher than the concentration of the first conductivity type impurity in the second semiconductor region 102. In another example, the concentration of the first conductivity type impurity in the first semiconductor region 101 is lower than the concentration of the first conductivity type impurity in the second semiconductor region 102.

  The first semiconductor region 101 is made of single crystal silicon, and can be formed by slicing and polishing an ingot of single crystal silicon. The second semiconductor region 102 is made of single crystal silicon, and can be formed by forming a single crystal silicon layer on the first semiconductor region 101 by an epitaxial growth method. A layer formed by the epitaxial growth method is called an epitaxial layer. Since the crystal lattice may be continuous between the first semiconductor region 101 and the second semiconductor region 102, a clear interface may not be observed in some cases.

  The photoelectric conversion element PD is arranged on the semiconductor substrate SS of the imaging device 100. The photoelectric conversion element PD is provided at least in the first semiconductor region 101. In this example, the photoelectric conversion element PD is disposed in the first semiconductor region 101, but the photoelectric conversion element can be extended to the second semiconductor region 102. The photoelectric conversion element PD has a first conductivity type impurity region 104 that can function as a charge storage region. In the impurity region 104 of the first conductivity type, the signal charges form majority carriers. Further, the photoelectric conversion element PD may include an impurity region 103 having a second conductivity type different from the first conductivity type between the impurity region 104 and the first semiconductor region 101. Further, the photoelectric conversion element PD may include a first conductivity type impurity region 102b disposed below the impurity region 104 so as to be continuous with the impurity region 104. The portion of the second semiconductor region 102 located below the impurity region 103 is the impurity region 102a, and the portion of the second semiconductor region 102 located above the impurity region 103 is the impurity region 102b. is there.

  The impurity concentration of the first conductivity type of the impurity region 104 is higher than the impurity concentration of the second semiconductor region 102 (the impurity region 102a and the impurity region 102b). The impurity region 104, the impurity region 102b, and the impurity region 103 form a photoelectric conversion element PD. Of the negative charges (electrons) and positive charges (holes) generated by photoelectric conversion in the photoelectric conversion element PD, charges of the same type as the majority carrier in the first conductivity type are accumulated in the impurity region 104. The photoelectric conversion element PD may include an impurity region 105 having the second conductivity type, which is disposed above the impurity region 104, that is, between the impurity region 104 and the surface of the semiconductor substrate SS. The impurity region 105 functions to separate the impurity region 104 from the surface of the semiconductor substrate SS, thereby forming a photoelectric conversion element PD having a buried photodiode structure.

  Although not shown, the imaging device 100 has a plurality of impurity regions 104. The plurality of impurity regions 104 can be separated from each other by second conductivity type impurity regions 106 and 107 functioning as isolation regions by a potential barrier. The impurity region 103 can be arranged below the arrangement of the plurality of impurity regions 104 so as to extend over the entire region of the arrangement.

  The imaging device 100 may be configured as a MOS image sensor, may be configured as a CCD image sensor, or may be configured as another type of image sensor. Hereinafter, an example in which the imaging device 100 is configured as a MOS image sensor will be described.

  The charge accumulated in the impurity region 104 is of a first conductivity type functioning as a floating diffusion region through a channel formed in the impurity region 102b when an active-level potential is applied to the gate electrode 114 (transfer gate). Is transferred to the impurity region 112. The impurity region 112 is formed between the impurity region 102b and the surface of the semiconductor substrate SS in the second semiconductor region 102. The gate electrode 114 is disposed on the semiconductor substrate SS via a gate insulating film 116. The impurity region 104, the impurity region 112, the gate electrode 114, and the gate insulating film 116 have a MOS transistor structure. An impurity region 111 functioning as an electric field relaxation region may be arranged adjacent to the impurity region 104 on the side of the impurity region 112. The impurity region 111 may have a first conductivity type.

  The imaging device 100 may include a plurality of transistors Tr to output a signal corresponding to the charges transferred to the impurity region 112 to the column signal line. The plurality of transistors Tr are arranged on the surface side of the semiconductor substrate SS. The transistor Tr may include an impurity region 113 forming a source and a drain, a gate electrode 115, and a gate insulating film 117. Elements to be separated from each other among the elements including the plurality of transistors Tr and the impurity regions 104 (photoelectric conversion elements) can be separated by the element separation unit 110. The element isolation section 110 can be formed of an insulator having an STI structure or a LOCOS structure formed on the surface side of the semiconductor substrate SS, but can also be formed by PN junction isolation. The second conductivity type impurity region 109 is formed around the element isolation part 110. The impurity region 109 can function as a channel stop or as a shield against dark current generated at the interface between the element isolation portion 110 and the first semiconductor region 102. An impurity region having the second conductivity type may be arranged between the impurity regions 109 and 103.

  On the semiconductor substrate SS, an insulating layer 118, a plurality of insulating layers 123, wiring layers 120 and 122, a contact plug 119, a via plug 121, and the like can be arranged. The insulating layer 118 can function as, for example, an antireflection film and / or an etching stopper. The plurality of insulating layers 123 can function as interlayer insulating films. A color filter layer 124, a micro lens 125, and the like may be disposed on the plurality of insulating layers 123.

  Hereinafter, a method for manufacturing the imaging device 100 will be exemplarily described with reference to FIGS. First, in step S200 shown in FIG. 2, a preparation process for preparing semiconductor substrate SS is performed. The semiconductor substrate SS includes a first semiconductor region 101 having a first conductivity type and a second semiconductor region 102 having the first conductivity type and disposed on the first semiconductor region 101. The first semiconductor region 101 can be, for example, a single crystal silicon substrate. In a more specific example, the first semiconductor region 101 is obtained by mirror-polishing the main surface of a disk member cut from a single crystal silicon ingot having a diameter of 300 mm and pulled up by a magnetic field application CZ method (MCZ method). Single crystal silicon wafer.

The preparation step performed in step S200 may include a step of preparing the first semiconductor region 101 and a step of forming the second semiconductor region 102 on the first semiconductor region 101. The second semiconductor region 102 can be typically formed on the first semiconductor region 101 by an epitaxial growth method. For example, each of the first semiconductor region 101 and the second semiconductor region 102 shows n-type by containing about 1 × 10 ^{14 to} 5 × 10 ¹⁴ atoms / cm ³ of phosphorus as an impurity.

The oxygen concentration of the first semiconductor region 101 may be in a range from 2 × 10 ¹⁶ atoms / cm ^{3 to} 4 × 10 ¹⁷ atoms / cm ³ , for example, 1 × 10 ¹⁷ atoms / cm ³ . When the oxygen concentration falls within this range, the minimum value C10min of the oxygen concentration of the first semiconductor region 101 is 2 × 10 ¹⁶ atoms / cm ³ or more, and the maximum value C10max of the oxygen concentration of the first semiconductor region 101 is 4 × 10 ¹⁷ atoms / cm ³ or less. This oxygen concentration can be determined from, for example, a conversion coefficient by Old ASTM. There are no restrictions on the dimensions, resistivity, or conductivity type of the first semiconductor region 101. The oxygen concentration of the second semiconductor region 102 is lower than the oxygen concentration of the first semiconductor region 101. For example, the minimum value C20min of the oxygen concentration of the second semiconductor region 102 is smaller than the maximum value C10max of the oxygen concentration of the first semiconductor region 101 (C20min <C10max). Further, the minimum value C20min of the oxygen concentration of the second semiconductor region 102 is smaller than the minimum value C10min of the oxygen concentration of the first semiconductor region 101 (C20min <C10min). In addition, for example, the maximum value C20max of the oxygen concentration of the second semiconductor region 102 is smaller than the maximum value C10max of the oxygen concentration of the first semiconductor region 101. Further, the maximum value C20max of the oxygen concentration of the second semiconductor region 102 is smaller than the minimum value C10min of the oxygen concentration of the first semiconductor region 101. The second semiconductor region 102 has the same conductivity type as the first semiconductor region 101, and may have a thickness in a range of 5 μm or more and 50 μm or less, more preferably in a range of 5 μm or more and 25 μm or less.

  The second semiconductor region 102 may be formed such that the concentration of the first conductivity type impurity in the first semiconductor region 101 is different from the concentration of the first conductivity type impurity in the second semiconductor region 102. In one example, the second semiconductor region 102 can be formed such that the concentration of the first conductivity type impurity in the first semiconductor region 101 is higher than the concentration of the first conductivity type impurity in the second semiconductor region 102. In another example, the second semiconductor region 102 may be formed such that the concentration of the first conductivity type impurity in the first semiconductor region 101 is lower than the concentration of the first conductivity type impurity in the second semiconductor region 102.

FIG. 6 illustrates the distribution of the oxygen concentration in the depth direction of the semiconductor substrate SS by a solid line. The horizontal axis indicates the depth from the surface of the semiconductor substrate SS, and the vertical axis indicates the oxygen concentration (atmos / cm ³ ). Here, a solid line (embodiment) in FIG. 6 indicates a semiconductor substrate SS obtained by forming the second semiconductor region 102 on the first semiconductor region 101 having an oxygen concentration of 1 × 10 ¹⁷ atoms / cm ³ . The distribution of oxygen concentration is shown. The comparative example shown by a dotted line in FIG. 6 is a semiconductor substrate obtained by forming the second semiconductor region 102 on the first semiconductor region 101 having an oxygen concentration of 1.3 × 10 ¹⁸ atoms / cm ³ . The distribution of oxygen concentration is shown. In both the embodiment and the comparative example of FIG. 6, the thickness of the second semiconductor region 102, which is a single-crystal silicon layer formed by epitaxial growth, is 9 μm. Therefore, a position at a depth of 9 μm from the surface of the semiconductor substrate corresponds to a boundary between the first semiconductor region 101 and the second semiconductor region 102. In each of the embodiment shown by the solid line and the comparative example shown by the dotted line, in the second semiconductor region 102, a portion (depth 0 to 4.5 μm) from the surface side of the semiconductor substrate to half the depth. The oxygen concentration is 1 × 10 ¹⁶ atoms / cm ³ or less. In the embodiment, the oxygen concentration is 1 × 10 ¹⁶ atoms / cm ³ or less in the remaining portion (depth 4.5 to 9 μm) of the second semiconductor region 102. In the comparative example, in the remaining portion (depth 4.5 to 9 μm) of the second semiconductor region 102, the oxygen concentration becomes 1 × 10 ¹⁶ atoms / cm ³ due to diffusion of oxygen from the first semiconductor region 101. Over.

  Next, in steps S210 and S220 shown in FIG. 2 and S230 shown in FIG. 3, a trench forming step of forming a trench TR in the semiconductor substrate SS is performed. First, in step S210, a step of forming the film 150 on the semiconductor substrate SS is performed. The film 150 may include, for example, a silicon oxide layer 151, a polysilicon layer 152 disposed on the silicon oxide layer 151, and a silicon nitride layer 153 disposed on the polysilicon layer 152. Subsequent to step S210, in step S220, a step of forming an opening OP1 by patterning the film 150 by a photolithography step is performed. Subsequent to step S220, in step S230, a step of etching the semiconductor substrate SS (second semiconductor region 102) through the opening OP1 using the patterned film 150 as an etching mask is performed. Through this step, trench TR is formed in semiconductor substrate SS (second semiconductor region 102).

Next, in step S240 shown in FIG. 3, the semiconductor substrate SS is heat-treated in an atmosphere containing oxygen. By forming the trench TR, oxygen can be supplied from the inner surface of the trench TR to the deep portion of the second semiconductor region 102. This heat treatment involves oxidation of the inner surface of trench TR, and as a result, silicon oxide film 170 can be formed on the inner surface of trench TR. The heat treatment in step S240 can be performed, for example, at a temperature of 800 ° C. or more and 1150 ° C. or less. Further, the heat treatment in step S240 can be performed, for example, so that the oxygen concentration of the second semiconductor region 102 is in the range of 2 × 10 ¹⁶ atoms / cm ^{3 to} 4 × 10 ¹⁷ atoms / cm ³ . The heat treatment in step S240 can be performed, for example, so that the oxygen concentration of the second semiconductor region 102 is in the range of 1 × 10 ¹⁶ atoms / cm ^{3 to} 1 × 10 ¹⁷ atoms / cm ³ .

Here, the solid solubility limit concentration of oxygen in silicon at a temperature of 800 ° C. or more and 1150 ° C. or less is in a range of 2 × 10 ¹⁶ atoms / cm ³ or more and 4 × 10 ¹⁷ atoms / cm ³ or less. Therefore, it is preferable to set the oxygen concentration of the first semiconductor region 101 for obtaining the semiconductor substrate SS to a concentration within the range of the solid solution limit concentration, and to perform the heat treatment in step S240 in an atmosphere containing oxygen. According to such a method, it is easy to obtain the semiconductor substrate SS having a substantially constant oxygen concentration distribution in the depth direction.

By performing the heat treatment in step S240 in the entire depth direction of the second semiconductor region 102, the oxygen concentration of the second semiconductor region 102 is set in the range of 2 × 10 ¹⁶ atoms / cm ^{3 to} 4 × 10 ¹⁷ atoms / cm ^3. Can be inside. Further, in the entire depth direction of the second semiconductor region 102, the oxygen concentration of the second semiconductor region 102 can be in the range of 1 × 10 ¹⁶ atoms / cm ^{3 to} 1 × 10 ¹⁷ atoms / cm ^3. . Further, for example, when the maximum value and the minimum value of the oxygen concentration in the second semiconductor region 102 after step S240 are C21max and C21min, respectively, it is preferable that C21max / C21min is 10 or less. C21max / C21min is more preferably 5 or less.

  FIG. 7 illustrates by solid lines the distribution of oxygen concentration in the depth direction of the semiconductor substrate SS after the heat treatment is performed in the atmosphere containing oxygen in step S240. Here, the result shown in FIG. 7 is a result of setting the temperature of the heat treatment step of step S240 to 1050 ° C.

  In the heat treatment in step S240, the semiconductor substrate SS can be cooled rapidly by heating the semiconductor substrate SS and then forcibly cooling the semiconductor substrate SS. In this cooling, the temperature of the semiconductor substrate SS is, for example, 0.1 ° C./sec or more, preferably 1 ° C./sec or more, more preferably 10 ° C./sec or more. Can be dropped. The rate of temperature drop can be less than 100 ° C./sec. By rapidly cooling in this manner, unnecessary diffusion of oxygen can be suppressed.

  Next, in step S250 shown in FIG. 3, an implantation process for forming impurity region 109 of the second conductivity type is performed. By forming impurity region 109 along the inner surface of trench TR, dark current generated near the inner surface of trench TR can be reduced. Although the heat treatment in step S240 can be performed after the formation of the impurity region 109, unnecessary diffusion of the impurity region 109 can be suppressed by forming the impurity region 109 after the heat treatment in step S240. Then, in step S260 shown in FIG. 4, a filling step of filling trench 160 with insulator 160 (silicon oxide) is performed. At this time, the insulator 160 may be deposited on the film 150. In FIG. 4, the silicon oxide film 170 is shown integrally with the insulator 160. Next, in step S270 shown in FIG. 4, a removing step of removing the insulator 160 on the film 150 by CMP or the like is performed. As a result, the element isolation portion 110 is formed in the trench TR. After that, the film 150 is removed. The heat treatment in an oxygen atmosphere in step S240 may be performed after the insulator 160 is embedded in step S260. However, by performing the heat treatment in an oxygen atmosphere before the burying of the insulator 160, oxygen can be supplied from the inner surface of the trench TR to the deep portion of the second semiconductor region 102.

  Next, in step S280 shown in FIG. 4, the second conductivity type impurity region 103 and the second conductivity type impurity regions 106 and 107 are formed. The resist pattern for forming the second conductivity type impurity region 103 and the second conductivity type impurity regions 106 and 107 is omitted. Then, in order to diffuse or activate the formed second conductivity type impurity regions 103, 106, and 107, a heat treatment step is performed in an atmosphere containing no oxygen. Thereafter, in step 280, the gate insulating films 116 and 117 and the gate electrodes 114 and 115 are formed on the semiconductor substrate SS.

FIG. 8 illustrates the distribution of the oxygen concentration in the depth direction of the semiconductor substrate SS after step S280 by a solid line. In the state of FIG. 8, the above-described heat treatment step in an atmosphere containing no oxygen and the heat treatment step in an atmosphere containing oxygen for forming the gate insulating films 116 and 117 have been performed. When the heat treatment step is performed in an atmosphere containing no oxygen, oxygen in a region near the surface of the semiconductor substrate SS is eliminated by outward diffusion. Therefore, the concentration of oxygen in a region near the surface of the semiconductor substrate SS is lower than immediately after the heat treatment process in step S240 (FIG. 7). From the results shown in FIG. 8, it is understood that the gradient of the oxygen concentration can be suppressed to an allowable value also by the heat treatment (heat treatment for activating the implanted impurities, film formation treatment) that can be performed after step S240. be able to. In the entire depth direction of the second semiconductor region 102, even after step S280, the oxygen concentration of the second semiconductor region 102 is kept within the range of 2 × 10 ¹⁶ atoms / cm ^{3 to} 4 × 10 ¹⁷ atoms / cm ^3. Can be maintained. Further, the oxygen concentration of the second semiconductor region 102 may be maintained in a range of 1 × 10 ¹⁶ atoms / cm ³ or more and 1 × 10 ¹⁷ atoms / cm ³ or less in the entire depth direction of the second semiconductor region 102. it can. Further, for example, even after step S280, when the maximum value and the minimum value of the oxygen concentration in the second semiconductor region 102 are C22max and C22min, respectively, it is preferable that C22max / C22min is 10 or less. C22max / C22min is more preferably 5 or less.

  Next, in step S290, a resist pattern RP2 is formed on the semiconductor substrate SS, and a first conductivity type impurity is implanted into the semiconductor substrate SS (second semiconductor region 102) through the opening OP2 of the resist pattern RP2. 104 is formed. After that, the resist pattern RP2 is removed.

  Next, in step S300, a resist pattern RP3 is formed on the semiconductor substrate SS, and a second conductivity type impurity is implanted into the semiconductor substrate SS through the opening OP3 of the resist pattern RP3. As a result, the impurity region 105 of the second conductivity type is formed on the impurity region 104. Thus, the photoelectric conversion element PD is formed over steps S200 to S300.

  Next, in step S310, an insulating layer 118 is formed to cover the surface of the semiconductor substrate SS and the gate electrodes 114 and 115. Thereafter, a plurality of insulating layers 123, wiring layers 120 and 122, contact plugs 119, via plugs 121, and the like are formed, and further, a color filter layer 124, a microlens 125, and the like are formed. Thereby, the imaging device 100 is completed as illustrated in FIG.

FIG. 9 illustrates the distribution of the oxygen concentration in the semiconductor substrate SS of the imaging device 100 manufactured according to this embodiment by a solid line. FIG. 9 also shows a comparative example. In the comparative example, the oxygen concentration at a depth of about 10 μm from the surface of the semiconductor substrate SS is 7 × 10 ¹⁷ atoms / cm ^3, which is about 10 times the oxygen concentration 7 × 10 ¹⁶ atoms / cm ³ near the surface. And the concentration gradient is extremely large. In contrast, in this embodiment, the oxygen concentration at a depth of about 10μm from the surface of the semiconductor substrate SS is the ^{8 × 10 16 atoms / cm 3} , an oxygen concentration in the vicinity of the surface 5 × ¹⁰ 16 atoms / cm The density is about 1.6 times as large as ³ . That is, in this embodiment, a state where the gradient of the oxygen concentration is low is achieved. As long as the gradient of the concentration of oxygen is low, even if the manufacturing process varies, the occurrence of an afterimage due to the variation can be suppressed. Examples of the manufacturing process variation include an ingot for cutting out the first semiconductor region 101 or a variation in oxygen concentration in the first semiconductor region 101. Other variations in the manufacturing process include, for example, a heat treatment for activating the impurities after the impurities are injected into the semiconductor substrate SS, or a temperature variation in a film forming process.

  In the image pickup device 100, when the maximum value and the minimum value of the oxygen concentration in the depth portion where the afterimage on the semiconductor substrate SS is large are Cmax and Cmin, respectively, it is preferable that Cmax / Cmin is 10 or less. For example, in the imaging device 100, when the maximum value and the minimum value of the oxygen concentration of the semiconductor region in a portion within 20 μm from the surface of the semiconductor substrate SS are Cmax and Cmin, respectively, Cmax / Cmin is 10 or less. Is preferred. Alternatively, in the imaging device 100, when the maximum value and the minimum value of the oxygen concentration of the semiconductor region in a portion within a distance of 30 μm from the surface of the semiconductor substrate SS are Cmax and Cmin, respectively, Cmax / Cmin is 10 or less. Is preferred. Alternatively, in the imaging device 100, when the maximum value and the minimum value of the oxygen concentration of the semiconductor region in a portion within a distance of 40 μm from the surface of the semiconductor substrate SS are Cmax and Cmin, respectively, Cmax / Cmin is 10 or less. Is preferred. Alternatively, in the imaging device 100, when the maximum value and the minimum value of the oxygen concentration of the semiconductor region in the portion within 50 μm from the surface of the semiconductor substrate SS are Cmax and Cmin, respectively, Cmax / Cmin is 10 or less. Is preferred. Cmax / Cmin is preferably 5 or less at each depth.

  In addition, when the maximum value and the minimum value of the oxygen concentration in a portion whose depth from the surface of the semiconductor substrate SS is within 10 μm are Cmax and Cmin, respectively, the value of Cmax / Cmin is equal to the embodiment shown in FIG. Is 1.6, and about 10 in the comparative example shown in FIG. That is, it is estimated that the value of Cmax / Cmin of the comparative example shown in FIG. 9 is considerably larger than the value of Cmax / Cmin of the embodiment shown in FIG.

  Hereinafter, as an application example of the imaging device according to each of the above embodiments, a camera incorporating the imaging device will be illustratively described. The concept of the camera includes not only a device mainly for photographing but also a device (for example, a personal computer or a portable terminal) having a supplementary photographing function. The camera includes the imaging device according to the present invention exemplified as the above embodiment, and a processing unit that processes a signal output from the imaging device. The processing unit may include, for example, an A / D converter and a processor that processes digital data output from the A / D converter.

In the above-described embodiment, a front-side illuminated CMOS image sensor has been illustrated as an image pickup apparatus. In a back-illuminated imaging device, the thickness of a semiconductor region made of single crystal silicon having a photoelectric conversion unit is about 1 to 10 μm. It is sufficient that the maximum value of the oxygen concentration in the semiconductor region is 10 times or less the minimum value in the entire depth direction from the front surface to the back surface of the semiconductor region. It is sufficient that the oxygen concentration in the semiconductor region is in the range of 2 × 10 ¹⁶ atoms / cm ^{3 to} 4 × 10 ¹⁷ atoms / cm ^{3 in} the entire depth direction from the front surface to the back surface of the semiconductor region. In the range from the front surface of the semiconductor region to 20 μm, in a portion farther from the front surface than the back surface of the semiconductor region, there is no semiconductor region that causes an afterimage due to oxygen, and there is a microlens and a color filter. sell.

  Hereinafter, another aspect of the present invention will be described with reference to the accompanying drawings through a second embodiment which is an exemplary embodiment.

  The imaging device has, for example, a plurality of pixels arranged on a substrate made of a semiconductor such as silicon and each including a photoelectric conversion unit, and forms an image based on charges generated by photoelectric conversion in each pixel. Is done.

  An imaging device is required to suppress or reduce afterimages and white spots that may occur in an image. Afterimages are generated, for example, when a certain image is read out, charges generated by photoelectric conversion are trapped by defects or the like in a substrate, and then, when another image is read out, the charges are released. sell. White flaws can occur during the manufacturing of the imaging device, for example, due to metal impurities mixed into the substrate in the step of silicidizing the electrode of the transistor with nickel or cobalt.

  Japanese Patent Application Laid-Open No. 2007-251074 discloses that an afterimage in an image is suppressed by lowering the oxygen concentration in a substrate. On the other hand, Japanese Patent Application Laid-Open No. 2003-92301 discloses that white defects in an image are suppressed by increasing the oxygen concentration in a substrate. In other words, according to JP-A-2007-251074 and JP-A-2003-92301, in order to achieve both suppression of afterimages and suppression of white spots, mutually contradictory configurations are required for a substrate. Therefore, it can be said that it is difficult to achieve both of them simply by adjusting the oxygen concentration in the substrate.

  An object of the present embodiment is to provide a novel technique for suppressing both afterimages and white defects in an image.

One aspect of the present embodiment relates to an imaging device, and the imaging device is disposed around a pixel portion in which a plurality of pixels are arranged on a substrate made of silicon and around the pixel portion on the substrate. A peripheral circuit section including a circuit for processing a signal from each pixel.
Here, the peripheral circuit section has a transistor having a silicide region containing at least one of nickel and cobalt.
Also, each pixel is formed on the substrate,
A first region of a first conductivity type including a portion for accumulating charges generated by photoelectric conversion,
A second region of the first conductivity type, which is disposed at a position deeper than the first region of the substrate and away from the first region;
A third region of a second conductivity type disposed between the first region and the second region in a depth direction from a surface of the substrate.
Further, the third region is
A first portion disposed at a position apart from the second region in the depth direction, the first portion including a position at which a net impurity concentration of the second conductivity type exhibits a first maximum value;
A second portion disposed between the first portion and the second region in the depth direction, the second portion including a position where a net impurity concentration of the second conductivity type indicates a second maximum value lower than the first maximum value; And two parts.
The second portion has an oxygen concentration of 1 × 10 ¹⁷ [atoms / cm ³ ] or less.

According to the present embodiment, it is possible to suppress both afterimages and white spots in an image.
(1-1. Structure of imaging device)
FIG. 10 is a schematic diagram for explaining an example of the structure of the imaging device 100 according to the second embodiment. The imaging device 100 includes regions R1 to R4 formed on a substrate SUB made of silicon. The region R1 (first region) is, for example, N-type (first conductivity type), and is hereinafter referred to as “N-type region R1” in this specification. The region R2 (second region) is, for example, N-type, and is hereinafter referred to as “N-type region R2”. The region R3 (third region) is, for example, P-type (second conductivity type), and is hereinafter referred to as “P-type region R3”. The region R4 is, for example, N-type, and is hereinafter referred to as “N-type region R4”.

  Each of the regions R1 to R4 may be formed using a known semiconductor manufacturing technique such as epitaxial growth and impurity implantation. Specifically, first, a silicon substrate corresponding to the N-type region R4 is prepared, and an N-type semiconductor member is formed thereon by, for example, epitaxial growth. Next, an N-type region R1 is formed by implanting impurities into the formed semiconductor member, and a P-type region R3 is formed at a position deeper than the N-type region R1 before or after the formation of the N-type region R1. The N-type region R2 is a region between the P-type region R3 and the N-type region R4, and is therefore arranged at a position deeper than the N-type region R1 and apart from the N-type region R1.

The N-type region R1 is a charge storage portion (not shown) in which charges (electrons in this example) generated by photoelectric conversion are stored, and has a higher impurity concentration (for example, 1 × 10 ¹⁷ ) than other portions. [Cm ⁻³ ] or more. The N-type region R1 may be formed at a position away from the surface of the substrate SUB (so as to be embedded) by forming the P-type region R0 near the surface of the substrate SUB.

  The P-type region R3 is a region formed between the N-type region R1 and the N-type region R2 so as to be in contact with the bottom surface and the side surface of the N-type region R1. That is, a PN junction is formed between the N-type region R1 and the P-type region R3, and a photodiode is formed. In other words, the P-type region R3 is formed so as to be adjacent to the N-type region R1 and extend from a position shallower than the N-type region R1 to a position deeper than the N-type region R1 and shallower than the N-type region R2. .

  In each of the above regions, for example, boron (B) is used as an impurity for forming a P-type (P-type impurity), and an impurity (N-type impurity) for forming an N-type is For example, phosphorus (P), arsenic (As), or the like may be used. In the figure, the maximum value Q_R1 of the N-type impurity concentration in the N-type region R1 and the maximum values Q1 to Q5 of the P-type impurity concentration in the P-type region R3 are shown. It will be described later.

  The imaging device 100 further includes a floating diffusion FD and a gate electrode GTX. The floating diffusion FD is an N-type region formed on the surface of the substrate SUB and in the vicinity thereof and at a position away from the N-type region R1. The gate electrode GTX is a gate electrode of a MOS transistor (transfer transistor) that connects the N-type region R1 and the floating diffusion FD, and is formed on the substrate SUB via the insulating film F. The charge generated by the photoelectric conversion and accumulated in the N-type region R1 is transferred to the floating diffusion FD via a channel formed by supplying an activation voltage to the gate electrode GTX. The transferred charge or a signal corresponding to the transferred charge is read as a pixel signal by a read circuit (not shown).

  The imaging device 100 further includes an element isolation portion STI having an STI (Shallow Trench Isolation) structure formed near the surface of the substrate SUB, and a P-type impurity region CS for channel stop formed therearound. . The element isolation unit STI electrically isolates elements or units formed on the substrate SUB from each other.

Although not described here, conductive members (wiring patterns) arranged in one or more wiring layers, plugs for connecting them, and optical elements (eg, color filters, microlenses, etc.) are provided on the substrate SUB. Included structures can be arranged.

  FIG. 11 shows the actual concentration distribution of impurities (boron and arsenic) at cut lines A1-A2 (in the depth direction from the surface of the substrate SUB) in FIG. Here, only the impurity concentration of a portion necessary for the description of the present example is shown, and the impurity concentration distribution of other portions (for example, the region R0) is not shown.

Here, the “actual” impurity concentration in a certain region is an impurity concentration actually existing in the region regardless of the conductivity type of the region, and is also referred to as a gross impurity concentration. On the other hand, the “net” impurity concentration in a certain region is an effective impurity concentration that determines the conductivity type of the region, and is also called a net impurity concentration. That is, the net impurity concentration corresponds to the actual impurity concentration of one conductivity type minus the actual impurity concentration of the other conductivity type different from the other conductivity type. For example, when the actual boron (P-type impurity) concentration in a certain region is 4 × 10 ¹⁶ [cm ⁻³ ] and the actual arsenic (N-type impurity) concentration is 1 × 10 ¹⁶ [cm ⁻³ ], The conductivity type is P-type, and the net P-type impurity concentration in the region is 3 × 10 ¹⁶ [cm ⁻³ ].

  FIG. 11 shows the actual impurity concentration. However, the P-type impurity concentration in the N-type region R1 is sufficiently lower than the N-type impurity concentration in the N-type region R1. The N-type impurity concentration is sufficiently lower than the P-type impurity concentration in P-type region R2. Therefore, the net impurity concentration distribution corresponding to FIG. 11 is substantially the same as the impurity distribution of FIG.

In FIG. 11, the N-type impurity (arsenic) concentration in the N-type region R1 is shown by a dashed-dotted line, and the P-type impurity (boron) concentration in the P-type region R3 is shown by a solid line (in the substrate SUB). Is shown by a broken line, the details of which will be described later.) The position where the N-type impurity concentration shows the maximum value C_R1 in the N-type region R1 is defined as a peak position Q_R1. The charges generated by the above-mentioned photoelectric conversion mainly include the peak position Q_R1 in the N-type region R1 and the vicinity thereof (for example, a portion of 1 × 10 ¹⁶ [cm ⁻³ ] or more, particularly 1 × 10 ¹⁷ [cm ⁻³ ]). Above). The peak position Q_R1 has a depth (depth from the surface of the substrate SUB) of about 0.3 [μm] and a net N-type impurity concentration of about 1.23 × 10 ¹⁷ [cm ⁻³ ]. For the portion other than the charge accumulation portion in the N-type region R1, the net N-type impurity concentration may be lower than 1 × 10 ¹⁷ [cm ⁻³ ], for example, 1 × 10 ¹⁴ to 1 × 10 ¹⁶ [cm ⁻³ ]. Degree.

  The P-type region R3 has, for example, a plurality of portions P0 to P5 in a depth direction from the surface of the substrate SUB. In this example, the portion P0 is a portion surrounding the region R1. The portions P1 to P5 include positions Q1 to Q5 at which the P-type impurity concentrations indicate the maximum values C1 to C5, respectively. In the figure, the peak positions Q1, Q2, Q3, Q4, and Q5 where the P-type impurity concentrations show the maximum values C1, C2, C3, C4, and C5 are shown for the portions P1, P2, P3, P4, and P5, respectively (P1). P5 and Q1 to Q5 are also illustrated in FIG. The boundary between the portions P0 to P5 is a position where the impurity concentration in the distribution of the net P-type impurity concentration shows the minimum value. This structure can be obtained, for example, by performing a plurality of times of impurity implantations with different implantation energies. According to this method, the P-type region R3 is adjusted while adjusting the impurity concentration distribution to a desired concentration. It can be formed to a desired depth.

  In the P-type region R3, the net P-type impurity concentration of the deepest portion P5 of the portions P1 to P5 may be higher than the net P-type impurity concentration of the portions P1 to P4 other than the portion P5. For example, the local maximum value C5 of the net P-type impurity concentration for the portion P5 is preferably at least three times higher than the local maximum values C1 to C4 of the net P-type impurity concentrations for the portions P1 to P4, and more than five times higher. good. According to this structure, it is possible to prevent the leakage of the charge generated in the P-type region R3 by the photoelectric conversion (specifically, the leakage of the charge in a direction deeper than the P-type region R3), and to efficiently reduce the charge. To the N-type region R1.

For example, the peak position Q1 in the portion P1 has a depth of about 0.7 [μm], and the maximum value C1 of the net P-type impurity concentration is about 2.0 × 10 ¹⁷ [cm ⁻³ ]. The peak position Q2 in the portion P2 has a depth of about 1.2 [μm], and the maximum value C2 of the net P-type impurity concentration is about 1.7 × 10 ¹⁷ [cm ⁻³ ]. The peak position Q3 in the portion P3 has a depth of about 1.6 [μm], and the maximum value C3 of the net P-type impurity concentration is about 1.0 × 10 ¹⁷ [cm ⁻³ ]. The peak position Q4 in the portion P4 has a depth of about 2.0 [μm], and the maximum value C4 of the net P-type impurity concentration is about 0.9 × 10 ¹⁷ [cm ⁻³ ]. The peak position Q5 in the portion P5 has a depth of about 3.2 [μm], and the maximum value C5 of the net P-type impurity concentration is about 4.0 × 10 ¹⁷ [cm ⁻³ ]. The maximum values C1 to C4 of the net P-type impurity concentration in the portions P1 to P4 become smaller as they are arranged at deeper positions (C1>C2>C3> C4). Note that these depths may be determined based on the penetration depth of incident light (for example, red light) from the surface of the substrate SUB.

(1-2. White flaws that can occur in images)
In the manufacturing process of the imaging device 100, a metal impurity (nickel, cobalt, or the like) may be mixed into the substrate SUB by, for example, a silicide process, and the metal impurity may cause white defects in an image. . The inventor of the present invention paying attention to this fact has conducted experiments using a plurality of substrates SUB having different configurations from each other, and has studied diligently. Among them, the inventor found that the degree of the white flaw was reduced by the depletion between the N-type region R1 and the P-type region R3 by an experiment using a plurality of substrates SUB having different P-type impurity concentration distributions in the P-type region R3. It has been found that it depends on the width (volume) of the layer. Specifically, the inventor has found that when the number of metal impurities in the depletion layer between the N-type region R1 and the P-type region R3 increases, white flaws in the image tend to increase. This is considered to be due to the fact that the metal impurities in the depletion layer have some effect on the accumulated charge in the N-type region R1 by or through the depletion layer electric field.

  Therefore, in the present structure, white flaws are suppressed by reducing the width of the depletion layer between the N-type region R1 and the P-type region R3. Specifically, the local maximum values C1 and C2 of the P-type impurity concentration of the portions P1 and P2 of the P-type region R3 on the N-type region R1 side are changed to the portions P3 and P4 of the P-type region R3 on the N-type region R2 side. Were higher than the maximum values C3 and C4 of the net P-type impurity concentrations of the samples. Thereby, the depletion layer can be prevented from reaching the deep position of the P-type region R3. Further, it is preferable that the net P-type impurity concentration in the portion of the P-type region R3 on the N-type region R1 side is higher than the net N-type impurity concentration in the charge storage portion of the N-type region R1. Specifically, as illustrated in FIG. 11, the net P-type impurity concentration at the peak position Q1 in the portion P1 of the P-type region R3 is calculated from the net N-type impurity concentration at the peak position Q_R1 in the N-type region R1. Should be higher. According to this structure, for example, while the imaging device 100 is in the charge accumulation mode (operation mode for accumulating charges in the N-type region R1), the depletion layer between the N-type region R1 and the P-type region R3 is larger than the portion P1. Deep portions P2 to P5.

  In summary, the P-type region R3 may be configured so that the depletion layer width between the N-type region R1 and the P-type region R3 is reduced. In this example, the P-type region R3 is configured such that the net P-type impurity concentration of a part thereof is higher than the net P-type impurity concentration of another part at a position deeper than the part. , So that the depletion layer does not reach the other part. Further, the net P-type impurity concentration of the part of the P-type region R3 may be higher than the net N-type impurity concentration of the peak position Q_R1 of the N-type region R1. Preferably, the net P-type impurity concentration of the portion P1 closest to the N-type region R1 among the portions P1 to P5 of the P-type region R3 is higher than the net N-type impurity concentration of the peak position Q_R1 of the N-type region R1. You only need to raise it.

  Further, in this example, the maximum values C2 to C4 of the net P-type impurity concentration of the portions P2 to P4 between the portion P1 and the portion P5 are lower than the maximum value C1 of the net P-type impurity concentration of the portion P1. Is preferred. Furthermore, it is preferable that the maximum values C2 to C4 of the net P-type impurity concentrations of the portions P2 to P4 are lower than the maximum values C5 of the net P-type impurity concentrations of the portion P5. Further, it is preferable that the net P-type impurity concentration of any of the portions P2 to P4 is lower than the net N-type impurity concentration of the N-type region R1. In this example, the local maximum values C3 and C4 of the net P-type impurity concentration of the portions P3 and P4 are smaller than the local maximum value C_R1 of the net N-type impurity concentration at the peak position Q_R1 of the N-type region R1.

(1-3. Afterimages that can occur in images)
When the oxygen concentration in the substrate SUB increases, a complex of oxygen (thermal donor) is easily formed in the substrate SUB. The thermal donor may trap charges generated by photoelectric conversion depending on its energy level, and this may cause an afterimage in an image. For example, charge generated by photoelectric conversion when reading the first image can be trapped by the energy level of the thermal donor. Thereafter, when reading out a second image different from the first image, if the trapped charge is released, an afterimage due to the charge may occur in the second image.

  According to Japanese Patent Application Laid-Open No. 2007-251074, an afterimage in an image is suppressed by lowering the oxygen concentration in the substrate. On the other hand, according to JP-A-2003-92301, white flaws in an image are suppressed by increasing the oxygen concentration in the substrate.

Here, as described with reference to FIG. 11, white flaws can be suppressed by configuring the P-type region R3 so that the depletion layer width between the N-type region R1 and the P-type region R3 is reduced. . In the present structure, the inventor has determined what range of oxygen concentration in the substrate SUB should be set in order to sufficiently suppress the afterimage, and the inventor has determined that a plurality of substrates SUB (0.7 × 10 ¹⁷ to The experiment was carried out using about 14 × 10 ¹⁷ [atoms / cm ³ ], and intensive studies were conducted.

Referring again to FIG. 11, FIG. 11 further shows the oxygen concentration distribution in the substrate SUB at the cut line A1-A2 in FIG. As shown in FIG. 11, in the present structure, the oxygen concentration in the substrate SUB was set to 1 × 10 ¹⁷ [atoms / cm ³ ] or less to suppress the afterimage.

Here, when the charge generated by the photoelectric conversion reaches the depletion layer between the N-type region R1 and the P-type region R3, it drifts toward the N-type region R1 due to the large electric field of the depletion layer. In the portion of the P-type region R3 that is not particularly depleted, the electric field is smaller than the electric field of the depletion layer, so that electric charges are easily trapped in the energy level of the thermal donor. Will cause this.) Therefore, it is preferable not to form a thermal donor in the non-depleted portion, and it is preferable that at least the oxygen concentration in the non-depleted portion be 1 × 10 ¹⁷ [atoms / cm ³ ] or less. That is, in the P-type region R3, the position where the net P-type impurity concentration is higher than the net N-type impurity concentration at the peak position Q_R1 of the N-type region R1 or a portion including the same (the portion P1 in this example) is deeper than that. The oxygen concentration up to the portion is preferably set to 1 × 10 ¹⁷ [atoms / cm ³ ] or less. Preferably, in a region including the entire P-type region R3 (a region from a position shallower than the N-type region R1 to a position deeper than the P-type region R3), the oxygen concentration in the substrate SUB is set to 1 × 10 ¹⁷ [ atoms / cm ³ ] or less. In the N-type region R2 at a position deeper than the P-type region R3, the oxygen concentration may be higher than the oxygen concentration in the P-type region R3, and may be, for example, 1 × 10 ¹⁷ [atoms / cm ³ ] or more. .

For example, in a region from the surface of the substrate SUB to a depth of 15 [μm] from the surface (this region has a depth sufficient to include the P-type region R3), the oxygen concentration in the substrate SUB is reduced. The density is preferably 1 × 10 ¹⁷ [atoms / cm ³ ] or less. In another example, the oxygen concentration in the substrate SUB may be 1 × 10 ¹⁷ [atoms / cm ³ ] or less in a region from the surface of the substrate SUB to a depth of 10 μm from the surface. Then, in a region from a depth of 10 [μm] from the surface to a depth of 20 [μm] from the surface, the oxygen concentration in the substrate SUB may be set to 2 × 10 ¹⁷ [atoms / cm ³ ] or less. . In still another example, the oxygen concentration in the substrate SUB is 1 × 10 ¹⁷ [atoms] in a part of a region from a depth of 10 [μm] from the surface of the substrate to a depth of 20 [μm] from the surface. / Cm ³ ].

Also, it should be noted that the oxygen concentration in the portions P1 to P5 of the third region R3 may be equal to or higher than 1 × 10 ¹⁶ [atoms / cm ³ ], as shown in FIG. The presence of oxygen of 1 × 10 ¹⁶ [atoms / cm ³ ] or more is effective in improving substrate strength, gettering of impurity metal, and the like. In this example, the oxygen concentration in the region between the peak positions C4 and C5 was higher than the net P-type impurity concentration in the region.

FIG. 12A is a plot diagram showing actual measurement results of the oxygen concentration dependency in the substrate SUB with respect to the afterimage in the image. The horizontal axis in the figure indicates the oxygen concentration [atoms / cm ³ ] in the substrate SUB, and the vertical axis indicates the degree of afterimage (afterimage amount) [LSB] in the image. According to FIG. 12A, the residual image amount decreases as the oxygen concentration in the substrate SUB decreases. When the oxygen concentration in the substrate SUB is 1 × 10 ¹⁷ [atoms / cm ³ ] or less, the afterimage amount is 8 [LSB] or less, and the afterimage in the image can be sufficiently and effectively reduced.

FIG. 12B shows that the residual image amount and the white flaw are respectively different when the oxygen concentration in the substrate SUB is high and low, and when the net P-type impurity concentration in the P-type region R3 is high and low. It is a summary of the determination result of whether or not the value is within the allowable range. “High” in the oxygen concentration in the substrate SUB in FIG. 12B indicates that the oxygen concentration is higher than 1 × 10 ¹⁷ [atoms / cm ³ ], and “Low” indicates that the oxygen concentration is 1 × 10 ¹⁷ [atoms / cm ³ ]. 10 ¹⁷ [atoms / cm ³ ] or less. “Low” in the net P-type impurity concentration of the P-type region R3 indicates that the P-type impurity concentration of at least a part of the P-type region R3 is lower than the net N-type impurity concentration of the N-type region R1. Is indicated as “high”.

  In each of the above cases, the result within the allowable range for the afterimage / white defect is indicated by “○”, and the result other than that is indicated by “×”. For example, in the drawing, the case where the afterimage is within the allowable range and the white flaw is not within the allowable range is indicated by “○ / ×”. According to FIG. 12B, when the oxygen concentration in the substrate SUB is “low” and the net P-type impurity concentration in the N-type region R2 is “high”, both the afterimage and the white defect are within the allowable range. You can see that.

(1-4. Summary)
According to this structure, the P-type region R3 is configured such that the net P-type impurity concentration of a part thereof is higher than the net P-type impurity concentration of another part at a position deeper than the part. This prevents the depletion layer from reaching the other part. Thereby, the width of the depletion layer between the N-type region R1 and the P-type region R3 can be reduced, and white flaws in an image can be suppressed. By setting the oxygen concentration in the substrate SUB to 1 × 10 ¹⁷ [atoms / cm ³ ] or less, a thermal donor was prevented from being formed in a deep portion of the P-type region R3. Thereby, the afterimage in the image can be suppressed.

  As described above, according to the present embodiment, it is advantageous to suppress both afterimages and white defects in an image.

  In particular, when the imaging device 100 includes a digital circuit, the manufacturing method of the imaging device 100 may include, for example, a step of silicidation of each electrode of a transistor in the digital circuit, so that metal impurities are mixed in the substrate SUB. Could be done. For example, the imaging device 100 includes a pixel unit in which a plurality of pixels are arranged, and a peripheral circuit unit that is disposed around the pixel unit and processes a signal from each pixel. As the transistor, a transistor having a silicide region in a source and a drain can be used. The peripheral circuit section includes, for example, an analog-to-digital conversion circuit, and the transistor having the silicide region can be used for a part of the analog-to-digital conversion circuit. Nickel, cobalt, or the like is typically used as the metal in the silicide region, and a part of the metal is used as an impurity in the pixel portion as a result of a process of forming a transistor into a silicide (a process of forming a silicide region) and a subsequent heat treatment process. Can spread to As described above, this may cause white defects in the image. Therefore, according to the present embodiment, it is advantageous to suppress both the afterimage and the white flaw in the image, particularly in the imaging device 100 including the silicided region.

  FIGS. 13A to 13E are schematic diagrams for explaining the state of each step in the method of manufacturing the imaging device 100. FIGS.

In the step of FIG. 13A, the substrate SUB having an oxygen concentration of 2 × 10 ¹⁷ [atoms / cm ³ ] or less, and a region RA (pixel region) where a pixel portion is to be formed and a peripheral circuit portion are formed A substrate SUB having an area RB (peripheral area) to be processed is prepared. The peripheral region RB includes, for example, a region RB1 where an NMOS transistor is to be formed and a region RB2 where a PMOS transistor is to be formed.

For example, on a silicon wafer oxygen concentration is ^{1 × 10 16 [atoms / cm} 3] or more and ^{3 × 10 17 [atoms / cm} 3] or less, the oxygen concentration by epitaxial growth ^{1 × 10 16 [atoms / cm} 3 The following single crystal silicon layer is formed. It is desirable to use a silicon wafer whose oxygen concentration does not exceed 3 × 10 ¹⁷ [atoms / cm ³ ]. When a silicon wafer having a high oxygen concentration (for example, 1 × 10 ¹⁸ [atoms / cm ³ ] or more) is used, even if a single crystal silicon layer having a low oxygen concentration is formed thereon, another process (such as a heat treatment process) is performed. This is because oxygen moves (diffuses) from the wafer to the single crystal silicon layer. Therefore, a silicon wafer having an oxygen concentration of at least 5 × 10 ¹⁷ [atoms / cm ³ ] or less is preferably used.

  Note that the single crystal silicon layer formed by epitaxial growth is preferably formed to have a thickness in the range of 5 to 25 [μm]. Thus, even when a silicon wafer having a relatively high oxygen concentration is used, oxygen in the silicon wafer can diffuse to the vicinity of the surface of the single crystal silicon layer, thereby preventing the oxygen concentration of the single crystal silicon layer from increasing. it can.

  In the prepared substrate SUB, for example, an element isolation portion STI having an STI structure can be formed between the regions RA, RB1, and RB2. The element isolation section STI can be formed of, for example, an insulating member such as silicon oxide. The depth of the element isolation part STI is about 0.1 to 0.5 [μm].

  Thereafter, a P-type region R3 is formed by injecting a P-type impurity into the pixel region RA. The P-type region R3 includes the above-described portions P0 to P5 (the portions P0 to P5 are not illustrated here). The portions P0 to P5 can be formed, for example, by performing impurity implantation a plurality of times with mutually different implantation energies.

  For example, P-type or N-type portions PA, PB, and PC may be formed near the surface of the substrate SUB in order to adjust the threshold voltage of a transistor to be formed later. In addition, a portion of the substrate SUB that is in contact with the element isolation portion STI is provided with an element isolation portion to reduce a dark current component that can be mixed into a pixel signal due to a crystal defect at a boundary between the element isolation portion STI and the substrate SUB. A P-type region CS may be formed so as to surround portion STI.

  In the step of FIG. 13B, for example, a P-type well PWL is formed in the region RB1 by implanting impurities using a predetermined resist pattern (not shown) formed on the substrate SUB. Thereafter, an N-type well NWL is formed in the region RB2 by the same procedure. Any of these wells may be formed first.

  In the step of FIG. 13C, an insulating film F (gate insulating film of a transistor) is formed on the surface of the substrate SUB. The insulating film F is made of, for example, silicon oxide, and its thickness may be about 3 to 20 [nm]. Thereafter, a gate electrode GTX of the transfer transistor and a gate electrode G of another MOS transistor are formed on the insulating film F. An N-type region R1 is formed on the surface of the substrate SUB and in the vicinity thereof by implanting N-type impurities. The N-type region R1 is preferably formed so that the above-mentioned peak position Q_R1 is deeper than half of the depth of the element isolation portion STI, and is preferably formed deeper than the bottom surface of the element isolation portion STI. May be done.

  After that, the floating diffusion FD can be formed using the gate electrode GTX as a mask. In each of the regions RB1 and RB2, a source / drain region RDS of a corresponding MOS transistor can be formed.

  Note that the order of forming the elements constituting the pixel may be changed as needed. For example, any of the gate electrode GTX and the N-type region R1 may be formed first.

  In the step of FIG. 13D, a region R0 for forming the N-type region R1 into a buried type is formed. The region R0 may be formed at a position away from the end of the gate electrode GTX so that the charge transfer efficiency of the transfer transistor is maintained. The region R0 may be formed, for example, by implanting a P-type impurity into the substrate SUB (specifically, a part of the N-type region R1) using the gate electrode GTX and the resist pattern PR as a mask. The impurity implantation angle (the angle between the normal line of the upper surface of the substrate SUB and the impurity implantation direction) may be set, for example, within a range of 7 to 45 degrees. As a result, the region R0 is formed at a position away from the end of the gate electrode GTX. For example, when the height of the gate electrode GTX is 250 [nm], the above-described implantation may be performed at an implantation energy of 12 [keV] and an implantation angle within a range of 10 to 20 degrees.

  In the step of FIG. 13E, an insulating film covering the regions RA, RB1, and RB2 is formed, and a part of the insulating film is etched to form a sidewall spacer SWS on the side surface of the gate electrode G. At this time, another part of the insulating film may be left in the region RA as the protective film PDP. Then, the NMOS transistor in the region RB1 has an LDD structure by implanting an N-type impurity, and similarly, the PMOS transistor in the region RB2 has an LDD structure by implanting a P-type impurity. Thereafter, a silicide process is performed on these MOS transistors using a salicide process. At this time, the protective film PDP in the region RA can be used as silicide protection. A portion Psili in the figure indicates a silicide region which is silicided among the electrodes of each MOS transistor.

  Thereafter, a structure including a wiring pattern, an optical element, and the like may be formed on the structure obtained in the step of FIG. 13E by using a known semiconductor manufacturing technique. Can be manufactured.

  As described with reference to FIG. 13A, the imaging device 100 may include the element isolation units P1 and P2 having the STI structure. The element isolation portions P1 and P2 can be formed by forming a trench from the surface of the substrate SUB to a predetermined depth by, for example, etching, and filling the trench with an insulating member. According to this step, in addition to the possibility that metal impurities may be mixed into the substrate SUB, the stress applied to the substrate SUB due to the heat treatment during the process, the stress applied to the substrate SUB by the formed element isolation portions P1 and P2, etc. White scratches may occur in the image. Therefore, applying the present invention to the imaging device 100 including the element isolation unit having the STI structure is also advantageous in suppressing both an afterimage and a white flaw in an image.

  FIGS. 14A to 14D are diagrams illustrating a process of forming an element isolation portion having an STI structure (referred to as an element isolation portion P) in the method of manufacturing the imaging device 100. In the step of FIG. 14A, a structure is prepared in which a silicon oxide film F1, a polysilicon film F2, and a silicon nitride film F3 are formed in this order on a substrate SUB made of, for example, silicon.

  In the step of FIG. 14B, the trench T is formed by, for example, etching using a predetermined resist pattern (not shown). The trench T may be formed from the upper surface of the silicon nitride film F3 to a predetermined depth from the surface of the substrate SUB.

  In the step of FIG. 14C, for example, an oxidation process is performed to form an oxide film F4 (silicon oxide film) on the exposed surface of the substrate SUB exposed by the trench T. The oxidation treatment may be performed, for example, by dry oxidation at a temperature of about 1100 ° C. The thickness of the oxide film F4 may be about 20 to 50 [nm].

  In this step, the exposed surface of the substrate SUB is oxidized, and the exposed surface (side surface) of the polysilicon film F2 exposed by the trench T is also oxidized. As a result, a silicon oxide film is also formed on the exposed surface of the polysilicon film F2, and the silicon oxide film has a function of maintaining the shape of the trench T.

  In the step of FIG. 14D, the trench T is filled with an insulating member IM such as silicon oxide. This step may be performed by a deposition method such as CVD (chemical vapor deposition). After that, the upper surface of the insulating member IM may be flattened by, for example, a CMP process, and thus the element isolation portion P is formed.

  Although some preferred embodiments have been described above, the present invention is not limited to these examples, and some of them may be modified without departing from the spirit of the present invention. For example, the conductivity type of each semiconductor region may be reversed, and impurities forming the same may be of the same conductivity type and different elements.

  Further, individual terms described in this specification are merely used for describing the present invention, and it is needless to say that the present invention is not limited to the strict meaning of the terms. It may also include its equivalents. For example, the “imaging device” may include a solid-state imaging device such as a CCD image sensor or a CMOS image sensor, and “pixel” may be referred to as a sensor, and accordingly, “pixel signal” may be a sensor signal. May be referred to.

  FIG. 15 is a diagram for describing a configuration example of a camera to which the imaging device 100 shown in the above example is applied. The camera includes, for example, a processing unit 200, a CPU 300 (or a processor), an operation unit 400, and an optical system 500 in addition to the imaging device 100. Further, the camera may further include a display unit 600 for displaying a still image or a moving image to a user, and a memory 700 for storing the data. The imaging device 100 generates image data composed of digital signals based on the light that has passed through the optical system 500. The image data is subjected to predetermined image processing by the processing unit 200 and output to the display unit 600 and the memory 700. The setting information of each unit can be changed or the control method of each unit can be changed by the CPU 300 in accordance with the shooting conditions input by the user via the operation unit 400. Note that the concept of the camera includes not only a device mainly for photographing but also a device (for example, a personal computer or a portable terminal) having a supplementary photographing function.

  Hereinafter, still another aspect of the present invention will be described through a third embodiment which is an exemplary embodiment thereof.

  This embodiment is an embodiment having the features of the first embodiment and the features of the second embodiment. That is, in the present embodiment, the photoelectric conversion element PD in the first embodiment has the same structure as the photodiode in which the PN junction is formed between the N-type region R1 and the P-type region R3 in the second embodiment. It is a form. In the present embodiment, the first semiconductor region 101 in the first embodiment corresponds to the N-type region R4 in the second embodiment. The impurity region 102a in the first embodiment corresponds to the N-type region R2 in the second embodiment. The impurity region 103 having the second conductivity type in the first embodiment corresponds to the P-type region R3 in the second embodiment. As described in the second embodiment, since the P-type region R3 has a plurality of portions P0 to P5, the impurity region 103 has a plurality of portions corresponding to the plurality of portions P0 to P5. The impurity region 104 of the first conductivity type in the first embodiment corresponds to the N-type region R1 in the second embodiment. The first conductivity type impurity region 102b in the first embodiment corresponds to the portion PA or PB in the second embodiment. In the present embodiment, the semiconductor substrate SS in the first embodiment and the substrate SUB in the second embodiment are collectively described as a “substrate S”.

Although FIG. 11 only shows the oxygen concentration up to a depth of 6 μm of the substrate SUB, in the present embodiment, the depth is less than 6 μm and less than 20 μm from the surface of the substrate S where the N-type region R4 exists. Even in shallow portions, the oxygen concentration distribution is the same as in FIG. That is, when the maximum value and the minimum value of the oxygen concentration of the semiconductor region in the portion within 20 μm from the surface of the substrate S are Cmax and Cmin, respectively, Cmax / Cmin is 10 or less, preferably 5 or less. is there. In addition, the oxygen concentration of the semiconductor region in a portion whose distance from the surface is within 20 μm is in the range of 2 × 10 ¹⁶ atoms / cm ^{3 to} 4 × 10 ¹⁷ atoms / cm ³ . Other points are the same as in the first embodiment and the second embodiment.

In the present embodiment, as described above, the presence of oxygen of 1 × 10 ¹⁶ [atoms / cm ³ ] or more in the shallow portion of the substrate S (semiconductor substrate SS or substrate SUB) is effective for gettering of impurity metal and the like. . However, in this embodiment, the oxygen concentration in the deep portion (semiconductor region 101, region R4) of the semiconductor substrate SS or the substrate SUB is as low as 5 × 10 ¹⁵ [atoms / cm ³ ] or less. Therefore, the gettering action of the impurity metal in the deep portion of the substrate S cannot be expected to be large. It is known that the metal in the silicide region provided in the transistor in the peripheral circuit portion diffuses to the pixel portion via the deep portion of the substrate S. Therefore, as in the present embodiment, the P-type region of the photodiode is formed such that the net P-type impurity concentration of a part thereof is higher than that of another part at a position deeper than the part. By configuring to be higher, the influence of the impurity metal existing in the deep part is reduced. Therefore, both the afterimage and the white flaw can be suppressed to an appropriate level.

  Hereinafter, still another aspect of the present invention will be described through a fourth embodiment which is an exemplary embodiment thereof.

  This embodiment is characterized by the element isolation section described in the first to third embodiments. The element isolation section 110 of the first embodiment corresponds to the element isolation section STI of the pixel area RA of the second embodiment. The insulator 160 and the silicon oxide film 170 of the element isolation section 110 in the first embodiment correspond to the insulating member IM and the oxide film F4 of the element isolation section STI in the second embodiment, respectively. The impurity region 109 in the first embodiment corresponds to the impurity region CS in the second embodiment. Hereinafter, the element isolation section 110 of the first embodiment and the element isolation section STI of the pixel area RA of the second embodiment will be collectively described as “element isolation section ISO”. Further, the insulator 160 and the silicon oxide film 170 of the element isolation part 110, and the insulating member IM and the oxide film F4 of the element isolation part STI are collectively described as "insulator INS". The element isolation section ISO has an STI structure, and a typical insulator INS is made of silicon oxide. The peripheral region RB of the second embodiment will be described as an element isolation portion STI and an insulating member IM according to the second embodiment. Also in the present embodiment, the semiconductor substrate SS in the first embodiment and the substrate SUB in the second embodiment are collectively described as “substrate S”.

In the present embodiment, the hydrogen concentration CA [atoms / cm ³ ] of the insulator INS of the element isolation portion ISO is set to 5 × 10 ¹⁸ [atoms / cm ³ ] or more. The hydrogen concentration CA of the insulator INS is preferably 1 × 10 ¹⁹ [atoms / cm ³ ] or more, more preferably 3 × 10 ¹⁹ [atoms / cm ³ ] or more. As described above, the presence of oxygen of 1 × 10 ¹⁶ [atoms / cm ³ ] or more in the substrate S is effective for gettering of an impurity metal and the like. However, in this case, the gettering action of the impurity metal is lower than that in a case where oxygen of, for example, 1 × 10 ¹⁸ atoms / cm ³ or more exists in the substrate S. By setting the hydrogen concentration CA to 5 × 10 ¹⁸ [atoms / cm ³ ] or more, and further to 1 × 10 ¹⁹ [atoms / cm ³ ] or more, noise such as white flaws caused by impurity metals can be reduced. This is presumed to be because the impurity metal is inactivated by hydrogen. Further, trench etching of the substrate S is necessary for forming the element isolation portion ISO having the STI structure. Deterioration of image quality due to damage caused to the substrate S by the trench etching can be reduced by terminating dangling bonds on the surface of the substrate S by hydrogen. The hydrogen concentration in the element isolation portion having the STI structure of the imaging device compared in this study is 2 × 10 ¹⁸ [atoms / cm ³ ] in the entire insulator of the element isolation portion. Note that the hydrogen concentration CA insulator INS may be of ^{3 × 10 21 [atoms / cm} 3] may be less ^{1 × 10 21 [atoms / cm} 3] or less. It is sufficient that a portion where the hydrogen concentration CA satisfies the above-described condition exists in the insulator INS, and a portion which does not satisfy the above-described condition may exist in the insulator INS. It is preferable that all the hydrogen concentrations CA of the insulator INS satisfy the above-described conditions. Note that the hydrogen concentration CA can be adjusted by using a film formation method (for example, an HDP-CVD method) or a source gas for film formation (for example, a silane-based gas) that can increase the hydrogen content in the insulator IM. The adjustment can also be made by introducing hydrogen from outside such as an insulating film containing hydrogen on the substrate S.

FIGS. 16A and 16B show a first example and a second example of the distribution of the hydrogen concentration CA in the present embodiment. 16A and 16B, a position TL indicates a position on the front surface of the substrate S, and a position BL indicates a position on the bottom surface of the element isolation unit ISO. The difference between the position TL and the position BL corresponds to the depth of the element isolation portion ISO. The depth of the element isolation portion ISO is, for example, 0.1 to 0.5 μm, typically 0.2 to 0.4 μm. In the examples of FIGS. 16A and 16B, the depth of the element isolation portion ISO is 0.26 μm. In the first example shown in FIG. 16A, the hydrogen concentration CA is distributed in a range of 1 × 10 ¹⁹ to 2 × 10 ²⁰ [atoms / cm ³ ]. In the second example shown in FIG. 16B, the hydrogen concentration CA is distributed in a range of 2 × 10 ¹⁹ to 1 × 10 ²¹ [atoms / cm ³ ]. In both the first example and the second example, the hydrogen concentration is significantly increased near the bottom surface (near the position BL) of the element isolation portion ISO. As described above, it is preferable that the hydrogen concentration in the lower half of the position BL is higher than that in the upper half of the position TL with reference to the position of half the depth of the element isolation portion ISO. By doing so, hydrogen can be effectively supplied into the substrate S.

As described above, the hydrogen concentration CA [atoms / cm ³ ] of the insulator INS of the element isolation portion ISO shows a distribution. An index that quantitatively indicates the amount of hydrogen in the insulator INS is the hydrogen density DA [atoms / cm ² ] of the insulator INS. The hydrogen density DA is an integrated value of the hydrogen concentration CA in the depth direction. If the hydrogen concentration CA is constant in the depth direction and the depth of the element isolation part ISO is DP [cm], the hydrogen density DA is the product of the hydrogen concentration CA and the depth DP (DA = CA × DP). is there. When the hydrogen concentration CA shows a distribution, the sum of the products of the resolution DR [cm] (DR = DP / n) in the depth direction and the hydrogen concentration CAn at each depth is obtained (DA = Σ (DR × CAn)). is there.

By setting the hydrogen density DA to 1 × 10 ¹⁴ [atoms / cm ² ] or more, a practical effect of reducing white flaws can be obtained. The hydrogen density DA of 1 × 10 ¹⁴ [atoms / cm ² ] means that the hydrogen concentration CA is uniformly 5 × 10 ¹⁸ [atoms / cm ² ] in the element isolation portion ISO having a depth of 0.2 μm. Corresponds to the case. The hydrogen density DA may be 3 × 10 ¹⁵ [atoms / cm ² ] or less. Note that the hydrogen density DA of 1 × 10 ¹⁴ [atoms / cm ² ] means that the hydrogen concentration CA is uniformly 1 × 10 ²⁰ [atoms / cm ² ] in the element isolation portion ISO having a depth of 0.3 μm. Is equivalent to As described above, the hydrogen concentration CA can be higher in the lower half than in the upper half of the element isolation portion ISO, so that the hydrogen concentration CA in the lower half of the element isolation portion ISO is dominant in the hydrogen density DA. Therefore, it is preferable that the portion located in the lower half of the element isolation portion ISO satisfies the above condition of the hydrogen concentration CA.

FIG. 17 shows the relationship between the hydrogen density and the number of white flaws. One of the two points in the graph of FIG. 17 corresponds to FIG. 16A, and the hydrogen density DA calculated from the distribution of the hydrogen concentration CA is 5.5 × 10 ¹⁴ [atoms / cm ² ]. The other of the two points in the graph of FIG. 17 corresponds to FIG. 16B, and the hydrogen density DA calculated from the distribution of the hydrogen density CA is 2.5 × 10 ¹⁵ [atoms / cm ² ]. It can be seen that as the hydrogen density DA increases, white flaws can be reduced. If the hydrogen density DA is 2 × 10 ¹⁴ [atoms / cm ² ], the number of white flaws is expected to be about 5,000, and 1.4 × 10 ¹⁵ [atoms] is required to further reduce the white flaws from the level of 5,000. / Cm ² ]. By setting the hydrogen density DA to 1.4 × 10 ¹⁵ [atoms / cm ² ] or more, white flaws can be sufficiently reduced.

Next, the relationship between the element isolation section ISO in the pixel area RA and the element isolation section STI in the peripheral area RB described in the second embodiment will be described. Here, the hydrogen concentration of the insulating member of the element isolation portion STI in the peripheral region RB shown in FIG. 13 is CB [atoms / cm ³ ]. It is preferable that the hydrogen concentration CB of the insulating member of the element isolation portion STI in the peripheral region RB is lower than the hydrogen concentration CA of the insulator INS (insulating member IM) of the element isolation portion ISO in the pixel region RA. Various defects occur in the substrate S during the manufacturing process of the imaging device 100. Examples of the defect include a point defect in the semiconductor substrate S and an interface state existing at an interface between the substrate S and the element isolation portion ISO. Further, for example, an interface state existing at the interface between the substrate S and the gate insulating film and a defect in the gate insulating film are also included. These defects cause a decrease in transistor performance and an increase in noise generated in the pixel circuit area. Noise generated in the pixel area RA is directly linked to image quality. Therefore, in the pixel region RA, it is desirable to promote the hydrogen termination of defects by increasing the hydrogen supply amount. On the other hand, in the peripheral region RB, when the main point is to ensure the reliability of the MIS transistor, it is desirable to limit the hydrogen supply amount. This is for the following reason. In the imaging device 100, miniaturization of the MIS transistor configuring the peripheral region RB is progressing due to a demand for higher signal processing speed and lower power consumption. As miniaturization progresses, a decrease in reliability of the MIS transistor, such as a decrease in hot carrier resistance and NBTI (Negative Bias Temperature Instability), becomes apparent. In these, when hydrogen is excessively present, deterioration of characteristics is promoted. Therefore, by satisfying CB <CA, it is possible to simultaneously improve the characteristics of the pixel region RA and the peripheral region RB.

  The difference in hydrogen concentration between the pixel region RA and the peripheral region RB is determined, for example, by the fact that the protective film PDP in the pixel region RA suppresses outward diffusion of hydrogen in the insulating member of the element isolation portion STI, and the protective film PDP in the peripheral region RB It can be realized by removing. In addition, by making the wiring structure as a hydrogen inhibiting member different between the pixel region RA and the peripheral region RB, it can be realized by making the hydrogen supply amount from a hydrogen supply source such as a passivation film provided above the wiring structure different. .

  The value calculated by SIMS analysis can be used as the hydrogen concentration in the insulator INS of the element isolation part ISO. The SIM analysis of the element isolation portion ISO can be performed from the surface (back surface) of the substrate S opposite to the surface (front surface) on which the element isolation portion ISO and the transistor are provided. SIMS analysis can also be performed from the front surface side of the substrate S in a state where all the layers other than the substrate S and the element isolation portion ISO are removed. Hereinafter, a method of calculating the hydrogen concentration CA will be described.

FIG. 18 schematically shows an arrangement pattern of the element section ACT and the element isolation section ISO in the pixel area RA and an analysis area AA by SIMS. The analysis area AA is a rectangular area having a side of about several tens of μm or a circular area having a diameter of about several tens of μm, and its area is set to SC (cm ² ). In the pixel area RA, a pattern of a pixel circuit of about several μm is repeatedly arranged. Therefore, the analysis area AA includes several to several tens of pixel circuit patterns. SIMS analysis is performed on the analysis area AA to calculate a hydrogen concentration MA (atoms / cm ³ ) in the analysis area AA. Since the pixel area RA has a repetitive pattern of pixel circuits, the hydrogen concentration MA in the analysis area AA is substantially the same regardless of which area in the pixel area RA is subjected to SIMS analysis. The element portion ACT is made of silicon having a low solid solubility of hydrogen, while the element isolation portion ISO is made of an insulator having a high solid solubility of hydrogen, such as silicon oxide. Therefore, the hydrogen concentration in the element portion ACT is negligibly lower than the hydrogen concentration in the element isolation portion ISO. Focusing on the fact that the analysis region AA of the hydrogen concentration MA includes the element portion ACT and the element isolation portion ISO, the hydrogen concentration MA obtained by the SIMS analysis is a SIMS including the element portion ACT and the element isolation portion ISO. It can be said that this is the average hydrogen concentration in the analysis region. Then, the hydrogen concentration of the element portion ACT becomes negligibly lower than the hydrogen concentration of the element isolation portion ISO. Therefore, the hydrogen concentration MA obtained by the SIMS analysis is not equal to the hydrogen concentration CA of the element isolation part ISO. This is because the element isolation section ISO does not exist in the entire analysis area, but the element section ACT and the element isolation section ISO coexist in the analysis area. Therefore, the actual hydrogen concentration CA of the element isolation portion ISO is calculated as follows. First, the area occupancy OA of the element isolation portion ISO in the analysis area AA is calculated. The area occupancy can be calculated from CAD data or the like used for the layout design of the element isolation part ISO. The area occupancy OA of the element isolation part ISO is a value obtained by dividing the total area SA (cm ² ) of the area of the element isolation part ISO when the analysis area AA is viewed in plan by the area SC of the analysis area AA (OA = SA). / SC). The hydrogen concentration CA in the insulator of the element isolation part ISO is a value obtained by dividing the hydrogen concentration MA in the analysis area AA by the area occupancy OA of the element isolation part ISO (CA = MA / OA). The area occupancy OA is a value larger than 0 and smaller than 1, and is about 0.2 to 0.6. In the imaging device 100, in order to further increase the light receiving area of the photoelectric conversion unit PD, the element unit ACT of the pixel region RA is set to be larger than the element separation unit ISO, and OA may be 0.5 or less.

The hydrogen concentration CB in the peripheral region RB can be calculated similarly. That is, the hydrogen concentration CB in the insulator IM of the element isolation portion STI in the peripheral region RB is a value obtained by dividing the hydrogen concentration MB in the analysis region with respect to the peripheral region RB by the area occupancy OB of the element isolation portion STI (CB = MB / OB). The area occupancy OA of the element isolation portion STI is a value obtained by dividing the total SB (cm ² ) of the area of the element isolation portion STI when the analysis region with respect to the peripheral region RB is viewed in plan by the area SC of the analysis region (OB) = SB / SC).

  In the imaging device 100, the element portion of the pixel region RA is set to be larger than the element isolation portion ISO in order to increase the light receiving area of the photoelectric conversion portion PD. Therefore, the area occupancy OA of the element isolation portion ISO in the pixel region RA is lower than the area occupancy OB of the element isolation portion STI in the peripheral region RB (OA <OB). On the other hand, the amount of hydrogen supplied from the element isolation portions ISO and STI per unit volume is preferably larger in the pixel region RA than in the peripheral region RB. The amount of hydrogen QA that can be supplied from the element isolation unit ISO per unit volume in the pixel region RA is proportional to the value obtained by multiplying the hydrogen concentration CA by the area occupancy OA (QA∝CA × OA). Similarly, the amount of hydrogen QB that can be supplied from the element isolation portion STI per unit volume in the peripheral region RB is proportional to the value obtained by multiplying the hydrogen concentration CB by the area occupancy OB (QB∝CB × OB). Therefore, satisfying QB <QA means satisfying CB × OB <CA × OA. In order to satisfy both OA <OB and CB × OB <CA × OA, it is more preferable to satisfy 10 × CB ≦ CA. Since CA × OA = MA and CB × OB = MB, whether or not QB <QA is satisfied is determined by SIMS analysis in an analysis area having the same shape with respect to the pixel area RA and the peripheral area RB. It can be determined by comparing the determined amounts of hydrogen.

  The oxygen concentration in the above-described first to fourth embodiments can also be analyzed by SIMS. In that case, the analysis region of the SIMS includes not only the semiconductor region but also the element isolation part ISO. Therefore, in the oxygen concentration at a depth (for example, 0.1 to 0.5 μm) where the element isolation part ISO exists in the substrate S in the SIMS data, the presence of oxygen in the silicon oxide constituting the element isolation part ISO is present. Very strongly reflected. Oxygen derived from silicon oxide in the element isolation portion ISO should be distinguished from oxygen in the semiconductor region. In reality, the oxygen concentration at the depth where the element isolation portion ISO exists in the SIMS analysis data of the substrate S can be excluded from the oxygen concentration distribution in the semiconductor region. It is also possible to evaluate the oxygen concentration in the semiconductor region at a portion shallower than the bottom surface of the element isolation portion ISO by performing SIMS measurement after removing the element isolation portion ISO from the substrate S by wet etching or the like. It is.

  In the first embodiment, the purpose is to supply oxygen from the inner surface of the trench TR to the deep portion of the second semiconductor region 102, and the fact that the oxygen concentration at the depth where the element isolation portion 110 exists is not considered is considered in the first embodiment. It does not depart from the gist of this. Therefore, the range, maximum value, and minimum value of the oxygen concentration of the semiconductor substrate SUB may be evaluated in a portion deeper than the element isolation portion 110. In other words, the range, maximum value, and minimum value of the oxygen concentration of the semiconductor substrate SUB may be evaluated in a portion of the surface of the semiconductor substrate SUB that is deeper than a portion forming the bottom surface of the element isolation portion 110. In the graph shown in FIG. 9, the oxygen concentration at the depth where the element isolation portion 110 exists is omitted.

  In the second embodiment, the P-type region R3 is formed such that the net P-type impurity concentration in a part of the P-region is higher than the net P-type impurity concentration in another part at a position deeper than the part. With such a configuration, the depletion layer does not reach a part deeper than the certain part or another part. The certain portion may be, for example, the portion P1, and the other portion may be, for example, an N-type charge storage portion, and may be, for example, portions P2 to P4 deeper than P1. Thereby, the width of the depletion layer between the N-type region R1 and the P-type region R3 can be reduced, and white flaws in an image can be suppressed. In the second embodiment, the peak position Q_R1 of the N-type region R1 may be arranged so as to be deeper than half of the depth of the element isolation part STI. Preferably, the peak position Q_R1 is located deeper than the bottom surface of the element isolation part STI. May be arranged.

  The second embodiment is also applied to a so-called back-illuminated imaging device in which optical elements such as a color filter and a microlens are arranged on the opposite side (back side) to the front side of a substrate provided with transistors and wiring layers. It is possible. In that case, the P-type region R3 may be exposed and arranged on the back surface without the N-region R2 and the N-type region R4. In the backside illumination type imaging device, a single-crystal silicon layer is formed by epitaxial growth on an N-type region R4 as a silicon wafer, and an N-type region R1, a P-type region R3, and the like are formed by ion implantation into the single-crystal silicon layer. Can be formed. Thereafter, a part of the silicon wafer or the single-crystal silicon layer (corresponding to the N-type region R2) is removed by polishing. However, if oxygen diffuses into the single-crystal silicon layer before polishing, the above-described P-type region is removed. If oxygen is present, the effect of afterimages can occur as well. Further, the problem of an afterimage due to light that is easily absorbed by silicon such as blue light is likely to occur. Therefore, it is useful to apply the present invention to a backside illumination type imaging device. For example, if at least a part of the P-type region R3 located on the rear surface side where light is incident has a low oxygen concentration, the influence of an afterimage can be reduced. Further, if the structure is such that the depletion layer can be prevented from spreading to the P-type region R3, the effect of white flaws due to the polishing of the substrate can also be reduced.

  The embodiments described above can be appropriately combined without departing from the spirit of the present invention, and the combinations constitute a part of the present disclosure. In addition, items that can be clearly understood from the drawings, particularly specific numerical values and the like in various graphs, constitute a part of the present disclosure even if not explicitly described in the present specification.

100: imaging device, 101: first semiconductor region, 102: second semiconductor region, R1: N-type region, R2: N-type region, R3: P-type region.

Claims (33)

A wafer having a first semiconductor region made of single-crystal silicon having an oxygen concentration in the range of 2 × 10 ¹⁶ atoms / cm ^{3 to} 4 × 10 ¹⁷ atoms / cm ³ , and an oxygen concentration Preparing a substrate comprising: a silicon layer having a second semiconductor region made of single crystal silicon lower than the first semiconductor region;
Heat-treating the substrate in an atmosphere containing oxygen so that the oxygen concentration of the second semiconductor region falls within a range of 2 × 10 ¹⁶ atoms / cm ³ or more and 4 × 10 ¹⁷ atoms / cm ³ or less;
Forming a photoelectric conversion element in the second semiconductor region after the heat treatment;
A method for manufacturing an imaging device, comprising: Forming a trench in the silicon layer of the substrate before the heat treatment;
In the heat treatment, an inner surface of the trench is oxidized.
The method for manufacturing an imaging device according to claim 1, wherein: Forming an impurity region along the inner surface of the trench having a conductivity type opposite to a conductivity type of the second semiconductor region;
The method for manufacturing an imaging device according to claim 2, wherein: The step of forming the impurity region is performed after the heat treatment;
The method for manufacturing an imaging device according to claim 3, wherein: Further comprising a step of filling the trench with an insulator after the heat treatment;
The method of manufacturing an imaging device according to claim 2, wherein: The heat treatment is performed at a temperature of 800 ° C. or more and 1150 ° C. or less.
The method for manufacturing an imaging device according to claim 1, wherein: In the step of performing the heat treatment, the substrate is cooled at a temperature drop rate of 1 ° C./second or more after heating the substrate.
The method of manufacturing an imaging device according to claim 1, wherein: The silicon layer is an epitaxial layer having a thickness of 5 μm or more and 25 μm or less,
The method for manufacturing an imaging device according to claim 1, wherein: Forming a gate electrode on the surface of the substrate,
After forming the gate electrode, when the maximum value and the minimum value of the oxygen concentration in the second semiconductor region are C22max and C22min, respectively, C22max / C22min is 10 or less.
The method for manufacturing an imaging device according to claim 1, wherein: The second semiconductor region has the same conductivity type as the first semiconductor region,
In the step of forming the photoelectric conversion element,
A first impurity region having a conductivity type different from the conductivity type of the second semiconductor region between the first semiconductor region and a surface of the substrate;
10. The semiconductor device according to claim 1, wherein a second impurity region having the same conductivity type as that of the second semiconductor region is formed between the first impurity region and a surface of the substrate. 13. The method for manufacturing an imaging device according to item 9. An image pickup apparatus having a substrate made of single-crystal silicon and an element isolation portion disposed on a surface side of the substrate,
Cmax / Cmin is 10 or less, where Cmax and Cmin are the maximum value and the minimum value of the oxygen concentration of the semiconductor region in a portion within a distance of 20 μm from the surface, respectively.
A photoelectric conversion element is arranged in the semiconductor region;
An imaging device characterized by the above-mentioned. Cmax / Cmin is 5 or less,
The imaging device according to claim 11, wherein: An oxygen concentration of the semiconductor region in the portion is in a range of 2 × 10 ¹⁶ atoms / cm ³ or more and 4 × 10 ¹⁷ atoms / cm ³ or less;
The imaging device according to claim 11, wherein: An oxygen concentration of at least a part of the semiconductor region is 1 × 10 ¹⁷ atoms / cm ³ or less;
The imaging device according to claim 11, wherein: The photoelectric conversion element includes an n-type first impurity region, and a p-type second impurity region that is disposed farther from the surface than the first impurity region,
The imaging device according to claim 11, wherein an oxygen concentration of the second impurity region is 1 × 10 ¹⁷ atoms / cm ³ or less. The second impurity region includes a first portion including a position at which the p-type net impurity concentration has a first maximum value;
And a second portion including a position where the p-type net impurity concentration exhibits a second maximum value lower than the first maximum value, the second portion being located further away from the surface than the first portion. The imaging device according to claim 15, wherein: A pixel portion in which a plurality of pixels are arranged on a substrate made of silicon, and a peripheral circuit portion disposed around the pixel portion on the substrate and including a circuit for processing a signal from each pixel; A circuit unit; and
The peripheral circuit unit has a transistor having a silicide region containing at least one of nickel and cobalt,
Each pixel is
A first region of a first conductivity type formed on the substrate and including a portion for accumulating charges generated by photoelectric conversion;
A second region of the first conductivity type disposed at a position deeper than the first region of the substrate and distant from the first region, and the first region in a depth direction from a surface of the substrate; A third region of a second conductivity type disposed between the region and the second region;
Has,
The third area,
A first portion disposed at a position apart from the second region in the depth direction, the first portion including a position at which a net impurity concentration of the second conductivity type exhibits a first maximum value;
A second portion disposed between the first portion and the second region in the depth direction, the second portion including a position where a net impurity concentration of the second conductivity type indicates a second maximum value lower than the first maximum value; Two parts,
Including
The imaging device according to claim 1, wherein the second portion has an oxygen concentration of 1 × 10 ¹⁷ [atoms / cm ³ ] or less. The third region is a third portion disposed between the second portion and the second region in the depth direction, wherein the net impurity concentration of the second conductivity type is the second maximum value. The imaging device according to claim 17, further comprising a third portion including a position indicating a third maximum value higher than the third portion. A pixel portion in which a plurality of pixels are arranged on a substrate made of silicon, and a peripheral circuit portion disposed around the pixel portion on the substrate and including a circuit for processing a signal from each pixel; A circuit unit; and
The peripheral circuit unit has a transistor having a silicide region containing at least one of nickel and cobalt,
Each pixel is
A first region of a first conductivity type formed on the substrate and including a portion for accumulating charges generated by photoelectric conversion;
A second region of the first conductivity type, which is disposed at a position deeper than the first region of the substrate and away from the first region;
A third region of a second conductivity type disposed between the first region and the second region in a depth direction from a surface of the substrate;
Has,
The third area,
The second conductivity type net impurity concentration is arranged at a position away from the second region in the depth direction, and is higher than the maximum value of the first conductivity type net impurity concentration in the first region. A first portion including a first position;
A second portion disposed deeper than the first portion;
Including
An imaging device, wherein in the depth direction, an oxygen concentration in a region deeper than the first position of the first portion and including the second portion is 1 × 10 ¹⁷ [atoms / cm ³ ] or less. . The first position of the first portion is a position where a net impurity concentration of the second conductivity type indicates a first maximum value,
The second portion includes a position where a net impurity concentration of the second conductivity type indicates a second maximum value lower than the first maximum value,
The third region is a third portion disposed between the second portion and the second region in the depth direction, wherein the net impurity concentration of the second conductivity type is the second maximum value. 20. The imaging device according to claim 19, further comprising a third portion including a position indicating a third maximum value higher than the third portion. The third region is a fourth portion disposed between the second portion and the third portion in the depth direction, wherein the net impurity concentration of the second conductivity type is the second maximum value. 21. The imaging device according to claim 18, further comprising a fourth portion including a position indicating a lower fourth maximum value than the fourth portion. 22. The storage device according to claim 17, wherein a depletion layer formed between the first region and the third region does not reach the second portion when charges are stored in the first region. The imaging device according to claim 1. 23. The imaging apparatus according to claim 17, wherein the second portion has an oxygen concentration of 1 * 10 < ¹⁶ > atoms / cm < ³ > or more. The oxygen concentration in the substrate is 1 × 10 7 in a region from a position at a depth of 0.7 μm from the surface of the substrate to a position at a depth of 3.2 μm from the surface of the substrate. The imaging apparatus according to any one of claims 17 to 23, wherein the imaging rate is ¹⁷ [atoms / cm ³ ] or less. 25. The imaging device according to claim 17, wherein the oxygen concentration in a part of the second region is higher than the impurity concentration of the second conductivity type in the part. The oxygen concentration in the substrate is greater than 1 × 10 ¹⁷ [atoms / cm ³ ] in at least a part of the region where the depth from the surface of the substrate is 10 [μm] or more. 26. The imaging device according to any one of claims 25. 27. The imaging device according to claim 17, wherein the oxygen concentration in the third region is lower than the oxygen concentration in the second region. 28. The imaging device according to claim 17, wherein the transistor forms a part of an analog-to-digital conversion circuit for converting a signal from each pixel into an analog-to-digital signal. 29. The imaging device according to claim 17, further comprising an element isolation section having an STI structure. 30. The device according to claim 11, wherein the element isolation portion is formed of an insulator having a portion having a hydrogen concentration of 5 × 10 ¹⁸ [atoms / cm ³ ] or more. An imaging device according to any one of the preceding claims. The device isolation portion is made of an insulator containing hydrogen, and a hydrogen density obtained by integrating the hydrogen concentration of the device isolation portion in a depth direction of the substrate is 1 × 10 ¹⁴ [atoms / cm ² ] or more. ,
The imaging device according to any one of claims 11 to 16, and 30, wherein: An element isolation portion composed of an insulator containing hydrogen is provided in the pixel portion and the peripheral circuit portion,
The hydrogen concentration of the insulator of the element isolation part in the peripheral circuit part is lower than the hydrogen concentration of the insulator of the element isolation part in the pixel part. An imaging device according to any one of the preceding claims. 33. A camera comprising: the imaging device according to claim 11; and a processing unit that processes a signal output from the imaging device.

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