JP2019195168A - Symbol power tracking amplification system and radio communication device including the same - Google Patents

Abstract

To provide a symbol power tracking amplification system having the improved power efficiency and communication performance and a radio communication device including the symbol power tracking amplification system.SOLUTION: A symbol power tracking amplification system according to the present invention supporting symbol power tracking modulation includes: a power amplifier that amplifies RF signals; and a symbol tracking modulator that generates a first supply voltage and a second supply voltage on the basis of a symbol tracking signal received from the outside, alternately selects the first supply voltage and the second supply voltage for each symbol group section corresponding to a symbol group unit including at least one symbol, and supplies a supply voltage with changeable level to the power amplifier for each symbol group section.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a symbol power tracking amplification system, and more particularly to a symbol power tracking amplification system supporting a symbol power tracking modulation technique and a wireless communication apparatus including the same.

  Wireless communication devices such as smartphones, tablets, and IoT (Internet of things) devices, for high-speed communication, WCDMA (registered trademark) (wideband code division multiple access) (3rd generation (3G)) technology, LTE (registered) (Long-term evolution) and LTE-advanced (4th generation (4G)) technology. As communication technology develops, a higher peak-to-average ratio (PAPR) and higher bandwidth (bandwidth) of transmission / reception signals are required. Therefore, when the power source of the power amplifier at the transmission end is connected to a battery, The efficiency of the amplifier is lowered. At high PAPR and high bandwidth, average power tracking (APT) and envelope tracking (ET) modulation techniques are used to improve the efficiency of power amplifiers. Using envelope tracking modulation techniques can improve the efficiency and linearity of the power amplifier. A chip that supports the average power tracking technique and the envelope tracking modulation technique is called an envelope modulator (SM).

  Recently, however, research on 5th generation communication technology (hereinafter referred to as 5G communication) has been promoted, and at the same time, it is suitable for high-speed data communication that is even faster than 4th generation communication technology. There is a need for power tracking modulation techniques.

JP-T-2005-513943

  The present invention has been made in view of the above prior art, and an object of the present invention is to provide a power tracking modulation technique suitable for 5G communication, and to improve the efficiency of power consumed for amplification and communication performance. It is an object of the present invention to provide a symbol power tracking amplification system and a wireless communication apparatus including the same.

  A symbol power tracking amplification system according to an aspect of the present invention, which is made to achieve the above object, is a symbol power tracking amplification system supporting symbol power tracking modulation, wherein an RF (radio frequency) signal is received. Based on a power amplifier to be amplified and a symbol tracking signal received from the outside, a first supply voltage and a second supply voltage are generated, and for each symbol group section corresponding to a symbol group unit including at least one symbol, the first supply voltage and the second supply voltage are generated. A symbol tracking modulator that alternately selects one supply voltage and the second supply voltage and provides the power amplifier with a supply voltage whose level can be changed for each symbol group period.

  In order to achieve the above object, a wireless communication apparatus according to an aspect of the present invention includes a power amplifier that amplifies an RF signal, a symbol tracking modulator that provides a supply voltage to the power amplifier, and at least the RF signal. A modem that provides the symbol tracking modulator with a symbol tracking signal and a trigger signal corresponding to a symbol group unit including one symbol, the symbol tracking modulator based on the symbol tracking signal at least 2 The above supply voltage is generated, and based on the trigger signal, any one of the supply voltages is selected for each symbol group section in the symbol group unit and provided to the power amplifier. And

  In order to achieve the above object, a recording medium according to an aspect of the present invention is a computer-readable recording medium storing a program for generating a signal necessary for symbol power tracking modulation, The signal generation step includes a step of dividing a data signal corresponding to the RF signal into a plurality of symbol groups based on a symbol group unit including at least one symbol, and a step of generating the symbol included in each of the symbol groups. The method includes generating a symbol tracking signal based on the magnitude, and generating a trigger signal corresponding to the symbol group unit.

  According to the present invention, it is possible to improve the communication performance between the radio communication apparatus and the base station by outputting the RF output signal in which the signal pattern of the RF signal is reflected as it is.

1 is a block diagram schematically illustrating a wireless communication device according to an embodiment of the present invention. It is a figure for demonstrating an average power tracking technique. It is a figure for demonstrating the problem of an average power tracking technique. FIG. 6 is a diagram illustrating a symbol power tracking modulation technique according to the present invention. FIG. 6 is a diagram illustrating a symbol power tracking modulation technique according to the present invention. FIG. 3 is a block diagram illustrating a symbol tracking modulator according to an embodiment of the present invention. FIG. 3 is a block diagram illustrating a symbol tracking modulator according to an embodiment of the present invention. FIG. 2 is a circuit diagram illustrating a symbol tracking modulator according to an embodiment of the present invention. FIG. 6 is a diagram illustrating a signal diagram required for the symbol tracking modulator of FIG. 5 to perform an operation. 1 is a circuit diagram illustrating a symbol tracking modulator capable of fast charge control according to an embodiment of the present invention; FIG. It is a block diagram for demonstrating operation | movement of the fast charge control circuit which performs fast charge control. 1 is a block diagram illustrating a modem according to an embodiment of the present invention. It is a figure which shows the structure of the frame of 5G base for demonstrating the method to determine a symbol group unit based on 5G frame structure. It is a flowchart for demonstrating the method of determining a symbol group unit based on a communication environment. FIG. 6 is a diagram illustrating a signal diagram required for the symbol tracking modulator of FIG. 5 to perform an operation. FIG. 2 is a circuit diagram illustrating a symbol tracking modulator according to an embodiment of the present invention. FIG. 13 is a diagram illustrating a signal diagram required for the symbol tracking modulator of FIG. 12 to perform an operation. FIG. 3 is a block diagram illustrating an implementation example of a symbol tracking modulator according to an exemplary embodiment of the present invention. FIG. 15 is a circuit diagram illustrating a first SIMO (single inductor multiple output) converter of FIG. 14. FIG. 6 is a block diagram illustrating another example of a symbol tracking modulator according to an exemplary embodiment of the present invention. FIG. 6 is a block diagram illustrating another example of a symbol tracking modulator according to an exemplary embodiment of the present invention. 1 is a block diagram illustrating a wireless communication apparatus according to an embodiment of the present invention. It is a block diagram which shows the phased array antenna module by one Embodiment of this invention. It is a figure explaining the symbol power tracking operation | movement using SIDO by one Embodiment of this invention. It is a figure explaining the symbol power tracking operation | movement using SIDO by one Embodiment of this invention. FIG. 3 is a block diagram illustrating a PMIC including two buck converters supporting a ripple-injected hysteresis control function according to an embodiment of the present invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram schematically illustrating a wireless communication apparatus according to an embodiment of the present invention.

Referring to FIG. 1, the wireless communication apparatus 100 includes a modem 110, a symbol tracking modulator 130, an RF block 150, and a power amplifier (PA) 170. The configuration including symbol tracking modulator 130 and power amplifier 170 is defined as a symbol power tracking amplification system that amplifies an RF signal (RF _IN ) and outputs an RF output signal (RF _OUT ). The modem 110 processes a baseband signal transmitted / received by the wireless communication apparatus 100. Specifically, the modem 110 generates a digital signal, and generates a digital data signal and a digital symbol tracking signal corresponding to the digital data signal from the generated digital signal. At this time, the digital symbol tracking signal is generated from the magnitude (or amplitude component) of the digital data signal. The modem 110 performs digital / analog conversion on the digital data signal and the digital symbol tracking signal, and provides the data signal TX and the symbol tracking signal TS_SPT to the RF block 150 and the symbol tracking modulator 130, respectively. However, the symbol tracking signal TS_SPT provided to the symbol tracking modulator 130 by the modem 110 is not limited to an analog signal, and may be a digital signal.

The data signal TX matches a predetermined frame, and the data signal TX includes a plurality of symbols. Details regarding the frame will be described in detail with reference to FIG. The modem 110 according to an embodiment divides the data signal TX into a plurality of symbol groups based on a symbol group unit including at least one symbol, and the size (or amplitude) of a symbol included in each of the symbol groups. Based on the component, a symbol tracking signal TS_SPT is generated. For example, when a symbol group unit includes only one symbol, the symbol group unit is referred to as a symbol unit, and the modem 110 generates a symbol tracking signal TS_SPT based on the size of each symbol of the data signal TX, The symbol tracking modulator 130 provides the power amplifier 170 with a selected supply voltage Vsel that tracks the RF signal RF _IN for each symbol period based on the symbol tracking signal TS_SPT. The modem 110 also provides a trigger signal Trigger_SPT corresponding to the symbol group unit to the symbol tracking modulator 130. The trigger signal Trigger_SPT is a signal for informing the symbol tracking modulator 130 when the new symbol group period starts. For example, when the symbol group unit includes only one symbol, the trigger signal Trigger_SPT is a signal for informing the time point at which each symbol of the data signal TX starts.

  The modem 110 variously determines (or changes) the number of symbols included in the symbol group unit, and generates a symbol tracking signal TS_SPT and a trigger signal Trigger_SPT corresponding to the symbol group unit. A determination method for the symbol group unit of the modem 110 will be described with reference to FIGS. 7A to 9.

The symbol tracking signal TS_SPT and the trigger signal Trigger_SPT control that the symbol tracking modulator 130 provides the power amplifier 170 with a selected supply voltage Vsel that tracks the RF signal RF _IN for each symbol group period based on the symbol group unit. It is embodied in various ways as a signal. Based on the symbol tracking signal TS_SPT and the trigger signal Trigger_SPT, the symbol tracking modulator 130 sets the voltage of the selected supply voltage Vsel on the basis of the maximum symbol size of the data signal TX for each symbol group corresponding to the symbol group unit. A symbol power tracking (SPT) operation for modulating a level is performed.

  The symbol tracking modulator 130 modulates the voltage level of the selected supply voltage Vsel provided to the power amplifier 170 based on the symbol tracking signal TS_SPT. Specifically, the symbol tracking modulator 130 includes an SPT control circuit 131, a voltage supply 133, and a switch circuit 135. In one embodiment, the SPT control circuit 131 generates a first control signal SPT_CS1 and a second control signal SPT_CS2 based on the symbol tracking signal TS_SPT and trigger signal Trigger_SPT received from the modem 110, respectively, and a voltage supply 133 and a switch circuit 135. To provide.

The voltage supplier 133 generates at least two supply voltages based on the first control signal SPT_CS1 using the power supply voltage V _DD (or battery voltage). The voltage levels of these supply voltages are changed by the first control signal SPT_CS1, and the symbol group periods in which the voltage levels of the respective supply voltages are changed are different. The voltage supply 133 includes a plurality of output terminals that output the respective supply voltages, and each output terminal is connected to the switch circuit 135.

  The switch circuit 135 includes a plurality of switch elements, and based on the second control signal SPT_CS2, any one of the supply voltages generated by the voltage supplier 133 for each symbol group section corresponding to the symbol group unit. Select. For example, when the symbol group unit includes only one symbol, the switch circuit 135 performs a switching operation for selecting any one of the supply voltages for each symbol period. Based on the first control signal SPT_CS1, the voltage supplier 133 changes the remaining voltage level of the supply voltage excluding the supply voltage selected by the switch circuit 135.

The RF block 150 up-converts the data signal TX to generate an RF signal RF _IN . The power amplifier 170 is driven by the selected supply voltage Vsel, amplifies the RF signal RF _IN , and generates an RF output signal RF _OUT . The RF output signal RF _OUT is provided to the antenna. As described above, the selected supply voltage Vsel has a voltage level transition pattern for tracking the data signal TX or the RF signal RF _IN in symbol group units.

The symbol tracking modulator 130 according to the present invention performs an amplification operation of the power amplifier 170 that minimizes signal pattern deformation of the RF signal RF _IN by performing a symbol power tracking operation. That is, the power amplifier 170 uses the selected supply voltage Vsel to output the RF output signal RF _OUT that reflects the signal pattern of the RF signal RF _IN as it is, so that the communication performance between the radio communication apparatus 100 and the base station is achieved. To improve.

  2A and 2B are diagrams for explaining the average power tracking technique and a diagram for explaining the problems thereof, respectively. Hereinafter, in an LTE (long-term evolution) system, a frame of a data signal includes 10 subframes, and one subframe includes two slots. In addition, one slot includes seven symbols.

Referring to FIG. 2A, the average power tracking technique modulates the voltage level of the supply voltage V _{APT based} on the maximum magnitude (or amplitude) of the data signal for each subframe _period . 2B shows the RF signal _{RF IN} which corresponds to the first sub-frame period ITV1 to third sub-frame period ITV3 in Figure 2A, the supply voltage by the average power tracking technology and a (gradual static _{voltage) V APT.} Referring to Figure 2B, in the second sub-frame period ITV2, first symbol S_SB1 the RF signal _{RF IN,} in the third subframe period ITV3, has a second symbol S_SB2 same size as the RF signal _{RF IN} The level of the supply voltage V _APT corresponding to the second subframe interval ITV2 is different from the level of the supply voltage V _APT corresponding to the third subframe interval ITV3. The actual power amplifier, the supply voltage V _APT level, for the amplification gain is changed, the power amplifier, the size of the amplified and signal output of the first symbol S_SB1, amplifies the second symbol S_SB2 It differs from the output signal size. That is, even when the supply voltage _VAPT having different levels is provided to the power amplifier even for the same symbol, the power amplifiers are amplified with different amplification gains and output different results, which may reduce communication reliability. there were. In particular, in 5G systems, symbol-level communication is presumed for high-speed data communication in a high frequency bandwidth, but data accuracy on a symbol-by-symbol basis is important. Power tracking modulation technology is required.

  3A and 3B are diagrams for explaining a symbol power tracking modulation technique according to the present invention.

Referring to FIG. 3A, the symbol power tracking modulation technique according to the present invention is implemented using the modem 110 and the symbol tracking modulator 130 of FIG. The voltage level of the supply voltage V _SPT is modulated on the basis of the magnitude (or amplitude) of. The level of the supply voltage V _SPT is changed within a CP (cyclic prefix) section of the symbol. However, the embodiment shown in FIG. 3A is applicable when the symbol group unit includes only one symbol. When the symbol group unit includes a plurality of symbols, the symbol group section includes a plurality of symbols. Further, the voltage level of the supply voltage V _SPT is modulated based on the maximum magnitude of the data signal.

Referring to FIG. 3B, the symbol tracking modulator 130 of FIG. 1 provides the power amplifier 170 with a supply voltage V _SPT that tracks the RF signal RF _IN on a symbol-by-symbol basis. As a result, the symbol power tracking amplification system including the symbol tracking modulator 130 and the power amplifier 170 according to the present invention accurately amplifies and outputs the RF signal RF _IN in units of symbols, thereby improving the communication performance with the base station. There is an effect to improve.

  4A and 4B are block diagrams illustrating a symbol tracking modulator according to an embodiment of the present invention.

  Referring to FIG. 4A, the symbol tracking modulator 200 includes an SPT control circuit 210, a first voltage supply circuit 220, a second voltage supply circuit 230, and a switch circuit 240. The SPT control circuit 210 receives the symbol tracking signal TS_SPT and the trigger signal Trigger_SPT from the modem. The SPT control circuit 210 generates a first voltage level control signal VL_CSa and a second voltage level control signal VL_CSb based on the symbol tracking signal TS_SPT, and provides the first voltage level control signal VL_CSb to the first voltage supply circuit 220 and the second voltage supply circuit 230, respectively. . Further, the SPT control circuit 210 generates a switching control signal SW_CS based on the trigger signal Trigger_SPT and provides it to the switch circuit 240. The SPT control circuit 210 further includes a timer. When the information of the number of symbols separately included in the symbol group unit is further received from the modem, the SPT control circuit 210 receives the trigger signal Trigger_SPT once and then uses the timer to The time corresponding to the group unit is counted, and the switching control signal SW_CS is periodically generated according to the count result.

The first voltage supply circuit 220, based on the first voltage level control signal VL_CSa, generating a first supply voltage _{V OUTa,} second voltage supply circuit 230, based on the second voltage level control signal VL_CSb, second A supply voltage V _OUTb is generated. The switch circuit 240 alternately selects the first voltage supply circuit 220 and the second voltage supply circuit 230 for each symbol group section based on the switching control signal SW_CS, and connects the first voltage supply circuit 220 and the second voltage supply circuit 230 to the power amplifier (PA). The first voltage supply circuit 220 changes the level of the first supply voltage _VOUTa based on the first voltage level control signal VL_CSa in the symbol group section in which the second voltage supply circuit 230 is selected. In addition, the second voltage supply circuit 230 changes the level of the second supply voltage _VOUTb based on the second voltage level control signal VL_CSb in the symbol group section in which the first voltage supply circuit 220 is selected. Through the above-described scheme, the switch circuit 240 provides the power amplifier (PA) with the selected supply voltage Vsel by symbol power tracking modulation.

Referring to FIG. 4B, the symbol tracking signal TS_SPT of FIG. 4A includes a first symbol tracking signal TS_SPT1 and a second symbol tracking signal TS_SPT2. The first symbol tracking signal TS_SPT1 is a signal for controlling the level of the first supply voltage V _OUTa , and the second symbol tracking signal TS_SPT2 is a signal for controlling the level of the second supply voltage V _OUTb . In one embodiment, the SPT control circuit 210 includes a digital / analog conversion circuit (212, 214), and the first symbol tracking signal TS_SPT1 and the second symbol tracking signal TS_SPT2 include the digital / analog conversion circuit (212, 214). Are converted into a first voltage level control signal VL_CSa and a second voltage level control signal VL_CSb, respectively. However, in one embodiment, when the first symbol tracking signal TS_SPT1 and the second symbol tracking signal TS_SPT2 are analog signals, the first symbol tracking signal TS_SPT1 and the second symbol tracking signal TS_SPT2 are respectively at the first voltage level. It is the same signal as the control signal VL_CSa and the second voltage level control signal VL_CSb.

  The SPT control circuit 210 receives the first symbol tracking signal TS_SPT1 through the first signal path SP1, routes it to the first voltage supply circuit 220, and passes the second symbol path signal SP2 through the second signal path SP2. The symbol tracking signal TS_SPT 2 is received and routed to the second voltage supply circuit 230.

  The relationship between the first symbol tracking signal TS_SPT1 and the second symbol tracking signal TS_SPT2 for implementing the symbol power tracking modulation technique will be described. The level change timing of the first symbol tracking signal TS_SPT1 is the level of the second symbol tracking signal TS_SPT2. It is different from the change timing. Further, the interval between the level change timing of the first symbol tracking signal TS_SPT1 and the level change timing of the second symbol tracking signal TS_SPT2 matches the length of the symbol group unit. That is, the modem provides a plurality of symbol tracking signals (TS_SPT1, TS_SPT2) to the symbol tracking modulator 200 via a plurality of signal paths (SP1, SP2).

  FIG. 5 is a circuit diagram illustrating a symbol tracking modulator according to an embodiment of the present invention.

Referring to FIG. 5, the symbol tracking modulator 300 includes an SPT control circuit 310, a first DC-DC converter 320, a second DC-DC converter 330, a switch circuit 340, and an output capacitor element C _SPT . The first DC-DC converter 320 and the second DC-DC converter 330 support a DVS (dynamic voltage scaling) function. The first DC-DC converter 320 includes a first conversion control circuit 322, a first comparator 324, a plurality of switch elements (SW _C1 , SW _C2 ), an inductor element L _a , and a capacitor element Ca. The second DC-DC converter 330 includes a second conversion control circuit 332, a second comparator 334, a plurality of switch elements (SW _C3 , SW _C4 ), an inductor element L _b , and a capacitor element C _b .

The SPT control circuit 310 provides the first reference voltage V _REFa and the second reference voltage V _REFb to the first comparator 324 and the second comparator 334 based on the symbol tracking signal TS_SPT. The first comparator 324 receives the first supply voltage V _OUTa at the output node N _a of the first DC-DC converter 320, _compares the first reference voltage V _REFa with the first supply voltage V _OUTa , and compares the comparison result. The first conversion control circuit 322 is provided. The first conversion control circuit 322 controls the switching operation for the switch elements (SW _C1 , SW _C2 ) based on the comparison result, and the first DC-DC converter 320 performs the first supply corresponding to the first reference voltage V _REFa. A voltage V _OUTa is generated. The second comparator 334 receives the second supply voltage V _OUTb of the output node N _b of the second DC-DC converter 330, _compares the second reference voltage V _REFb and the second supply voltage V _OUTb , and compares the comparison result. This is provided to the second conversion control circuit 332. The second conversion control circuit 332 controls the switching operation for the switch elements (SW _C3 , SW _C4 ) based on the comparison result, and the second DC-DC converter 330 performs the second supply corresponding to the second reference voltage V _REFb. A voltage V _OUTb is generated.

The switch circuit 340 includes a plurality of switch elements (SW _a , SW _b ). The first switch element SW _a is connected between the first DC-DC converter 320 and the output node N _OUT (or the output terminal) of the symbol tracking modulator 300, and the second switch element SW _b is the second DC− It is connected between the DC converter 330 and the output node N _OUT (or output terminal) of the symbol tracking modulator 300. SPT control circuit 310, based on the trigger signal Trigger_SPT, generates a first switching control signal SW_CS _a and the second switching control signal SW_CS _b, to provide to the first switch element SW _a and the second switching element SW _b, respectively . The switch circuit 340 alternately selects the first supply voltage V _OUTa and the second supply voltage V _OUTb based on the switching control signals (SW_CS _a , SW_CS _b ), and selects the selected supply voltage Vsel via the output node N _OUT. (Voltage V _SPT of output node N _OUT ) is provided to a power amplifier (PA). In order to prevent a sudden voltage blank during a switching operation via the switch circuit 340, the output capacitor element C _SPT is connected to the output node N _OUT .

  FIG. 6 is a diagram illustrating a signal diagram required for the symbol tracking modulator of FIG. 5 to perform its operation. In the following, it is assumed that the symbol group unit includes only one symbol.

Referring to FIGS. 5 and 6, in the first symbol period SB_0 (the period between the “t0” time point and the “t1” time point), the SPT control circuit 310 maintains a constant level based on the symbol tracking signal TS_SPT. The first reference voltage V _REFa is _supplied to the first DC-DC converter 320, and the first switching control signal SW_CSa having a high level is supplied to the first switch element based on the trigger signal Trigger_SPT received at time “t0”. The first supply voltage V _OUTa provided to SW _a and generated by the first DC-DC converter 320 is provided to the power amplifier (PA) as the selected supply voltage Vsel (the voltage V _SPT of the output node N _OUT ). In the first symbol period SB_0, the SPT control circuit 310 provides the second DC-DC converter 330 with the second reference voltage V _REFb whose level is changed at the time “ta” based on the symbol tracking signal TS_SPT. based on the trigger signal Trigger_SPT received at "t0" time point, the second switching control signal SW_CSb with low level, providing a second switching element SW _b, second supply generated by the 2DC-DC converter 330 The level of the voltage V _OUTb is changed.

In the second symbol period SB_1 (the period between the “t1” time point and the “t2” time point), the SPT control circuit 310 generates the second reference voltage V _REFb that maintains a constant level based on the symbol tracking signal TS_SPT. Based on the trigger signal Trigger_SPT that is provided to the second DC-DC converter 330 and received at time “t1”, the second switching control signal SW_CS _b having a high level is provided to the second switch element SW _b , and the second DC-DC converter 330 is provided. The second supply voltage V _OUTb generated by the DC converter 330 is provided to the power amplifier (PA) as the selected supply voltage Vsel (the voltage V _SPT of the output node N _OUT ). In the second symbol period SB_1, the SPT control circuit 310 provides the first DC-DC converter 320 with the first reference voltage V _REFa whose level is changed at the time “tb” based on the symbol tracking signal TS_SPT. based on the trigger signal Trigger_SPT received at "t1" time, the first switching control signal SW_CS _a having a low level, to provide to the first switch element SW _a, first generated in the 1 DC-DC converter 320 1 The level of the supply voltage V _OUTa is changed.

In the third symbol period SB_2 (the period between the “t2” time point and the “t3” time point), the SPT control circuit 310 generates the first reference voltage V _REFa that maintains a constant level based on the symbol tracking signal TS_SPT. providing to a 1DC-DC converter 320, based on a trigger signal Trigger_SPT received at "t2" the time, the first switching control signal SW_CS _a having a high level, to provide to the first switch element SW _a, the 1DC The first supply voltage V _OUTa generated by the DC converter 320 is provided to the power amplifier (PA) as the selected supply voltage Vsel (the voltage V _SPT of the output node N _OUT ). In the third symbol period SB_2, the SPT control circuit 310 provides the second DC-DC converter 330 with the second reference voltage V _REFb whose level is changed at the time “tc” based on the symbol tracking signal TS_SPT. based on the trigger signal Trigger_SPT received at "t2" the time, the second switching control signal SW_CS _b having a low level, providing a second switching element SW _b, first generated in the 2DC-DC converter 330 2 The level of the supply voltage V _OUTb is changed.

In the fourth symbol period SB_3 (the period between the “t3” time point and the “t4” time point), the SPT control circuit 310 generates the second reference voltage V _REFb that maintains a constant level based on the symbol tracking signal TS_SPT. Based on the trigger signal Trigger_SPT that is provided to the second DC-DC converter 330 and received at time “t3”, the second switching control signal SW_CS _b having a high level is provided to the second switch element SW _b , and the second DC The second supply voltage V _OUTb generated by the DC converter 330 is provided to the power amplifier (PA) as the selected supply voltage Vsel (the voltage V _SPT of the output node N _OUT ). In the fourth symbol period SB_3, the SPT control circuit 310 provides the first DC-DC converter 320 with the first reference voltage V _REFa whose level is changed at the time “td” based on the symbol tracking signal TS_SPT. based on the trigger signal Trigger_SPT received at time "t3", the first switching control signal SW_CS _a having a low level, to provide to the first switch element SW _a, first generated in the 1 DC-DC converter 320 1 The level of the supply voltage V _OUTa is changed.

In the above-described manner, the symbol tracking modulator 300 alternately selects the first supply voltage V _OUTa and the second supply voltage V _OUTb for each symbol _period (the voltage V _SPT of the output node N _OUT ). The supply voltage that is not selected is subjected to a symbol power tracking modulation operation by changing the voltage level in advance.

  FIG. 7A is a circuit diagram illustrating a symbol tracking modulator capable of fast charge control according to an embodiment of the present invention, and FIG. 7B is a block diagram for explaining the operation of a fast charge control circuit that performs fast charge control. It is.

Referring to FIG. 7A, the symbol tracking modulator 300 ′ includes a first current source IS ₁ , a second current source IS ₂ , a first fast charge control switch SW _UP , compared to the symbol tracking modulator 300 of FIG. and further comprising a second fast-charge control switch _{SW DN.} In one embodiment, the first current source IS ₁ can quickly charge the output node N _OUT before the first switch element SW _a or the second switch element SW _b is turned on, thereby causing the voltage at the output node N _OUT to V _SPT may be close to the first supply voltage V _OUTa of the output node N _a of the first DC-DC converter 320 ′ or the second supply voltage V _OUTb of the output node N _b of the second DC-DC converter 330 ′ in _advance. I arrive. The second current source IS ₂ discharges the output node N _OUT rapidly before the first switch element SW _a or the second switch element SW _b is turned on, so that the voltage V _SPT of the output node N _OUT is The first supply voltage V _{OUTa at} the output node N _a of the first DC-DC converter 320 ′ or the second supply voltage V _OUTb at the output node N _b of the second DC-DC converter 330 ′ is _approached . Charging / discharging control for the output node N _OUT via the first current source IS ₁ and the second current source IS ₂ is defined as fast charge control. That is, the voltage V _SPT of the output node N _OUT is obtained through the configuration of the first current source IS ₁ , the second current source IS ₂ , the first fast charge control switch SW _UP , and the second fast charge control switch SW _DN , Rapidly _approaching the first supply voltage V _OUTa or the second supply voltage V _OUTb , thereby reducing the time taken for the voltage V _{SPT at the} output node N _OUT to transition to the target voltage. In addition, when the switch elements (SW _a , SW _b ) are connected, a rush current generated due to a large voltage difference between the output node N _OUT and a different output node (N _a , N _b ) is prevented. To do.

Referring to FIG. 7B, the symbol tracking modulator 300 ′ further includes a fast charge control circuit 350 ′ compared to the symbol tracking modulator 300 of FIG. The first charge control circuit 350 ′ is responsive to a trigger signal TICK that triggers a symbol power transition, for example, a first supply voltage V _OUTa or a second supply voltage V _OUTb , Based on the difference from the voltage V _SPT of the output node N _OUT , one of the first fast charge switching control signal UP and the second fast charge switching control signal DN is generated, and the first fast charge control switch SW and outputs to any one of the _UP and the second fast-charge control switch _{SW DN.} The first charge control circuit 350 ′ detects whether or not the voltage V _SPT of the output node N _OUT is charged or discharged so as to be close to the target voltage. Fast-charge control circuit 350 ', the output node _N when the voltage _{V SPT} of _OUT detects that close to the target voltage, SPT control circuit 310' first switching element SW _a or the second switching element SW _b ON / OFF The enable signal SWAP_EN is provided to the SPT control circuit 310 ′ so as to generate the switching control signals SW_CS _a and SW_CS _b for controlling.

The configuration for fast charge control shown in FIGS. 7A and 7B is merely an exemplary embodiment, but is not limited thereto, and the voltage at the output node N _OUT that tracks rapid changes in symbol power. Various configurations for generating V _SPT and preventing inrush current are applicable.

  FIG. 8 is a block diagram illustrating a modem according to an embodiment of the present invention.

  Referring to FIG. 8, the modem 110 includes a baseband processor 112 and an SPT control module 114. The SPT control module 114 is software executed by the baseband processor 112 and is stored in a predetermined memory area in the modem 110. Further, the SPT control module 114 is implemented by hardware, and controls the symbol power tracking modulation operation separately from the baseband processor 112.

  In one embodiment, the SPT control module 114 includes a 5G frame configuration infrastructure control module 114a and a communication environment infrastructure control module 114b. The baseband processor 112 executes the 5G frame configuration infrastructure control module 114a, determines (or changes) the number of symbols included in each symbol group based on the frame configuration in the 5G system, and determines the determined symbol group Based on the unit, a symbol tracking signal and a trigger signal are generated. Also, the baseband processor 112 executes the communication environment infrastructure control module 114b, and the number of symbols included in the symbol group unit based on at least one of the parameters indicating the communication environment between the base station and the wireless communication device. Are determined (or changed), and a symbol tracking signal and a trigger signal are generated based on the determined symbol group unit.

  However, this is merely an exemplary embodiment, and the present invention is not limited to this. The baseband processor 112 periodically changes symbol group units in various ways based on various parameters.

  FIG. 9 is a diagram illustrating a 5G-based frame configuration for explaining a method of determining a symbol group unit based on a 5G frame configuration, and FIG. 10 determines a symbol group unit based on a communication environment. It is a flowchart for demonstrating the method to do.

  Referring to FIG. 9, one subframe (or radio frame) includes a plurality of slots. As an example, one subframe includes 10 slots. One slot includes a plurality of symbols. As an example, one slot includes seven symbols. However, this is an exemplary embodiment, and a slot includes different numbers of symbols depending on a unit interval between subcarriers for 5G wireless communication, that is, a subcarrier spacing size. Also, at least one symbol included in one slot is divided into mini-slots, and the mini-slot is defined as one unit for 5G-based low latency communications. The baseband processor 112 in FIG. 8 determines (or changes) the symbol group unit so as to correspond to the number of symbols included in the minislot.

  Referring to FIG. 10, the baseband processor 112 of FIG. 8 acquires communication environment information based on at least one of parameters indicating the communication environment (step S100). In one embodiment, the parameter indicating the communication environment is a parameter indicating the channel state between the base station and the wireless communication device. For example, the parameter indicating the communication environment is related to channel quality information (channel quality indicator). . Further, the baseband processor 112 acquires communication environment information based on the system information and control information received from the base station. The baseband processor 112 determines (or changes) the number of symbols included in the symbol group unit based on the acquired communication environment information (step S120). The baseband processor 112 controls the symbol power tracking modulation operation based on the determined symbol group unit (step S140).

  FIG. 11 is a diagram illustrating a signal diagram required for the symbol tracking modulator of FIG. 5 to perform its operation. In FIG. 11, unlike FIG. 6, it is assumed that the symbol group unit includes two symbols.

Referring to FIGS. 5 and 11, in the first symbol group period SBG_0 (the period between the “t0” time point and the “t2” time point), the SPT control circuit 310 sets a certain level based on the symbol tracking signal TS_SPT. a first reference voltage _{V REFa} to maintain, and provide to the 1 DC-DC converter 320, based on a trigger signal Trigger_SPT received at "t0" time point, the first switching control signal SW_CS _a having a high level, the first The first supply voltage V _OUT a provided to the switch element SW _a and generated by the first DC-DC converter 320 is provided to the power amplifier (PA) as the selected supply voltage Vsel (the voltage V _SPT of the output node N _OUT ). To do. In the first symbol group period SBG_0, the SPT control circuit 310 provides the second DC-DC converter 330 with the second reference voltage V _REFb whose level is changed at the time “t′a” based on the symbol tracking signal TS_SPT. Then, based on the trigger signal Trigger_SPT received at time “t0”, the second switching control signal SW_CS _b having a low level is provided to the second switch element SW _b and is generated by the second DC-DC converter 330. The level of the second supply voltage V _OUTb is changed.

In the second symbol group period SBG_1 (the period between the “t2” time point and the “t4” time point), the SPT control circuit 310 sets the second reference voltage V _REFb that maintains a constant level based on the symbol tracking signal TS_SPT. The second switching control signal SW_CS _b having a high level is provided to the second switch element SW _b based on the trigger signal Trigger_SPT that is provided to the second DC-DC converter 320 and received at time “t2”. The second supply voltage V _OUTb generated by the _2DC -DC converter 330 is provided to the power amplifier (PA) as the selected supply voltage Vsel (the voltage V _SPT of the output node N _OUT ). In the second symbol group period SBG_1, the SPT control circuit 310 provides the first DC-DC converter 320 with the first reference voltage V _REFa whose level is changed at the time “t′b” based on the symbol tracking signal TS_SPT. Then, based on the trigger signal Trigger_SPT received at time “t2”, the first switching control signal SW_CS _a having a low level is provided to the first switch element SW _a and is generated by the first DC-DC converter 320. The level of the first supply voltage V _OUTa is changed.

  Since the description regarding the third symbol group section SBG_2 and the fourth symbol group section SBG_3 is the same as the above-described content, the description is omitted below.

  FIG. 12 is a circuit diagram illustrating a symbol tracking modulator according to an embodiment of the present invention.

Referring to FIG. 12, the symbol tracking modulator 300 ″ includes an SPT control circuit 310 ″, a first DC-DC converter 320 ″, a second DC-DC converter 330 ″, a switch circuit 340 ″, and an output capacitor element C _SPT . The first DC-DC converter 320 ″ and the second DC-DC converter 330 ″ support a DVS (dynamic voltage scaling) function. The first DC-DC converter 320 ″ includes a first conversion control circuit 322 ″ and a first comparator. 324 ″, a plurality of switch elements (SW _C1 , SW _C2 ), an inductor element L _a , and a capacitor element C ″ _a . The second DC-DC converter 330 ″ includes a second conversion control circuit 332 ″ and a second comparator. 334 ", a plurality of switching elements _(SW C3, SW _C4), the inductor element L _b, and _{"containing b.} Switch circuit 340" capacitor element C includes a plurality of switching elements _{(SW a1, SW a2, SW} b1, SW b2).

The switch circuit 340 ″ of FIG. 12 is different from the connection configuration of the switch circuit 340 of FIG. 6. In one embodiment, the first switch element SW _a1 and the second switch element SW _a2 are connected in series with each other, and The switch element SW _b1 and the fourth switch element SW _b2 are connected in series, and the first switch element SW _a1 and the second switch element SW _a2 are the third switch element SW _b1 and the fourth switch element SW _b2. The SPT control circuit 310 ″ generates a plurality of switching control signals (SW_CS _a1 , SW_CS _a2 , SW_CS _b1 , SW_CS _b2 ) based on the trigger signal Trigger_SPT and provides it to the switch circuit 340 ″. The operation of the symbol tracking modulator 300 ″ has been described in detail with reference to FIG. Therefore, the description is omitted below.

  FIG. 13 is a diagram showing a signal diagram necessary for the symbol tracking modulator of FIG. 12 to perform its operation. In the following, it is assumed that the symbol group unit includes only one symbol.

Referring to FIG. 12 and FIG. 13, in the first symbol period SB_0 (the period between the “t0” time point and the “t1” time point), the SPT control circuit 310 ″ has a constant level based on the symbol tracking signal TS_SPT. The first reference voltage V _REFa to be maintained is provided to the first DC-DC converter 320 ″, and the first switching control signal SW_CS _a1 having a high level is generated based on the trigger signal Trigger_SPT received at time “t0”. The first switching element SW _a1 is provided with a second switching control signal SW_CS _a2 having a low level, and the second switching element SW _a2 is provided with the first supply voltage V _OUTa generated by the first DC-DC converter 320 ″. , as a selection supply voltage Vsel (voltage _{V SPT} output node), be provided to the power amplifier (PA) . In the first symbol interval SB_0, SPT control circuit 310 ', based on the symbol tracking signal TS_SPT, "t" a "the second reference voltage _{V REFb} level at the time is changed, the 2DC-DC converter 330" The third switching control signal SW_CS _b1 having a low level is provided to the third switch element SW _b1 based on the trigger signal Trigger_SPT received at time “t0”, and low at time “t” a ”. The fourth switching control signal SW_CS _b2 changed from the level to the high level is provided to the fourth switch element SW _b2, and the level of the second supply voltage V _OUTb generated by the second DC-DC converter 330 ″ is changed.

In the second symbol interval SB_1 (the interval between the “t1” time point and the “t2” time point), the SPT control circuit 310 ″ has the first level changed at the “t1” time point based on the symbol tracking signal TS_SPT. The reference voltage V _REFa is provided to the first DC-DC converter 320 ″, and the first switching control signal SW_CS _a1 having a low level is supplied to the first switch element SW based on the trigger signal Trigger_SPT received at time “t1”. The second switching control signal SW_CS _a2 that is provided to _a1 and is changed from the low level to the high level at time “t ″ b” is provided to the second switch element SW _a2 and is generated by the first DC-DC converter 320 ″. first to change the level of the supply voltage _{V OUTa} that in. the second symbol period SB_1, SPT control circuit 31 "On the basis of the symbol tracking signal TS_SPT," t "the second reference voltage _{V REFb} to b" level at the time is changed, and provided to a 2DC-DC converter 330 "is received by" t1 "time Based on the trigger signal Trigger_SPT, the third switching control signal SW_CS _b1 having a high level is provided to the third switching element SW _b1 , and the fourth switching control signal SW_CS _b2 having a low level is supplied to the fourth switching element SW _b2 . The second supply voltage V _OUTb generated by the second DC-DC converter 330 ″ is provided to the power amplifier (PA) as the selected supply voltage Vsel (the output node voltage V _SPT ).

  The description related to the third symbol section SB_2 and the fourth symbol section SB_3 is the same as described above, and will be omitted below.

  FIG. 14 is a block diagram illustrating a symbol tracking modulator according to an exemplary embodiment of the present invention, and FIG. 15 is a circuit diagram illustrating a first SIMO (single inductor multiple output) converter of FIG.

Referring to FIG. 14, the symbol tracking modulator 400 includes an SPT control circuit 410, a first SIMO converter 420, a second SIMO converter 430, and a switch circuit 440. Further, referring to FIG. 15, the first SIMO converter 420 includes a SIMO conversion control circuit 422, a plurality of comparators (424_1 to 424_n), a plurality of voltage generation circuits (426_1 to 426_n), an inductor L, and a switch element (SW _C1). , SW _C2 ). The first SIMO converter 420 generates a plurality of voltages having different levels and outputs the voltages through output nodes (N _{a1 to} N _an ) of the voltage generation circuits (426_1 to 426_n).

Each voltage generation circuit (426_1 to 426_n) includes a switching element (SW _{a1 to} SW _an ) and a capacitor (C _{1 to} C _n ). In one embodiment, each voltage generation circuit (426_1 to 426_n) includes capacitors having different capacitances and different loads. Each of the comparators (424_1 to 424_n) receives a feedback signal from the reference voltage (V _{REF1 to} V _REFn ) and the output node (N _{a1 to} N _an ) of the voltage generation circuit (426_1 to 426_n), and receives a control signal. Is generated and provided to the SIMO conversion control circuit 422.

In one embodiment, the SIMO conversion control circuit 422 generates a switching control signal for controlling on / off of the switch elements (SW _{a1 to} SW _an ) based on the first voltage level control signal VL_CSa, and the switch element ( SW _{a1 to} SW _an ) changes the level of the first supply voltage V _OUTa generated by the first SIMO converter 420. That is, the symbol power tracking modulation operation according to an embodiment of the present invention is performed using the first SIMO converter 420 that does not support the DVS function.

Returning to FIG. 14 again, the SPT control circuit 410 generates the switching control signal SW_CS based on the trigger signal Trigger_SPT and provides it to the switch circuit 440 to provide the first supply voltage V _OUTa of the first SIMO converter 420 and the second SIMO. The second supply voltage V _OUTb of the converter 430 is alternately selected. The other operations of the symbol tracking modulator 400 have been specifically described with reference to FIG.

  16 and 17 are block diagrams illustrating other implementation examples of the symbol tracking modulator according to an exemplary embodiment of the present invention.

  Referring to FIG. 16, the symbol tracking modulator 500 includes an SPT control circuit 510, a DC-DC converter 520, a linear amplifier (LA) 530, and a switch circuit 540. That is, the voltage supply circuit (220, 230) of FIG. 4A is implemented with different types of circuits, and any one of the voltage supply circuits (220, 230) is implemented as the linear amplifier 530.

Referring to FIG. 17, the symbol tracking modulator 600 includes more voltage supply circuits (620_1 to 620_m) compared to FIG. 4A. The SPT control circuit 610 sequentially selects the supply voltages (V _{OUT1 to} V _OUTm ) generated by the voltage supply circuits (620_1 to _{620_m} ) as the selection supply voltage Vsel based on the trigger signal Trigger_SPT. The SPT control circuit 610 Based on the symbol tracking signal TS_SPT, the level of the unselected supply voltage is changed.

  The operation of the symbol tracking modulator (500, 600) shown in FIGS. 16 and 17 has been described in detail with reference to FIG.

  FIG. 18 is a block diagram illustrating a wireless communication apparatus according to an embodiment of the present invention.

  Referring to FIG. 18, as an example of a communication apparatus, a wireless communication apparatus 1000 includes an application specific integrated circuit (ASIC) 1010, an application specific instruction processor (ASIP) 1030, a memory 1050, a main power 10 A tracking amplification system 100 ′ is included. The symbol power tracking amplification system 100 'assists the wireless communication device 1000 with the symbol power tracking modulation technique according to an embodiment of the present invention.

  Two or more of the ASIC 1010, the ASIP 1030, and the main processor 1070 communicate with each other. Also, at least two or more of the ASIC 1010, the ASIP 1030, the memory 1050, the main processor 1070, and the main memory 1090 are built in one chip.

  The ASIP 1030 is an integrated circuit customized for a specific application, supports a dedicated instruction word set for a specific application, and executes an instruction word included in the instruction word set. The memory 1050 communicates with the ASIP 1030 and stores a plurality of instruction words executed by the ASIP 1030 as a non-temporary storage device, and in some embodiments stores the SPT control module 114 of FIG. The memory 1050 includes, as non-limiting examples, random access memory (RAM), read-only memory (ROM), tape, magnetic disk, optical disk, volatile memory, non-volatile memory, and combinations thereof, It includes any type of memory accessible by ASIP 1030. The ASIP 1030 or main processor 1070 controls the symbol power tracking modulation operation by executing a series of instructions stored in the memory 1050.

  The main processor 1070 controls the wireless communication apparatus 1000 by executing a plurality of command words. For example, the main processor 1070 controls the ASIC 1010 and the ASIP 1030, processes data received via the wireless communication network, and processes user input to the wireless communication device 1000. The main memory 1090 communicates with the main processor 1070 and stores a plurality of instruction words executed by the main processor 1070 as a non-temporary storage device.

  FIG. 19 is a block diagram illustrating a phased array antenna module according to an embodiment of the present invention. The following description focuses on the symbol array tracking module 2000 performing symbol power tracking modulation suitable for 5G communication, but this is only an exemplary embodiment, and the present invention is not limited thereto. The technical idea of the present invention is also applied to the power tracking scheme.

Referring to FIG. 19, the phased array antenna module 2000 includes a power management integrated circuit (PMIC) 2100 and a phased array transceiver 2200. The PMIC 2100 includes two DC-DC converters (2110, 2120) (hereinafter referred to as a buck converter), a 1.1 VLDO (linear drop out) linear regulator 2130, an auxiliary LDO 2140, a fast charge / discharge current source 2150, and a reference voltage generator 2160. , Controller 2170, multiplexer 2180, multiple capacitors (C _1.1V , C _1.3V , C _L1 , C _L2 ), multiple SPT switches (SW _L1 , SW _L2 , SW _SD1 , SW _SD2 ), and SIDO (single -An inductor dual-output) switch SW _SIDO . The first buck converter 2110 is implemented to perform the operations of the first voltage supply circuit 220 and the second voltage supply circuit 230 of FIG. 4A. The second buck converter 2120 is implemented to perform precharge or predischarge by matching the load capacitors (C _L1 and C _L2 ) with the timing of the symbol power tracking operation. Meanwhile, the SPT switches (SW _L1 , SW _L2 , SW _SD1 , SW _SD2 ) are also implemented to provide the phased array transceiver 2200 with a supply voltage V _SPT that matches the symbol power tracking operation.

  The controller 2170 includes a Mobile Industry Processor Interface (MIPI) slave 2172, a main controller 2174, an FFC 2176, and an internal clock source 2178. The phased array transceiver 2200 includes two transceiving circuits (2210_a, 2210_b), a microcontroller unit (MCU) 2220, a MIPI master 2230, and an internal LDO 2240. The transceiving circuit (2210_a, 2210_b) includes a plurality of antennas Ants, a plurality of RF circuits RF_CKTs, a mixer (MIX_a, MIX_b), and an interface circuit Interface_CKTa. The RF circuit RF_CKTs includes a transceiver switch TRXSWa, a low noise amplifier LNA, a power amplifier PA, a plurality of mixers (MIX_a, MIX_b), a plurality of filters (FT_a, FT_b), and a plurality of phase shifters PS. The transceiving circuits (2210_a, 2210_b) are coupled to IF circuits (IF_CKT_a, IF_CKT_b) of an IF (intermediate frequency) transceiver. The transceiving circuit (2210_a, 2210_b) converts the RF signal received via the antenna Ants downward to the IF band and provides the IF signal to the IF transceiver.

  The IF circuits (IF_CKT_a, IF_CKT_b) each include a transceiver switch TRX SWb, a low noise amplifier LNA, a power amplifier PA, a plurality of mixers (MIX_c, MIX_d), a plurality of filters (FT_c, FT_d), and an interface circuit Interface_CKTb. The IF circuit (IF_CKT_a, IF_CKT_b) converts the received IF signal downward in frequency to the baseband and provides it to the 5G modem.

  After the power-on reset signal is generated by the external digital supply, a digital communication channel by a mobile industry processor interface (MIPI) between the controller 2170 and the phased array transceiver 2200 is prepared. That is, a digital communication channel between MIPI master 2230 and MIPI slave 2172 is prepared.

  The MCU 2220 generates a timing signal Tick (or a trigger signal) at every CP (cyclic prefix) start time in order to accurately synchronize with transmission power update (transmission power update) timing and SPT (symbol power tracking) transition timing. Generate. On the other hand, the MCU 2220 provides the data DATA, the clock signal CLK, and the timing signal Tick necessary for the symbol power tracking operation of the PMIC 2100 to the MIPI slave 2172 and the main controller 2174 of the controller 2170 via the MIPI master 2230.

  The MIPI slave 2172 receives the data DATA and the clock signal CLK, and provides a signal generated based on the data DATA and the clock signal CLK to the reference voltage generator 2160. The reference voltage generator 2160 is connected to one of the second buck converter 2120 and the auxiliary LDO 2140 via a first DAC (digital analog converter) (DAC1) connected to the first buck converter 2110 and the multiplexer 2180. A second DAC (DAC2) that is selectively connected is included.

The main controller 2174 receives an internal clock signal from the internal clock source 2178 and feeds back a supply voltage (V _SPT , V _o1.3V ) and a load capacitor voltage (V _C1 , V _C2 ). Based on the received voltage (V _SPT , V _o1.3V , V _C1 , V _C2 ) and the internal clock signal, the main controller 2174 activates the enable signal Enables for the fast charge / discharge current source 2150, the buck converter (2110, 2120 ) Using the mode selection signal Mode Sel. , Reference voltage generator 2160 DAC selection signal DAC Sel. And a switch control signal Cap. Generate a Swap.

  Note that an FFC (fixed frequency controller) 2176 controls the frequency of the buck converter (2110, 2120) to be constant. That is, the buck converter (2110, 2120) according to the exemplary embodiment of the present invention is not synchronized to the reference clock when operating in the hysteretic control mode, but the frequency of the buck converter (2110, 2120) is PVT. The FFC 2176 changes the first FFC signal FFC <b> 1 and the second FFC signal FFC <b> 2 generated based on the internal clock signal to the back converter (2110, 2120) in order to change according to the change condition and operation condition of (process, voltage, temperature). By providing each, the frequency of a buck converter (2110, 2120) is controlled to be constant.

For the symbol power tracking operation according to one embodiment, two control schemes related to the capacitor capacitor swapping between the load capacitors (C _L1 , C _L2 ) and the fast charge / discharge operation for the output capacitor C _SPT are described in the PMIC 2100. Applies to Specifically, capacitor swapping is performed when the second buck converter BK _SIDO is used for precharging or pre-discharging the load capacitors (C _L1 , C _L2 ) in the symbol power tracking operation according to an embodiment of the present invention. It means an operation for controlling the selective connection to (C _L1 , C _L2 ). The first charge / discharge operation uses the first charge / discharge current source 2150 and has been described with reference to FIGS. 7A and 7B.

  Since the phased array transceiver 2200 consumes a large supply current at 1.1V, 1.3 VDC-DC back conversion is required for efficient sub-regulation by 1.1 VLDO 2130 due to SIDO operation. The second buck converter 2120 is also embodied.

  20A and 20B are diagrams illustrating a symbol power tracking operation using single-inductor dual-output (SIDO) according to an embodiment of the present invention. The configuration of the PMIC 2100 in FIG. 20A has been described with reference to FIG.

Referring to FIG. 20A, the first buck converter 2110 receives two data from the 5G modem to enable symbol power tracking operation. One is data related to the power level of the next symbol, and the other is data related to the CP start time. The second buck converter 2120 precharges or precharges the auxiliary capacitors (C _L1 , C _L2 ) based on the power level data within a predetermined current symbol duration (eg, 4.16 μs). To do. When the first buck converter 2110 performs the symbol power tracking operation and the second buck converter 2120 performs the precharge operation, instead of the power source for the 1.3V supply voltage, the auxiliary LDO 2140 (FIG. 19) In the feedback loop, the 1.3V voltage starts to be regulated smoothly and supplies the current necessary for precharging or pre-discharging the auxiliary capacitors (C _L1 , C _L2 ). When the precharge operation for the auxiliary capacitors (C _L1 , C _L2 ) is completed, the second buck converter 2120 further adjusts the 1.3 VDC output for sub-regulation of 1.1VLDO 2130 (FIG. 19). To do. After the second buck converter 2120 receives the CP start time signal, the two load capacitors (C _L1 , C _L2 ) are disconnected from the V _SPT output, and the fast charge / discharge current source 2150 is connected to the fast charge controller 2175. Under control, the output capacitor C _SPT is quickly charged or discharged. When the voltage difference between the output capacitor C _SPT and the first load capacitor C _L1 or the second load capacitor C _L2 is within a threshold value, the first charge controller 2175 generates a swap trigger signal SWAP_EN, In response to the trigger signal SWAP_EN, the output capacitor C _SPT is connected to one of the first load capacitor C _L1 and the second load capacitor C _L2 .

In the symbol power tracking operation according to an embodiment of the present invention, the output capacitor C _SPT is quickly charged or discharged, and the second back converter 2120 precharges or predischarges the load capacitors (C _L1 , C _L2 ), When the difference is less than the critical value, the transition end within 290 ns is guaranteed by performing the capacitor swapping operation between the V _SPT output and the load capacitors (C _L1 , C _L2 ), and the high inrush (inrush) is achieved. ) Has the effect of preventing current.

Referring to FIG. 20B, the first buck converter BK _SPT responds to the first trigger signal Tick and applies the first load capacitor C _L1 having the voltage of the first level LV ₁ to the first uplink symbol UL Symbol1. At V _SPT output. Through this, the supply voltage V _SPT of the first level LV ₁ is provided to the power amplification array (PA array) in the section corresponding to the first uplink symbol UL Symbol1. Also, the first buck converter BK _SPT generates a second load capacitor voltage V _C2 at the second level LV ₂ in response to the “PWL _S1 ” signal. The output load capacitance of the PMIC 2100 in the section corresponding to the first up ring symbol UL Symbol 1 is determined by the sum of the capacitance of the first load capacitor C _{L1 and} the capacitance of the output capacitor C _SPT .

On the other hand, the first charge controller 2175 responds to the second trigger signal Tick and fast linear charging the output capacitor C _SPT so that the level of the supply voltage V _SPT is charged at the second level LV _2. ) Control the operation. The output load capacitance of the PMIC 2100 in the first linear charging operation period is determined by the capacitance of the output capacitor C _SPT .

The main controller 2174 is responsive to the second trigger signal Tick, and the second load capacitor having a voltage of the second level LV ₂ when the voltage difference between the output capacitor C _SPT and the second load capacitor C _L2 is less than the critical value. C _L2 is connected to the V _SPT output in the interval corresponding to the second uplink symbol UL Symbol2. Accordingly, the supply voltage V _SPT of the second level LV ₂ is provided to the power amplification array (PA array) in a section corresponding to the second uplink symbol UL UL 2. In addition, the first buck converter BK _SPT generates a first load capacitor voltage V _C1 of the third level LV ₃ in response to the “PWL _S2 ” signal, and the second buck converter BK _SID0 generates the first load capacitor C _L1. Free charge. The output load capacitance of the PMIC 2100 in the section corresponding to the second up ring symbol UL Symbol 2 is determined by the sum of the capacitance of the second load capacitor C _{L2 and} the capacitance of the output capacitor C _SPT .

On the other hand, the first charge controller 2175 responds to the third trigger signal Tick and performs fast linear discharging on the output capacitor C _SPT such that the level of the supply voltage V _SPT is discharged at the third level LV _3. ) Control the operation. The output load capacitance of the PMIC 2100 in the first linear discharging operation period is determined by the capacitance of the output capacitor C _SPT .

The main controller 2174 is responsive to the third trigger signal Tick, and the first load capacitor having a voltage of the third level LV ₃ when the voltage difference between the output capacitor C _SPT and the first load capacitor C _L1 is less than a critical value. C _L1 is connected to the V _SPT output in the interval corresponding to the third uplink symbol UL Symbol3. Through this, the supply voltage V _SPT of the third level LV ₃ is provided to the power amplification array (PA array) in the section corresponding to the third uplink symbol UL Symbol 3. In addition, the first buck converter BK _SPT can generate a second load capacitor voltage V _C2 of the first level LV ₁ in response to the “PWL _S3 ” signal, and the second buck converter BK _SID0 Capacitor C _L2 can be pre-discharged. The output load capacitance of the PMIC 2100 in the interval corresponding to the third up ring symbol UL Symbol3 is determined by the sum of the capacitance of the first load capacitor C _{L1 and} the capacitance of the output capacitor C _SPT .

  FIG. 21 is a block diagram illustrating a PMIC including two buck converters supporting a ripple-injected hysteresis control function according to an embodiment of the present invention.

Referring to FIG. 21, PMIC3000 the first buck converter 3100, second buck converter 3200, an auxiliary LDO3300, a plurality of switches _{(SW SIDO, SW SD1, SW} SD2, SW L1, SW L2), and a plurality of capacitors (C _1.3V , C _L1 , C _L2 , C _SPT ). The first buck converter _{3100, M P1 transistor, M N1} transistor, a gate driver, SPT inductor _{L SPT,} the variable resistor _{R r1,} a plurality of resistors _{(R f1a, R f1b, R} f1c, R f1d), a plurality of capacitors (C _ac1 , C _r1 , C _f1 ), DAC, buffer BUF, and switch DPC ₁ for dynamic precharge control. The second buck converter _{3200, M P2 transistor, M N2} transistor, a gate driver, SIDO inductor _{L SIDO,} a variable resistor _{R r2,} a plurality of resistors _{(R f2a, R f2b, R} f2c, R f2d), a plurality of capacitors (C _ac2 , C _r2 , C _f2 ), DAC, buffer BUF, switch DPC ₂ for operation precharge control, multiple feedback selection switches for connection with load capacitors (C _1.3V , C _L1 , C _L2 ) (FSS _1.3V , FSS _C1 , FSS _C2 ). The auxiliary LDO3300 includes comparator COMP, the feedback block FB, and _{M P3} transistor.

  As shown in FIG. 21, a feedback input that changes rapidly is obtained through the configuration of the first buck converter 3100 and the configuration of the second buck converter 3200, while ensuring the stability of the loop and the smooth transition. Even so, the target output of the buck converter (3100, 3200) is stabilized. That is, the first buck converter 3100 and the second buck converter 3200 smoothly perform the SPT operation and the SIDO operation, respectively.

In the first buck converter 3100 and the second buck converter 3200 according to an embodiment, a dynamic precharge control method is applied to a hysteretic feedback loop through some switches (DPC ₁ and DPC ₂ ). A feed-forward path is formed directly at the internal compensation node at the output for only the SPT transition time or the SIDO transition time. Through the above-described dynamic precharge control method, the loop response time can be shortened within a predetermined time. According to the SPT operation and SIDO operation scenarios, an appropriate reference voltage is generated for each back regulation via a reference voltage generator included in the buck converter (3100, 3200). The reference voltage generator includes two DACs, two buffers BUF, and a track and hold circuit.

  The hysteretic control generates a variation of the output switching frequency according to the ratio of the input to the output, and this variation is modulated into a PA transmission signal, and as an unwanted spurious spectrum. Indicated.

In order to compensate for noise attenuation due to the selected LC filter when there is a change in PVT (process, voltage, temperature), the switching frequency controller is also applied to the hysteretic controller with a simple frequency locked loop.

  Although the present invention has been described with reference to the embodiments shown in the drawings, they are merely exemplary and various modifications and equivalents will occur to those skilled in the art from those skilled in the art. It will be appreciated that other embodiments are possible. Therefore, the technical scope of the present invention is not limited to these embodiments.

  The symbol power tracking amplification system and the wireless communication apparatus including the symbol power tracking amplification system according to the present invention can be effectively applied to, for example, a technical field related to wireless communication.

100, 1000 Wireless communication device 100 'Symbol power tracking amplification system 110 Modem 112 Baseband processor 114 SPT control module 114a 5G frame configuration infrastructure control module 114b Communication environment infrastructure control module 130, 200, 300, 300', 300 ", 400, 500, 600 Symbol tracking modulator 133 Voltage supply 135, 240, 340, 340 ′, 340 ″, 440 ″, 540 Switch circuit 150 RF block 170 Power amplifier 210, 310, 310 ′, 310 ″, 410, 510, 610 SPT Control circuit 212, 214 Digital / analog conversion circuit (DAC)
220 First Voltage Supply Circuit 230 Second Voltage Supply Circuit 320, 320 ′, 320 ″ First DC-DC Converter 322, 322 ′, 322 ″ First Conversion Control Circuit 324, 324 ′, 324 ″ First Comparator 330, 330 ', 330 "Second DC-DC converter 332, 332', 332" Second conversion control circuit 334, 334 ', 334 "Second comparator 350' Fast charge control circuit 420 First SIMO converter 422 SIMO conversion control circuit 424_1-424_n Comparator 426_1-426_n Voltage generation circuit 430 Second SIMO converter 520 DC-DC converter 530 Linear amplifier 620_1-620_m Voltage supply circuit 1010 ASIC
1030 ASIP
1050 Memory 1070 Main processor 1090 Main memory 2000 Phase array antenna module 2100, 3000 PMIC
2110, 3100 (first) buck converter 2120, 3200 (second) buck converter 2130 1.1 VLDO linear regulator 2140, 3300 auxiliary LDO
2150 Fast Charge / Discharge Current Source 2160 Reference Voltage Generator 2170 Controller 2172 MIPI Slave 2174 Main Controller 2175 Fast Charge Controller 2176 FFC
2178 Internal clock source 2180 Multiplexer 2200 Phased array transceiver 2210_a, 2210_b Transceiving circuit 2220 Microcontroller unit (MCU)
2230 MIPI Master 2240 Internal LDO

Claims (25)

A symbol power tracking amplification system that supports symbol power tracking modulation comprising:
A power amplifier for amplifying an RF (radio frequency) signal;
A first supply voltage and a second supply voltage are generated based on a symbol tracking signal received from outside, and the first supply voltage and the second supply voltage are generated for each symbol group section corresponding to a symbol group unit including at least one symbol. A symbol power tracking amplification system comprising: a symbol tracking modulator that alternately supplies two supply voltages and provides the power amplifier with a supply voltage whose level can be changed for each symbol group section. The symbol tracking signal is
A first symbol tracking signal for controlling the level of the first supply voltage;
The symbol power tracking amplification system of claim 1, further comprising: a second symbol tracking signal for controlling a level of the second supply voltage.   The symbol power tracking amplification system according to claim 2, wherein a level change timing of the first symbol tracking signal is different from a level change timing of the second symbol tracking signal.   The symbol power according to claim 2, wherein an interval between a level change timing of the first symbol tracking signal and a level change timing of the second symbol tracking signal corresponds to a length of the symbol group unit. Tracking amplification system.   The symbol power tracking amplification system according to claim 1, wherein the number of the symbols included in the symbol group unit is variable. The symbol tracking modulator is
The trigger signal corresponding to the symbol group unit is further received from the outside, and the first supply voltage and the second supply voltage are alternately selected based on the trigger signal. Symbol power tracking amplification system. The symbol tracking modulator is
2. The symbol power tracking amplification system according to claim 1, wherein a level of the second supply voltage is changed based on the symbol tracking signal in a symbol group section in which the first supply voltage is selected. The symbol tracking modulator is
The symbol power tracking amplification system according to claim 1, wherein the level change of the supply voltage is performed in a CP (cyclic prefix) section of a first symbol included in the symbol group section. The symbol tracking modulator is
A first voltage supply circuit for generating the first supply voltage;
A second voltage supply circuit for generating the second supply voltage;
2. The switch circuit according to claim 1, further comprising: a switch circuit for selectively connecting one of the first voltage supply circuit and the second voltage supply circuit to the power amplifier. Symbol power tracking amplification system.   10. The symbol power tracking amplification system according to claim 9, wherein each of the first voltage supply circuit and the second voltage supply circuit is a DC-DC converter that supports a DVS (dynamic voltage scaling) function.   The symbol power tracking amplification system according to claim 9, wherein each of the first voltage supply circuit and the second voltage supply circuit is a single inductor multiple output (SIMO) converter. The first voltage supply circuit is a DC-DC converter that supports a DVS function,
The symbol power tracking amplification system according to claim 9, wherein the second voltage supply circuit is a linear amplifier. The switch circuit is
10. The symbol power according to claim 9, wherein in the first symbol group section, the first voltage supply circuit is connected to the power amplifier, and the connection between the second voltage supply circuit and the power amplifier is disconnected. Tracking amplification system. The second voltage supply circuit includes:
The symbol power tracking amplification system according to claim 13, wherein a level of the second supply voltage is changed in the first symbol group period based on the symbol tracking signal. The switch circuit is
15. The symbol according to claim 14, wherein, in the second symbol group section, the second voltage supply circuit is connected to the power amplifier, and the connection between the first voltage supply circuit and the power amplifier is disconnected. Power tracking amplification system. A wireless communication device,
A power amplifier for amplifying an RF (radio frequency) signal;
A symbol tracking modulator for providing a supply voltage to the power amplifier;
A modem that provides the symbol tracking modulator with a symbol tracking signal and a trigger signal that correspond the RF signal to a symbol group unit that includes at least one symbol;
The symbol tracking modulator is
Based on the symbol tracking signal, at least two supply voltages are generated, and on the basis of the trigger signal, any one of the supply voltages is selected for each symbol group section in the symbol group unit. A wireless communication apparatus provided for the power amplifier. The modem is
A data signal corresponding to the RF signal is divided into a plurality of symbol groups based on the symbol group unit, and the symbol tracking signal is generated based on the size of the symbol included in each of the symbol groups. The wireless communication apparatus according to claim 16. The modem is
Determining the number of the symbols included in the symbol group unit based on a radio frame configuration of the RF signal, and generating the symbol tracking signal and the trigger signal based on the determined symbol group unit; The radio communication apparatus according to claim 16, wherein the radio communication apparatus is a radio communication apparatus. The modem is
Determining the number of symbols included in the symbol group unit based on at least one of parameters indicating a communication environment between base stations, and determining the symbol tracking signal and the symbol tracking unit based on the determined symbol group unit; The wireless communication apparatus according to claim 16, wherein the trigger signal is generated.   The wireless communication apparatus according to claim 16, wherein a remaining voltage level of the supply voltage excluding a selected supply voltage is changed by the symbol tracking signal. The symbol tracking signal includes a first symbol tracking signal and a second symbol tracking signal;
The symbol tracking modulator includes a first voltage supply circuit and a second voltage supply circuit;
The first voltage supply circuit receives the first symbol tracking signal via a first signal path from the modem, and the second voltage supply circuit via a second signal path from the modem, The wireless communication apparatus according to claim 16, wherein the second symbol tracking signal is received.   The first supply voltage generated from the first voltage supply circuit is selected in the symbol group section different from the second supply voltage generated from the second voltage supply circuit, or the voltage level is changed. The wireless communication apparatus according to claim 21, wherein: A computer-readable recording medium storing a program for generating a signal necessary for symbol power tracking modulation,
The signal generation step includes:
Partitioning a data signal corresponding to an RF (radio frequency) signal into a plurality of symbol groups based on a symbol group unit including at least one symbol;
Generating a symbol tracking signal based on the size of the symbol included in each of the symbol groups;
Generating a trigger signal corresponding to the symbol group unit. The signal generation step includes:
The method further comprises the step of determining the number of symbols in the symbol group unit based on a radio frame configuration of the RF signal and a communication environment between a base station and a radio communication apparatus including the processor. Item 24. The recording medium according to Item 23. The symbol tracking signal and the trigger signal are provided to a symbol power tracking amplification system for amplifying the RF signal;
The symbol power tracking amplification system comprises:
A power amplifier for amplifying the RF signal;
Based on the symbol tracking signal, at least two supply voltages are generated, and on the basis of the trigger signal, any one of the supply voltages is selected for each symbol group section in the symbol group unit. 24. The recording medium of claim 23, comprising: a symbol tracking modulator provided to the power amplifier.

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