JP2014216459A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device having high insulation reliability.SOLUTION: A semiconductor device 1 comprises: a semiconductor element 2; a heat spreader 4 which mounts the semiconductor element 2 and which is a thermal diffusion plate for diffusing generated heat from the semiconductor element 2; and an encapsulation resin 8 for encapsulating the semiconductor element 2 and the heat spreader 4. The semiconductor device 1 further comprises a groove 9 formed on the heat spreader 4 on a periphery of a region where the semiconductor element 2 is mounted, in which the groove 9 is formed to have a distance from the semiconductor element 2 to an end of the groove 9 of 0-0.3 mm and an opening width of 0.1 mm-2 mm and the maximum depth of 0.1 mm-3/4 and under of a board thickness of the heat spreader 4.

Description

  The present invention relates to a semiconductor device in which a power semiconductor element is sealed with a resin, and more particularly to a semiconductor device on which a power semiconductor element using a compound semiconductor is mounted.

  A semiconductor device using a power semiconductor element uses a mold type in which a semiconductor element is sealed with a thermosetting resin such as an epoxy resin, and a gel sealing type in which a semiconductor element is sealed with a gel resin. In particular, a mold-sealed semiconductor device is small and excellent in reliability, and is easy to handle. Therefore, it is widely used for controlling air-conditioning equipment. In recent years, it is also used for power control of automobiles that perform motor control.

  In conventional semiconductor devices, a heat spreader made of metal with excellent thermal conductivity is provided in order to improve heat dissipation for the purpose of miniaturization and large capacity, and a method of diffusing the heat generated by the semiconductor element is adopted. ing. For example, there is a resin-encapsulated semiconductor device in which a semiconductor element is bonded to a copper heat spreader by solder or the like (see, for example, Patent Document 1).

  In the semiconductor device described in Patent Document 1, a double groove is formed on the surface of the copper heat spreader around the semiconductor element. By forming a plurality of grooves, a means for preventing a moisture entry path from the outside through the interface Has been adopted. Moisture easily enters from the interface between the heat spreader and the sealing resin, and in a semiconductor device in which one surface of the heat spreader is exposed, moisture enters from the heat spreader / sealing resin interface leading to the outside, leading to the semiconductor element. Reaching leads to electrical failure. In order to prevent this, a plurality of grooves are provided on the surface of the heat spreader to extend the approach path and prevent moisture from entering.

JP-A-1-270336

  As a compound semiconductor element capable of operating at a low loss, high withstand voltage, and high temperature as compared with a conventional Si semiconductor element, for example, mounting of a SiC semiconductor element to a semiconductor device is being promoted. SiC semiconductor elements are being developed with attention to these advantages, but because they have a higher elastic modulus than Si semiconductor elements and operate under more severe temperature environments than ever, The stress applied to the semiconductor element is increasing more than ever. In a resin-encapsulated semiconductor device, the stress applied to the interface between the semiconductor element and the sealing resin is higher than before, and as a result, peeling occurs at the interface between the semiconductor element and the sealing resin. Cracks may occur in the sealing resin in the vicinity of the end portion, and the insulation reliability of the semiconductor device may be reduced.

  Further, in the semiconductor device described in Patent Document 1, no technique has been proposed for reducing the stress applied to the interface between the semiconductor element and the sealing resin.

  Therefore, an object of the present invention is to provide a semiconductor device with high insulation reliability.

  A semiconductor device according to the present invention includes a semiconductor element, a heat diffusion plate that mounts the semiconductor element and diffuses heat generated from the semiconductor element, and a sealing resin that seals the semiconductor element and the heat diffusion plate And a groove is formed in an outer peripheral portion of the heat diffusion plate where the semiconductor element is mounted, and the groove has a distance from the semiconductor element to an end of the groove of 0 to 0.3 mm, The groove opening width is 0.1 mm to 2 mm, and the maximum depth of the groove is 0.1 mm to 3/4 or less of the thickness of the heat diffusion plate.

  Another semiconductor device according to the present invention includes a semiconductor element, a ceramic substrate for mounting the semiconductor element, and a sealing resin for sealing the semiconductor element and the ceramic substrate, and the semiconductor in the ceramic substrate. A groove is formed in the outer peripheral portion of the region where the element is mounted, and the groove has a distance from the semiconductor element to the end of the groove of 0 to 0.3 mm, an opening width of the groove of 0.1 mm to 2 mm, The maximum depth of the groove is 0.1 mm to 3/4 or less of the electrode thickness of the ceramic substrate.

  According to the present invention, a semiconductor device includes a semiconductor element, a heat diffusion plate that mounts the semiconductor element and diffuses heat generated from the semiconductor element, and a sealing resin that seals the semiconductor element and the heat diffusion plate. And a groove is formed in the outer peripheral portion of the region where the semiconductor element is mounted on the thermal diffusion plate, the groove has a distance from the semiconductor element to the end of the groove of 0 to 0.3 mm, and the opening width of the groove is 0.1 mm. 1 mm to 2 mm, and the maximum depth of the groove was 0.1 mm to 3/4 or less of the thickness of the heat diffusion plate.

  By providing the groove as described above, the stress generated at the interface between the semiconductor element and the sealing resin can be reduced, and peeling and cracking of the sealing resin generated near the end of the semiconductor element can be prevented. Thereby, a semiconductor device with high insulation reliability is obtained.

1 is a cross-sectional view of a semiconductor device according to a first embodiment. It is sectional drawing of the groove | channel provided in the heat spreader. It is an upper surface perspective view of a heat spreader. FIG. 6 is a top perspective view of a heat spreader of a semiconductor device according to a second embodiment. FIG. 10 is a top perspective view of a heat spreader of a semiconductor device according to a third embodiment. FIG. 6 is a cross-sectional view of a semiconductor device according to a fourth embodiment. FIG. 6 is a cross-sectional view of a semiconductor device according to a fifth embodiment.

<Embodiment 1>
Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view of the semiconductor device 1 according to the first embodiment.

  The semiconductor device 1 includes a semiconductor element 2, lead frames 3 a and 3 b, a heat spreader 4 (heat diffusion plate), an insulating sheet 6 (insulating layer), a copper foil 7, and a sealing resin 8. The semiconductor element 2 is, for example, a power control semiconductor element such as a MOSFET or IGBT, or a power semiconductor element such as a free wheel diode. In the first embodiment, the semiconductor device 1 includes a plurality (for example, two) of semiconductor elements 2, and the semiconductor element 2 includes two or more (for example, two) semiconductor elements including a power control semiconductor element and a free wheel diode. It is.

  The semiconductor element 2 may be formed of a wide band gap semiconductor having a band gap larger than that of silicon other than that formed of silicon (Si). Examples of the wide band gap semiconductor include silicon carbide (SiC), a gallium nitride material, and diamond. When a wide bandgap semiconductor is used, the allowable current density is high and the power loss is low, so that a device using the power semiconductor element can be downsized.

  The heat spreader 4 is provided for diffusing heat generated from the semiconductor element 2, and two semiconductor elements 2 are formed in the central portion of one surface (upper surface) of the heat spreader 4 by a bonding material 10 such as solder or silver bonding material. It is mounted in parallel. A lead frame 3 a is joined to one end portion of one surface (upper surface) of the heat spreader 4. One semiconductor element 2 and the other semiconductor element 2 are connected by a wire 5a, and the other semiconductor element 2 and the lead frame 3b are connected by a wire 5b.

  Here, the heat spreader 4 is intended to reduce the thermal resistance against the heat generation of the semiconductor element 2, and when it is not necessary to provide the heat spreader 4, the semiconductor element 2 is directly mounted on the lead frame pattern. Also good.

  In the heat spreader 4, an insulating sheet 6 is provided on the surface (lower surface) opposite to the surface on which the semiconductor element 2 is mounted as an insulating layer to which a copper foil 7 that is a metal foil is attached. The insulating sheet 6 is formed of an epoxy resin filled with at least one kind of inorganic powder such as silica, alumina, boron nitride, and aluminum nitride having excellent thermal conductivity. The inorganic powder may be a single material or a combination of a plurality of materials. Moreover, the lower surface of the copper foil 7 is exposed, and not only ensures heat dissipation, but also serves as a protective layer for preventing the insulating sheet 6 from being damaged by external contact. As long as this purpose is satisfied, the copper foil is not necessary, and a metal foil such as aluminum or a thick copper plate may be used.

  The sealing resin 8 is formed by transfer molding so as to seal a part of the lead frames 3a and 3b, the heat spreader 4, the semiconductor element 2 mounted on the heat spreader 4, the wires 5a and 5b, the insulating sheet 6, and the like. Yes. The sealing resin 8 is formed of an epoxy resin filled with inorganic powder such as fused silica having a small thermal expansion coefficient or alumina having excellent thermal conductivity. The epoxy resin is not particularly limited, such as a general ortho-cresol novolac type or a dicyclopentadiene type, although it depends on the heat dissipation of the power semiconductor device, the amount of heat generated during operation, and the operating temperature. For example, a resin having high heat resistance using a naphthalene type or a polyfunctional type can be used by increasing the operating temperature of a semiconductor element using SiC or the like.

  In addition, when thermal stress generated in a reliability test such as a temperature cycle is assumed, the thermal expansion coefficient of the sealing resin 11 is equal to or higher than the thermal expansion coefficient of the semiconductor element 2 within the range assuming the environmental temperature. It is desirable to keep it below the thermal expansion coefficient of the heat spreader 4. When a temperature difference occurs due to a difference in thermal expansion coefficient, a difference in strain occurs at the contact surface, and stress is generated. Therefore, when the stress with the semiconductor element 2 mounted on the heat spreader 4 is assumed, it is desirable to employ the sealing resin 11 between the two thermal expansion coefficients.

  Grooves 9 are formed in the outer periphery of the region where the semiconductor element 2 is mounted in the heat spreader 4. That is, the grooves 9 are formed so as to continuously surround the regions where the respective semiconductor elements 2 are mounted. Thereby, the thermal stress which generate | occur | produces in the interface of the semiconductor element 2 and the sealing resin 11 can be reduced, and peeling of the sealing resin 11 and generation | occurrence | production of a crack can be prevented.

  In addition, the grooves 9 may be provided for all the semiconductor elements 2 mounted on the heat spreader 4. For example, when the materials of the respective semiconductor elements 2 are different, the grooves 9 are formed in the semiconductor elements 2 having a high thermal stress. You may provide only. Specifically, when a Si semiconductor element is used for the power control semiconductor element and a SiC semiconductor element is used only for the free wheel diode, the outer periphery of the region where the SiC semiconductor element is mounted in the heat spreader 4 It is also possible to provide the groove 9 so as to surround only the part. By providing the groove 9 only in a necessary portion, an increase in the formation space of the groove 9 and an increase in the processing cost of the heat spreader 4 can be suppressed.

  In the groove 9, the distance from the end of the semiconductor element 2 to the inner end of the groove 9 is L, the opening width of the groove 9 is W, the distance from the surface of the heat spreader 4 to the deepest part of the groove 9 is D, and the heat spreader 4. Alternatively, when the thickness of the lead frame 3a is t, L is 0 to 0.3 mm, W is 0.1 mm to 2 mm, and D is 0.1 mm to 3 / 4t.

  For example, in the region of L <0, the groove 9 has a shape that penetrates to the lower surface of the semiconductor element 2, and has a stress reducing effect on the resin-encapsulated semiconductor element 2. May flow into the groove 9, and positioning of the semiconductor element 2 may be difficult. Further, there is a demerit that heat dissipation from the semiconductor element 2 is deteriorated.

  In the region where L> 0, the bonding material 10 may spread to the end of the groove 9 in the bonding process of the semiconductor element 2. When the bonding material 10 is formed of solder or a silver bonding material, the adhesiveness with the sealing resin 8 is poor, and the sealing resin 8 is easily peeled off by the temperature cycle test. The peeling surface between the bonding material 10 and the sealing resin 8 progresses so as to widen by the temperature cycle test. Due to the occurrence of a peeling interface around the semiconductor element 2, the stress between the semiconductor element 2 and the sealing resin 8 is increased as compared with the case of bonding. Accordingly, it is desirable that the interface area between the bonding material 10 having poor adhesion and the sealing resin 8 is as small as possible.

  In the region of L> 0.3 mm, the influence of peeling at the interface between the bonding material 10 and the sealing resin 8 increases, and the stress on the semiconductor element 2 increases. As a result, peeling occurs at the interface between the semiconductor element 2 and the sealing resin 8, or a resin crack from the end of the semiconductor element 2 occurs.

  When W <0.1 mm, not only the stress reducing effect on the semiconductor element 2 is small, but also when the semiconductor element 2 is bonded to the heat spreader 4 or the lead frame 3a, the bonding material 10 may get over the groove 9 and protrude. is there. As a result, not only the effect of providing the groove 9 is lost, but also the bonding material 10 that easily peels off from the sealing resin 8 spreads, so that the same effect as in the case of L> 0.3 mm occurs, and the semiconductor element 2 and Separation occurs at the interface with the sealing resin 8, or a resin crack from the end of the semiconductor element 2 occurs.

  When W> 2 mm, the pattern area of the heat spreader 4 or the lead frame 3a on which the semiconductor element 2 is mounted is increased, which not only hinders downsizing of the semiconductor device 1, but also reduces the heat dissipation of the heat spreader 4. When the distance between the adjacent semiconductor elements 2 is short, a single groove 9 may be used in common instead of individually forming the grooves 9 between the adjacent semiconductor elements 2.

  When W is increased, in order to prevent the heat spreader 4 from becoming large, it is possible to provide the groove 9 up to the end of the heat spreader 4, but the warp of the semiconductor device 1 increases and stress on the semiconductor element 2 is increased. Get higher. For this reason, it is preferable that the surface of the heat spreader 4, which is the outer peripheral portion of the groove 9, has the same height as the mounting surface of the semiconductor element 2. If the warp of the heat spreader 4 is taken into consideration, it is desirable to secure the distance from the outer peripheral end of the groove 9 to the end of the heat spreader 4 as much as W. However, since the heat spreader 4 has a large area, it can be made narrow according to the stress generated in the semiconductor element 2 and the warp of the semiconductor device 1.

  When D <0.1 mm, the stress reduction effect on the semiconductor element 2 is very small, and peeling occurs at the interface between the semiconductor element 2 and the sealing resin 8 against thermal stress generated in a reliability test such as a temperature cycle. Or a resin crack from the end of the semiconductor element 2 occurs.

  When D> 3 / 4t, that is, when the groove 9 deeper than three-fourths of the thickness of the heat spreader 4 is formed, the heat diffusibility which is the original purpose of the heat spreader 4 is extremely impaired.

  The shape of the groove 9 may be formed in a rectangular cross section as shown in FIG. 1, but is not limited thereto. Although it is not preferable from the viewpoint of heat dissipation, if the cross-sectional shape of the groove 9 is a tapered shape (a shape in which the width increases as it goes downward) that goes under the semiconductor element 2, the effect of reducing stress on the semiconductor element 2 is further improved. can get. Further, from the viewpoint of productivity and heat dissipation, the cross-sectional shape of the groove 9 is preferably formed in a triangular shape, and the amount of decrease in heat dissipation due to the groove formation may be a triangular groove as compared to the rectangular groove. Can be kept small. Furthermore, the groove forming method is also easier when the triangular shape is used for press molding with a press die or the like. In consideration of heat dissipation, it is preferable that at least the inner wall of the groove 9 on the side close to the semiconductor element 2 has an inclination angle of 90 degrees or less with respect to the horizontal plane.

  Next, the result of the reliability test of the semiconductor device will be described. As a reliability test of the semiconductor device, a temperature cycle test was performed on Examples 1 to 10 and Comparative Examples 1 to 9. The temperature cycle test was carried out by putting the semiconductor device in a high-temperature bath capable of controlling the temperature and repeatedly reciprocating the temperature in the high-temperature bath between −60 ° C. and 180 ° C. The criterion for reliability was determined to be ◯ when no peeling occurred after 1000 cycles in the temperature cycle test, and x when peeling occurred. The determination of the occurrence of peeling was performed by observing with an ultrasonic imaging apparatus (FineSAT manufactured by Hitachi Engineering & Service).

As Example 1, a molded semiconductor device in which a SiC semiconductor element is bonded to one surface of a heat spreader, a lead frame is bonded to a heat spreader provided with an insulating layer on the other surface, and the whole is sealed with an epoxy resin is manufactured. did. The SiC semiconductor element was 10 mm × 10 mm × 0.3 mm, and the heat spreader was 20 mm × 40 mm × 3.2 mm. The heat spreader and lead frame were made of copper in consideration of heat dissipation. Two types of semiconductor elements, MOSFET and Schottky barrier diode (SBD), are mounted on the heat spreader. As the sealing resin, an epoxy resin having a glass transition point (Tg) of about 190 ° C. filled with 82% by weight of silica and having a thermal expansion coefficient of 12 × 10 ⁻⁶ (1 / K) was used.

  The position of the groove provided on the outer periphery of the region where the semiconductor element is mounted in the heat spreader is the distance from the end of the semiconductor element to the inner end of the groove processing being 0, that is, the area of the region surrounded by the groove in the heat spreader The area of the region where the semiconductor element was mounted was the same. Further, the size of the groove was such that the opening width of the groove was 0.8 mm and the maximum depth was 0.4 mm.

  A semiconductor element was bonded onto the heat spreader provided with such a groove, and the resin was sealed by transfer molding together with the lead frame and the insulating layer. Resin sealing was performed at about 180 ° C. for 120 seconds, and after mold removal, post mold curing (hereinafter referred to as “PMC”) was performed in an oven at 180 ° C. for 4 hours. The warpage shape of the semiconductor device after PMC was measured with a three-dimensional laser displacement meter (NEXIV VMR-3020 manufactured by Nikon). After measuring the warp shape, a thermal shock tester (TSP-100 manufactured by ESPEC) was used to repeatedly reciprocate between -60 ° C and 180 ° C, and a temperature cycle test was conducted. This was done with a video device.

  As for the warp after PMC, when the convex warpage was positive on the insulating layer side, the range of 0 to 60 μm was rated as ◯, and the warp exceeding 60 μ or the negative warp was rated as x. In the semiconductor device, for example, heat radiation grease is applied on the insulating layer side to provide heat radiation fins, and therefore, negative warpage is not preferable because the grease becomes thick in the central portion of the semiconductor device where heat dissipation is important. Further, if the warpage is larger than 60 μm, it is not preferable because the heat dissipation performance is reduced due to uneven grease thickness when it is provided on the heat dissipation fin, and a large load is applied to the semiconductor device when forcedly pressed against the heat dissipation fin.

  Judgment criteria for element bondability is x when a semiconductor element is bonded to a heat spreader and a bonding material enters the groove, and the state before bonding is maintained without filling the groove after bonding. In case of dripping, it was marked as ○.

  The criteria for workability were determined in consideration of productivity at the time of groove formation, manufacturing cost, and the like. The case where a groove was formed by pressing on the surface of the heat spreader was marked with ◎, and the one with cutting was marked with ○. Groove processing with a depth deeper than the width is feasible, but is x from the viewpoint of productivity and manufacturing cost.

  The criteria for determining the heat dissipation were carried out by comparing the heat resistance with a heat spreader that was not grooved. In a semiconductor device using a heat spreader that has not been subjected to groove processing, an increase of more than 10% with respect to the thermal resistance from the semiconductor element to the metal foil was indicated as x.

  In the semiconductor device provided with the groove provided in this example, when each determination was made, all the criteria for warpage, element bondability, workability, heat dissipation, and temperature cycleability were satisfied, and the reliability was high. A semiconductor device was obtained.

  In Example 2, it implemented like Example 1 except having changed the groove arrangement position with respect to Example 1. FIG. Specifically, the groove position is 0.1 mm from the end of the semiconductor element to the inner edge of the groove processing, and the groove shape is 0.8 mm in the groove opening width and 0 in the maximum depth. 4 mm. In the semiconductor device provided with the groove provided in this example, when each determination was made, all the criteria for warpage, element bondability, workability, heat dissipation, and temperature cycleability were satisfied, and the reliability was high. A semiconductor device was obtained.

  In Example 3, it implemented like Example 1 except having changed the groove arrangement position with respect to Example 1. FIG. Specifically, the position of the groove is 0.3 mm from the end of the semiconductor element to the inner end of the groove processing, and the groove shape is 0.8 mm in the groove opening width and 0 in the maximum depth. 4 mm. In the semiconductor device provided with the groove provided in this example, when each determination was made, all the criteria for warpage, element bondability, workability, heat dissipation, and temperature cycleability were satisfied, and the reliability was high. A semiconductor device was obtained.

  In Example 4, it implemented similarly to Example 2 except having changed the groove shape with respect to Example 2. FIG. Specifically, the groove position is 0.1 mm from the end of the semiconductor element to the inner edge of the groove processing, and the groove shape is 0.1 mm in the groove opening width and 0 in the maximum depth. 4 mm. In the semiconductor device provided with the groove provided in this example, when each determination was made, all the criteria for warpage, element bondability, workability, heat dissipation, and temperature cycleability were satisfied, and the reliability was high. A semiconductor device was obtained.

  In Example 5, it implemented similarly to Example 2 except having changed the groove shape with respect to Example 2. FIG. Specifically, the groove position is 0.1 mm from the end of the semiconductor element to the inner edge of the groove processing, and the groove shape is 0.5 mm in the groove opening width and 0 in the maximum depth. 4 mm. In the semiconductor device provided with the groove provided in this example, when each determination was made, all the criteria for warpage, element bondability, workability, heat dissipation, and temperature cycleability were satisfied, and the reliability was high. A semiconductor device was obtained.

  In Example 6, it implemented similarly to Example 2 except having changed the groove shape with respect to Example 2. FIG. Specifically, the position of the groove is a distance from the end of the semiconductor element to the inner end of the groove processing of 0.1 mm, and the shape of the groove is a groove opening width of 1 mm and a maximum depth of 0.4 mm. It was. In the semiconductor device provided with the groove provided in this example, when each determination was made, all the criteria for warpage, element bondability, workability, heat dissipation, and temperature cycleability were satisfied, and the reliability was high. A semiconductor device was obtained.

  In Example 7, it implemented similarly to Example 2 except having changed the groove shape with respect to Example 2. FIG. Specifically, the position of the groove is a distance from the end of the semiconductor element to the inner end of the groove processing of 0.1 mm, and the shape of the groove is a groove opening width of 2 mm and a maximum depth of 0.4 mm. It was. In the semiconductor device provided with the groove provided in this example, when each determination was made, all the criteria for warpage, element bondability, workability, heat dissipation, and temperature cycleability were satisfied, and the reliability was high. A semiconductor device was obtained.

  In Example 8, it implemented similarly to Example 2 except having changed the groove shape with respect to Example 2. FIG. Specifically, the groove position is 0.1 mm from the end of the semiconductor element to the inner edge of the groove processing, and the groove shape is 0.8 mm in the groove opening width and 0 in the maximum depth. 1 mm. It was confirmed that, by setting the groove depth to 0.1, it was possible to form grooves by pressing as a groove processing method on the surface of the heat spreader, and productivity was improved. In the semiconductor device provided with the groove provided in this example, when each determination was made, all the criteria for warpage, element bondability, workability, heat dissipation, and temperature cycleability were satisfied, and reliability was improved. A high semiconductor device was obtained.

  In Example 9, it implemented similarly to Example 2 except having changed the groove shape with respect to Example 2. FIG. Specifically, the position of the groove is 0.1 mm from the end of the semiconductor element to the inner end of the groove processing, and the shape of the groove is 0.8 mm for the groove opening width and 1 for the maximum depth. 2 mm. In the semiconductor device provided with the groove provided in this example, when each determination was made, all the criteria for warpage, element bondability, workability, heat dissipation, and temperature cycleability were satisfied, and reliability was improved. A high semiconductor device was obtained. Compared with Example 2 and the like, the formation of the groove deeply reduced the heat spread and confirmed the increase in thermal resistance, but it was confirmed that it was within the criterion.

  In Example 10, it implemented similarly to Example 2 except having changed the groove shape with respect to Example 2. FIG. Specifically, the position of the groove is 0.1 mm from the end of the semiconductor element to the inner end of the groove processing, and the shape of the groove is 2 mm for the groove opening width and 2.4 mm for the maximum depth. It was. In the semiconductor device provided with the groove provided in this example, when each determination was made, all the criteria for warpage, element bondability, workability, heat dissipation, and temperature cycleability were satisfied, and the reliability was high. A semiconductor device was obtained. Compared with Example 7, the heat spread deteriorated by forming the groove deeply, and an increase in thermal resistance was confirmed, but it was confirmed that it was within the criterion.

  In Comparative Example 1, the same procedure as in Example 1 was performed except that the groove arrangement position was changed with respect to Example 1. Specifically, the position of the groove is such that the inner end portion of the groove processing is disposed inside the end portion of the semiconductor element, and is disposed 0.3 mm inside. That is, a region 0.3 mm inside from the end of the semiconductor element is not joined to the heat spreader, and a groove is disposed. However, since this groove is filled with the sealing resin after the resin sealing, the end portion of the semiconductor element is also sealed with the sealing resin. Here, the groove shape was such that the opening width of the groove was 0.8 mm and the maximum depth was 0.4 mm.

  In the semiconductor device provided with the groove provided in this comparative example, when each determination was made, the warping, workability, heat dissipation, and temperature cycleability satisfied the determination criteria, but the semiconductor element was bonded to the heat spreader In about 15% of the 200 manufactured, the bonding material was found to flow into the groove, and the element bondability was judged as x.

  Comparative Example 2 was performed in the same manner as in Example 1 except that the groove arrangement position was changed with respect to Example 1. Specifically, the position of the groove is 0.5 mm from the end of the semiconductor element to the inner end of the groove processing, and the groove shape is 0.8 mm in the groove opening width and 0 in the maximum depth. 4 mm.

  In the semiconductor device provided with the groove provided in this comparative example, when each determination was made, the warpage, element bondability, workability, and heat dissipation satisfied the determination criteria, but in the temperature cycle test, after 1000 cycles Peeling of the sealing resin was confirmed. As a result of the cross-sectional observation, it was confirmed that the bonding material spread on the heat spreader to the inner end of the groove, and that the peeling of the interface between the bonding material and the sealing resin progressed to the surroundings. From this, the temperature cycle property was determined as x.

  Comparative Example 3 was carried out in the same manner as in Example 2 except that the groove shape was changed from that in Example 2. Specifically, the groove position is 0.1 mm from the end of the semiconductor element to the inner edge of the groove processing, and the groove shape is 0.05 mm in groove width and 0 in maximum depth. 4 mm.

  In the semiconductor device provided with the groove provided in this comparative example, when each determination was performed, the warpage and the heat dissipation satisfied the determination criteria, but the element bondability, workability, and temperature cycle test were as follows. It became x as a criterion. As for the element bondability, the bonding material flowed into or over the groove in about 5% of the 200 semiconductor elements bonded to the heat spreader. Moreover, since the depth was deep with respect to the opening width of a groove | channel, it took time for the machining of a groove | channel, and it confirmed that productivity was bad. In the temperature cycle test, peeling of the sealing resin was confirmed after 1000 cyc. The warpage of the semiconductor device was within the criteria, but it is estimated that the warpage is about 55 μm and the stress reduction effect due to the groove formation is low.

  In Comparative Example 4, the same procedure as in Example 2 was performed except that the groove shape was changed from that in Example 2. Specifically, the position of the groove is 0.1 mm from the end of the semiconductor element to the inner end of the groove processing, and the shape of the groove is 2.5 mm in the groove opening width and 0 in the maximum depth. 4 mm.

  In the semiconductor device provided with the groove provided in this comparative example, when each determination was made, the element bondability, workability, heat dissipation, and temperature cycle test satisfied the determination criteria, but the warpage of the semiconductor device was large. About 80 μm. As a result, when grease is applied to the metal foil and attached to the heat radiating fin, uneven thickness of the grease occurs, or excessive force is applied to the sealing resin when it is forcibly pressed against the fin etc. Since there is a possibility, it was set as x as a judgment standard.

  In Comparative Example 5, the same procedure as in Example 2 was performed except that the groove shape was changed from that in Example 2. Specifically, the groove position is 0.1 mm from the end of the semiconductor element to the inner edge of the groove processing, and the groove shape is 0.8 mm in the groove opening width and 0 in the maximum depth. .05 mm.

  When each determination was made in the semiconductor device provided with the groove provided in the present comparative example, it was confirmed that the warping, the element bondability, the workability, and the heat dissipation satisfy the determination criteria. In particular, since the maximum depth of the groove is 0.05 mm, it is possible to form the groove by pressing, and the productivity is good and the workability is low. However, in the temperature cycle test, peeling of the sealing resin was confirmed after 1000 cyc. Although the warpage of the semiconductor device was within the criteria, it is estimated that the warpage is about 50 μm and the stress reduction effect due to the groove formation is low.

  In Comparative Example 6, the same operation as in Example 2 was performed except that the groove shape was changed from that in Example 2. Specifically, the position of the groove is 0.1 mm from the end of the semiconductor element to the inner end of the groove processing, and the shape of the groove is 0.8 mm for the groove opening width and 2 for the maximum depth. 4 mm.

  When each determination was made in the semiconductor device provided with the groove provided in this comparative example, it was confirmed that the warpage, the element bonding property, the heat dissipation property, and the temperature cycle test satisfied the determination criteria. However, since the depth is deep with respect to the opening width of the groove, it takes time for the machining of the groove and the productivity is poor.

  Comparative Example 7 was carried out in the same manner as in Example 2 except that the groove shape was changed from that in Example 2. Specifically, the position of the groove is 0.1 mm from the end of the semiconductor element to the inner end of the groove processing, and the shape of the groove is 0.8 mm for the groove opening width and 2 for the maximum depth. 6 mm.

  When each determination was made in the semiconductor device provided with the groove provided in this comparative example, it was confirmed that the warpage, the element bonding property, and the temperature cycle test satisfied the determination criteria. However, since the depth is deep with respect to the opening width of the groove as in Comparative Example 6, it takes time to machine the groove and the productivity is poor. Furthermore, it was confirmed that when the maximum depth of the groove exceeds 3/4 of the thickness of the heat spreader of 3.2 mm, the thermal diffusibility in the heat spreader becomes poor and the thermal resistance increases. When the maximum depth of the groove was 2.6 mm, an increase in thermal resistance of 10% or more was confirmed compared to the thermal resistance of the heat spreader when no groove was provided, and x was determined as a criterion.

  Comparative Example 8 was carried out in the same manner as in Example 2 except that the groove shape was changed from that in Example 2. Specifically, the position of the groove is 0.1 mm from the end of the semiconductor element to the inner end of the groove processing, and the groove shape is 2 mm for the groove opening width and 2.6 mm for the maximum depth. It was.

  When each determination was made in the semiconductor device provided with the groove provided in this comparative example, the opening width of the groove was increased to 2 mm as compared with Comparative Example 7, so that a groove having a depth of 2.6 mm was formed. In addition to warping, device bondability, and temperature cycle, workability has also satisfied the criteria. However, as in Comparative Example 7, when the maximum depth of the groove exceeds 3/4 of the thickness of the heat spreader, the thermal diffusibility in the heat spreader becomes poor, and the heat spreader in the case where no groove is provided. A thermal resistance increase of 10% or more was confirmed compared with the thermal resistance, and the criterion for determining the heat dissipation was set to x.

  In Comparative Example 9, the same procedure as in Example 2 was performed except that the groove shape was changed from that in Example 2. As for the position of the groove, the distance from the end of the semiconductor element to the inner end of the groove processing was set to 0.1 mm. The groove shape was such that the groove opening width was 2 mm and the maximum depth was 2.8 mm.

  In the semiconductor device provided with the groove provided in this comparative example, when each determination was made, the element bondability, workability, and temperature cycle satisfied the determination criteria as in Comparative Example 8, but the heat dissipation was further improved by the thermal resistance. As in Comparative Example 9, the heat release criterion was set as x. Further, the warp of the semiconductor device increased due to the deeper groove, and x was determined to be out of the warpage criterion.

  As described above, in the semiconductor device 1 according to the first embodiment, the semiconductor device 1 includes the semiconductor element 2, the semiconductor element 2, the heat spreader 4 that diffuses the heat generated from the semiconductor element 2, and the semiconductor And a sealing resin 8 for sealing the element 2 and the heat spreader 4, and a groove 9 is formed in the outer peripheral portion of the region where the semiconductor element 2 is mounted in the heat spreader 4, and the groove 9 extends from the semiconductor element 2 to the end of the groove 9. The distance to the portion was 0 to 0.3 mm, the opening width of the groove 9 was 0.1 mm to 2 mm, and the maximum depth of the groove 9 was 0.1 mm to 3/4 or less of the plate thickness of the heat spreader 4.

  By providing the groove 9 as described above, the stress generated at the interface between the semiconductor element 2 and the sealing resin 8 can be reduced, and the sealing resin 8 is peeled off and cracked near the end of the semiconductor element 2. Can be prevented. As a result, a semiconductor device 1 with high insulation reliability is obtained, and as a result, the semiconductor device 1 can be used for a long time.

  In addition, since it has a stress reduction structure, the allowable range of required characteristic values such as elastic modulus and resin strength required for the sealing resin 8 is widened, leading to improvement in productivity and cost reduction of the semiconductor device 1. .

  Further, even if the interface between the bonding material 10 and the sealing resin 8 on the lower surface of the semiconductor element 2 is peeled off, the progress of the peeling to the heat spreader 4 can be prevented by the grooves 9, so that the peeling spread to the surface of the heat spreader 4 can be prevented. No dimple processing is required. Thereby, it becomes possible to manufacture the heat spreader 4 at lower cost.

  A plurality of semiconductor elements 2 are provided, and at least a part of the plurality of semiconductor elements 2 is formed of a wide band gap semiconductor. That is, the plurality of semiconductor elements 2 includes two types including a power control semiconductor element and a free wheel diode. For example, Si semiconductor elements are used for the power control semiconductor elements, and wide band gap semiconductor elements are used only for the freewheeling diodes. As a result, the groove 9 can be formed only in the peripheral region of the semiconductor element 2 formed of the wide band gap semiconductor in which the sealing resin 11 is easily peeled off due to the high thermal stress generated. In this case, an increase in the formation space of the groove 9 and an increase in the processing cost of the heat spreader 4 can be suppressed.

  Since the wide bandgap semiconductor is a semiconductor of silicon carbide, gallium nitride-based material, or diamond, the allowable current density is high, the power loss is low, and the semiconductor device 1 can be downsized.

  Since at least one groove 9 is formed and is formed so as to continuously surround the outer periphery of the region where the semiconductor element 2 is mounted, stress generated at the interface between the semiconductor element 2 and the sealing resin 11 is generated. It can be reduced more.

  Since the insulating sheet 6 is provided on the surface of the heat spreader 4 opposite to the surface on which the semiconductor element 2 is mounted, the semiconductor device 1 is used in a state where it is installed on a conductive heat sink (not shown). In addition, the heat spreader 4 and the heat sink can be insulated.

  In the groove 9, if at least the inner wall on the semiconductor element 2 side is formed with an inclination angle of 90 degrees or less with respect to the horizontal plane, the reduction in heat radiation due to the groove formation of the heat spreader 4 can be suppressed to be smaller than in the case of the rectangular groove. it can. Further, press molding with a press die or the like is facilitated.

  Since the thermal expansion coefficient of the sealing resin 8 is equal to or higher than the thermal expansion coefficient of the semiconductor element 2 and equal to or lower than the thermal expansion coefficient of the heat spreader 4, the strain on the contact surfaces of these members when a temperature difference occurs. The stress generated due to the difference can be suppressed.

  Since the sealing resin 8 is formed by transfer molding using an epoxy resin, the semiconductor device 1 is small in size and excellent in reliability, and is easy to handle.

<Embodiment 2>
Next, a semiconductor device according to the second embodiment will be described. FIG. 4 is a top perspective view of the heat spreader 4 of the semiconductor device according to the second embodiment. In the second embodiment, the same components as those described in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  In the second embodiment, the groove 11 is not continuously provided so as to surround the outer periphery of the region where the semiconductor element 2 is mounted in the heat spreader 4, but is provided so that there is a part that is not partially connected. Yes. Generally, the corner portion of the thermal stress on the semiconductor element is high. When the temperature cycle condition of reliability is not severe due to the use condition and use environment of the semiconductor device, as shown in FIG. 4, the groove is formed only in the portion corresponding to the corner of the semiconductor element 2 having a high thermal stress in the heat spreader 4. 11 can also be provided. More specifically, the inner end of the groove 11 is formed at a position corresponding to the inner side of the end of the semiconductor element 2 in the heat spreader 4, and the outer end of the groove 11 is outside the end of the semiconductor element 2 in the heat spreader 4. It is formed in the position corresponding to.

  As a result, it is possible to minimize a decrease in heat dissipation from the semiconductor element 2. However, a solder resist or the like is provided, for example, in a portion where the groove 11 is not provided (a portion where the groove 11 is not connected) in the outer periphery of the region where the semiconductor element 2 is mounted in the heat spreader 4 so that the bonding material does not flow out. It is preferable to do.

<Embodiment 3>
Next, a semiconductor device according to the third embodiment will be described. FIG. 5 is a top perspective view of the heat spreader 4 of the semiconductor device according to the third embodiment. In the third embodiment, the same components as those described in the first and second embodiments are denoted by the same reference numerals, and the description thereof is omitted.

  In the third embodiment, the groove 9 is formed so as to continuously surround the region where the semiconductor element 2 is mounted in the heat spreader 4, and the groove 12 is continuously formed on the outer peripheral side of the groove 9 in the heat spreader 4. . More specifically, the grooves 9 are respectively formed so as to continuously surround a region where the two semiconductor elements 2 are mounted in the heat spreader 4, and the single or multiple grooves 12 are formed on the two grooves 9 in the heat spreader 4. It is formed so as to continuously surround the outer peripheral side in a lump. Here, the grooves 12 may be formed so as to continuously surround the two grooves 9 in the heat spreader 4.

  The cross-sectional shape of the groove 12 may be smaller in depth and width than the cross-sectional shape of the groove 9. By providing the groove 12, it is possible to prevent the heat spreader 4 and the sealing resin from being peeled off and progressed in a reliability test such as a temperature cycle test. Here, the shape is not limited as long as the generation and progress of peeling can be prevented. For example, a groove having a width of about 0.1 mm and a depth of about 0.05 mm may be formed. Moreover, it does not need to be continuous and does not have to have a shape surrounding the region where the semiconductor element 2 is mounted in the heat spreader 4.

  Like the groove formed at the end portion of the heat spreader 4 shown in FIG. 5, it can be provided in a straight line due to the relationship between the size of the heat spreader 4 and the size of the semiconductor element 2. If the groove | channel 12 is a shallow groove | channel of about 0.05 mm, for example, it can implement by the groove process by a press with respect to the surface of the heat spreader 4, and a process can also be provided in low cost.

<Embodiment 4>
Next, a semiconductor device 1A according to the fourth embodiment will be described. FIG. 6 is a cross-sectional view of the semiconductor device 1A according to the fourth embodiment. Note that in the fourth embodiment, the same components as those described in the first to third embodiments are denoted by the same reference numerals and description thereof is omitted.

  In the first embodiment, the insulating sheet 6 is used as the insulating layer. However, in the fourth embodiment, the ceramic substrate 13 is provided instead of the insulating sheet 6. As the ceramic substrate 13, for example, a substrate such as DBC (Direct Bonding Copper) in which electrodes are formed on both surfaces of a ceramic can be used.

  In this case, it is also possible to mount a semiconductor element on the upper surface of the heat spreader in which the groove is formed, and bond the ceramic substrate 13 to the lower surface of the heat spreader with a bonding material. Further, when the necessity for heat dissipation is low, as shown in FIG. 6, the semiconductor element 2 is mounted on, for example, the central portion of the electrode on one surface (upper surface) of the ceramic substrate 13 without providing a heat spreader, and the ceramic substrate. A groove 14 may be formed in the outer peripheral portion of the region where the semiconductor element 2 is mounted. In this case, at least one groove 14 is formed so as to continuously surround a region where each semiconductor element 2 is mounted.

  Here, in the groove 14, the distance from the end of the semiconductor element 2 to the end of the groove 14 is L, the opening width of the groove 14 is W, and the distance from the surface of the ceramic substrate 13 to the deepest part of the groove 14 is D. When the thickness of the electrode of the ceramic substrate 13 is t, L is 0 to 0.3 mm, W is 0.1 mm to 2 mm, and D is 0.1 mm to 3 / 4t.

  In the electrode on the upper surface of the ceramic substrate 13, for example, a lead frame 3a is bonded to one end. The sealing resin 8 is formed by transfer molding so as to seal part of the lead frames 3a and 3b, the ceramic substrate 13, the semiconductor element 2 mounted on the ceramic substrate 13, and the wires 5a and 5b. Yes. As in the case of the first embodiment, the sealing resin 8 is formed of an epoxy resin filled with inorganic powder such as fused silica having a small coefficient of thermal expansion, or alumina having excellent thermal conductivity.

  As described above, the semiconductor device 1A according to the fourth embodiment includes the semiconductor element 2, the ceramic substrate 13 for mounting the semiconductor element 2, and the sealing resin 8 for sealing the semiconductor element 2 and the ceramic substrate 13. And a groove 14 is formed in the outer peripheral portion of the ceramic substrate 13 where the semiconductor element 2 is mounted. The groove 14 has a distance from the semiconductor element 2 to the end of the groove 14 of 0 to 0.3 mm, and the groove 14. And the maximum depth of the groove 14 is 0.1 mm to 3/4 or less of the electrode thickness of the ceramic substrate 13.

  By providing the groove 14 as described above, the stress generated at the interface between the semiconductor element 2 and the sealing resin 8 can be reduced, and the sealing resin 8 is peeled off and cracked near the end of the semiconductor element 2. Can be prevented. Thereby, the semiconductor device 1A with high insulation reliability is obtained. In addition, since the groove 14 can be formed at the same time when the electrode on one surface of the ceramic substrate 13 is formed by etching, the semiconductor device 1A can be easily manufactured at low cost.

<Embodiment 5>
Next, a semiconductor device 1B according to the fifth embodiment will be described. FIG. 7 is a cross-sectional view of the semiconductor device 1B according to the fifth embodiment. Note that in the fifth embodiment, the same components as those described in the first to fourth embodiments are denoted by the same reference numerals, and description thereof is omitted.

  A semiconductor device 1B according to the fifth embodiment includes a case material 16 that surrounds the semiconductor element 2 and the ceramic substrate 13 and forms an outer frame of the semiconductor device 1B, a metal base plate 15 that forms a bottom plate of the semiconductor device 1B, and a case And a sealing resin 18 provided in a region surrounded by the material 16.

  The metal base plate 15 is formed of, for example, copper or the like, and the ceramic substrate 13 is bonded to the center portion of one surface (upper surface) of the metal base plate 15 with a bonding material, for example. As in the case of the fourth embodiment, the ceramic element 13 is mounted with the semiconductor element 2 and the groove 14 is formed in the ceramic substrate 13. A case material 16 made of, for example, polyphenylene sulfide resin (hereinafter referred to as “PPS”) or the like is provided at an end portion on the upper surface of the metal base plate 15 so as to surround the semiconductor element 2 and the ceramic substrate 13.

  The lead frames 3a and 3b are respectively provided on the upper part of the case material 16 facing each other. One end of the electrode on the upper surface of the ceramic substrate 13 is connected to the lead frame 3a by a wire 5c. The semiconductor element 2 is connected by a wire 5a, and the other semiconductor element 2 and the lead frame 3b are connected by a wire 5b.

  The sealing resin 18 is formed, for example, by filling a region surrounded by the case material 16 with silicon gel, and a part of the lead frames 3a and 3b, the ceramic substrate 13, and the semiconductor element 2 mounted on the ceramic substrate 13. And has a function of sealing the wires 5a, 5b, 5c and the like.

  As described above, the semiconductor device 1B according to the fifth embodiment further includes the case material 16 that surrounds the semiconductor element 2 and the ceramic substrate 13 and forms the outer frame of the semiconductor device 1B. 16 is provided in a region surrounded by 16. In the first embodiment, the sealing resin 8 formed by transfer molding of an epoxy resin also serves as the body of the semiconductor device 1, but in the fifth embodiment, the case material 16 formed of PPS or the like is used. Thus, high reliability can be obtained even in the semiconductor device 1B in which the sealing resin 18 formed of silicon gel is filled in the region surrounded by the case material 16 and the semiconductor element 2 and the ceramic substrate 13 are sealed.

  In addition to silicon gel, epoxy resin can be used as the sealing resin. Thereby, the range of materials for the sealing resin is widened, and semiconductor devices having various configurations can be manufactured.

  It should be noted that the present invention can be freely combined with each other within the scope of the invention, and each embodiment can be appropriately modified or omitted.

  1, 1A, 1B Semiconductor device, 2 semiconductor element, 4 heat spreader, 6 insulating sheet, 8 sealing resin, 9 groove, 11 groove, 12 groove, 13 ceramic substrate, 14 groove, 16 case material, 18 sealing resin.

Claims (13)

A semiconductor element;
A heat diffusing plate that carries the semiconductor element and diffuses heat generated from the semiconductor element;
Sealing resin for sealing the semiconductor element and the thermal diffusion plate;
With
Grooves are formed in the outer periphery of the region where the semiconductor element is mounted in the heat diffusion plate,
The groove has a distance from the semiconductor element to an end of the groove of 0 to 0.3 mm, an opening width of the groove of 0.1 mm to 2 mm, and a maximum depth of the groove of 0.1 mm to the thermal diffusion. A semiconductor device formed to 3/4 or less of the plate thickness. A semiconductor element;
A ceramic substrate for mounting the semiconductor element;
A sealing resin for sealing the semiconductor element and the ceramic substrate;
With
Grooves are formed in the outer peripheral portion of the ceramic substrate on which the semiconductor element is mounted,
The groove has a distance from the semiconductor element to the end of the groove of 0 to 0.3 mm, an opening width of the groove of 0.1 mm to 2 mm, and a maximum depth of the groove of 0.1 mm to the ceramic substrate. A semiconductor device formed to 3/4 or less of the electrode thickness.   The semiconductor device according to claim 1, wherein an insulating layer is provided on a surface of the heat diffusion plate opposite to a surface on which the semiconductor element is mounted. A case material surrounding the semiconductor element and the ceramic substrate to form an outer frame of the semiconductor device;
The semiconductor device according to claim 2, wherein the sealing resin is provided in a region surrounded by the case material.   5. The semiconductor according to claim 1, wherein at least one groove is formed, and is formed so as to continuously surround an outer peripheral portion of a region where the semiconductor element is mounted. apparatus.   6. The semiconductor device according to claim 1, wherein at least the inner wall on the semiconductor element side in the groove is formed with an inclination angle of 90 degrees or less with respect to a horizontal plane.   The thermal expansion coefficient of the said sealing resin is more than the thermal expansion coefficient of the said semiconductor element, and is below the thermal expansion coefficient of the said thermal diffusion board, The thermal expansion coefficient of any one of Claims 1-6. Semiconductor device.   The semiconductor device according to claim 1, wherein the sealing resin is formed by molding.   The semiconductor device according to claim 1, wherein the sealing resin is formed of silicon gel or epoxy resin. A plurality of the semiconductor elements are provided,
The semiconductor device according to claim 1, wherein at least a part of the plurality of semiconductor elements is formed of a wide band gap semiconductor.   The semiconductor device according to claim 10, wherein the wide band gap semiconductor is one of silicon carbide, a gallium nitride-based material, and diamond.   The semiconductor device according to claim 10, wherein the groove is formed only in a peripheral region of a semiconductor element formed of the wide band gap semiconductor. A plurality of the semiconductor elements are provided,
The semiconductor device according to claim 1, wherein the plurality of semiconductor elements are two or more kinds of semiconductor elements including a power control semiconductor element and a free-wheeling diode.

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