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JP2003101194A - Production method for printed wiring board - Google Patents

Production method for printed wiring board

Info

Publication number
JP2003101194A
JP2003101194A JP2001289246A JP2001289246A JP2003101194A JP 2003101194 A JP2003101194 A JP 2003101194A JP 2001289246 A JP2001289246 A JP 2001289246A JP 2001289246 A JP2001289246 A JP 2001289246A JP 2003101194 A JP2003101194 A JP 2003101194A
Authority
JP
Japan
Prior art keywords
thin metal
metal layer
substrate
wiring
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001289246A
Other languages
Japanese (ja)
Inventor
Susumu Naoyuki
進 直之
Kenji Takai
健次 高井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP2001289246A priority Critical patent/JP2003101194A/en
Publication of JP2003101194A publication Critical patent/JP2003101194A/en
Pending legal-status Critical Current

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  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent wiring accuracy from being lowered by etching fine wiring already, molded as well when etching a thin metal layer in semi-additive method (FAM: foil additive method) for forming fine wiring, by removing the thin metal layer on the surface of an insulating substrate after adding the thin metal layer on the surface of the substrate, and forming a wiring pattern with electric plating. SOLUTION: In the FAM method, a roughened thin metal layer 2 of Ni or Ti except for copper having the thickness of <=5 μm is previously added on one side of copper foil 1 having a smooth surface, the roughened thin metal layer 2 having the thickness of <=5 μm is added on the surface of the substrate by removing the copper foil 1 after laminating a thin metal face 2 through a resin to a substrate 3, a resist 5 is removed by performing pattern electric plating after forming the pattern electric plating resist 5, and this production method for printed wiring board has a process for removing the thin metal layer 2 except for the pattern part by etching at least.

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、配線精度の高い微
細配線を有する配線板の製造方法に関する。 【0002】 【従来の技術】近年、電子機器の小型,軽量,高速化の
要求から、プリント配線板の高密度化が進んでいる。従
来、主に粗化付銅箔をエッチングすることで配線を形成
するプリント配線板は、サイドエッチングの影響で配線
の微細化が困難であり、基板の高密度化には限界があっ
た。そこで近年は、パターン電気めっきを用いたセミア
ディティブ法であるFAM工法によるプリント配線板の
製造方法が注目されている。このFAM工法は、特許番
号第3142270号にあるように、薄手銅箔層にパタ
ーン電気めっきレジストを形成した後、パターン電気め
っきを施し、めっきレジストを除去後パターン部以外の
薄手銅箔層をエッチング除去する手法であるが、この時
のエッチングにより既に形成した微細配線もエッチング
し、配線精度を低下させるなどの問題があった。 【0003】 【発明が解決しようとする課題】本発明は、FAM工法
において絶縁基材表面にNi,Tiなど銅以外の薄手金
属層を付加することにより、配線形成後の薄手金属層の
エッチング時に、選択的に銅以外の金属をエッチングす
る液を使用することにより、既に形成した微細配線のエ
ッチングを防止することを特徴とし、従来技術の問題点
を解決しようとするものである。 【0004】 【課題を解決するための手段】本発明は、次のものに関
する。 (1)絶縁基板表面に薄手の金属層を付加し、電気めっ
きにより配線パターンを形成後、基板表面の薄手金属層
を除去して微細配線を形成するセミアデイテイブ(FA
M:Foil Additive Method)工法
において、あらかじめ、表面が平滑な銅箔の片面に、厚
み5μm以下の粗化したNiまたはTiなど銅以外の薄
手金属層を付加し、薄手金属面を基板に樹脂を介してラ
ミネート後、銅箔を除去することにより基板表面に厚み
5μm以下の粗化した薄手金属層を付加し、パターン電
気めっきレジストを形成した後にパターン電気めっきを
行いレジストを除去し、パターン部以外の薄手金属層を
エッチング除去する工程を少なくとも有することを特徴
とするプリント配線板の製造方法。 【0005】 【発明の実施の形態】本発明のFAM工法配線板の製造
は、 A.あらかじめ、表面が平滑な銅箔の片面に、厚み5μ
m以下の粗化したNiまたはTiなど銅以外の金属を付
加する。銅以外の金属の付加方法は、電気めっきなどの
方法による。銅以外の金属の厚みは1から5μmが好ま
しい。この薄手金属の粗化面にはクロメート処理等密着
促進の為の異種金属処理が施されていてもよい。 【0006】B.薄手金属面を基板に樹脂を介してラミ
ネートする。樹脂としてはエポキシ系樹脂やポリイミド
系樹脂を主成分として含むものであり、他にもアクリル
樹脂,ポリイミド樹脂,ベンゾシクロブテン樹脂,フッ
素樹脂,シアネート樹脂,PPEなどや、その含有物で
もよい。 【0007】C.銅箔を除去して基板表面に薄手の金属
層を付加する。銅箔の除去は薄手金属がNiの場合、ア
ルカリエッチング液が好ましく、薄手金属がTiの場合
は、塩化第二銅あるいは塩化第二鉄液が好ましい。 【0008】D.穴明後、デスミアおよび導電化処理す
る。薄手金属層付基板に穴を形成する。穴形状は、スル
ーホールまたはブラインドスルーホール即ち層間接続の
ためのIVH(インタースティシャルバイアホール)と
なる。穴を形成する方法としては、ドリルまたはレーザ
を用いるのが好ましい。ここで用いることが出来るレー
ザとしては、CO2,エキシマ等の気体レーザおよびY
AG等の固体レーザがある。CO2レーザは、容易に大
出力を得られる事からφ50μm以上のIVHの加工に
適している。φ50μm以下の微細なIVHを加工する
場合は、より短波長で集光性のよいYAGレーザが適し
ている。 【0009】次に、過マンガン酸塩,クロム酸塩,クロ
ム酸のような酸化剤を用いて穴内部の樹脂残さを除去す
る。次に、薄手金属上及び穴内部に触媒核を付与する。
触媒核の付与には、貴金属イオンやパラジウムコロイド
を使用する。特にパラジウムコロイドを使用するのが安
価で好ましい。次に、触媒核を付与した薄手金属上及び
穴内部に薄付けの無電解めっき層を形成する。この無電
解めっきには、CUST2000(日立化成工業株式会
社製、商品名)やCUST201(日立化成工業株式会
社製、商品名)等の市販の無電解銅めっきが使用出来
る。これらの無電解銅めっきは硫酸銅,ホルマリン,錯
化剤,水酸化ナトリウムを主成分とする。めっきの厚さ
は次の電気めっきが行なえる厚さであれば良く、0.1
〜1μm程度である。 【0010】E.無電解めっきを行った上にめっきレジ
ストで配線パターンを形成する。めっきレジストの膜厚
は、その後めっきする導体の厚さと同程度かより厚くす
るのが好ましい。めっきレジストに使用できる樹脂に
は、PMER P−LA900PM(東京応化株式会社
製、商品名)のような液状レジストや、HW−425
(日立化成工業株式会社,商品名),RY−3025
(日立化成工業株式会社,商品名)等のドライフィルム
がある。スルーホールまたはIVH上と導体回路となる
べき個所は、めっきレジストを形成しない。 【0011】F.電気めっきによりパターンめっきを施
す。電気めっきには、通常プリント配線板で使用される
硫酸銅電気めっきやピロリン酸電気めっきが使用でき
る。めっきの厚さは、配線導体として使用できれば良
く、1〜100μmの範囲が好ましく、5〜50μmの
範囲がより好ましい。 【0012】G.めっきレジストを除去後、絶縁基板上
の無電解銅めっき及び薄手金属層を除去する。めっきレ
ジストの剥離は、アルカリ性剥離液や硫酸あるいは市販
のレジスト剥離液を用いて行う。次に硫酸/過酸化水素
を主成分とするエッチング液で無電解銅めっきを除去
し、パターン部以外のNi層を硝酸/過酸化水素を主成
分とするエッチング液を用いて選択除去する。以上で配
線形成が終了する。 【0013】さらに本発明の具体的実施形態を図面を用
いて説明する。但し、本発明はこれに限定されるもので
はない。 【0014】18μm厚の表面平滑銅箔1(a)に3μ
m厚のNi粗化めっきを施した後(b)、Ni面を介し
厚さ0.2mmのプリプレグ3(ガラス布をエポキシ樹
脂に含浸積層したもの)に170℃3MPaの条件で6
0分加熱加圧積層熱圧着し、アルカリエッチングにより
銅箔を除去して基板表面に3μm厚のNi層を形成した
(d)。 【0015】次に、ドリル穴明機ND−6P160/1
0P(日立ビアメカニクス株式会社製,商品名)によ
り、直径300μmの貫通穴をあけ、過マンガン酸カリ
ウム65g/リットルと水酸化ナトリウム40g/リッ
トルの混合水溶液に、液温70℃で20分間浸漬し、ス
ミアの除去を行なった。その後、パラジウム溶液である
HS−202B(日立化成工業株式会社製,商品名)
に、25℃で15分間浸漬し、触媒を付与した後、CU
ST−201(日立化成工業株式会社製,商品名)を使
用し、液温25℃,30分の条件で無電解銅めっきを行
ない、厚さ0.3μmの無電解銅めっき層を形成した
(e)。 【0016】ドライフィルムフォトレジストであるRY
−3025(日立化成工業株式会社製,商品名)を無電
解めっき層の表面にラミネートし、電気銅めっきを施す
箇所をマスクしたフォトマスクを介して紫外線を露光
し、現像してめっきレジストを形成した(f)。硫酸銅
浴を用いて、液温25℃、電流密度1.0A/dm
条件で、電気銅めっきを20μm程度施し、回路導体幅
/回路導体間隔(L/S)=20/20μmとなるよう
に電気銅めっき層を形成した(g)。 【0017】次に、レジスト剥離液であるHTO(ニチ
ゴー・モートン株式会社製,商品名)でドライフィルム
の除去を行った。その後硫酸/過酸化水素を主成分とす
るエッチング液により無電解銅めっきを除去し、さらに
硝酸/過酸化水素の組成であるNi選択エッチング液N
−950A(メルテックス株式会社製、商品名)を用い
てパターン部以外のNiをエッチング除去することによ
り配線板を製作した(h)。 【0018】 【発明の効果】基板上の薄手導体層をエッチングで除去
する際、既に形成した配線のエッチングを防止すること
が出来、精度の高い配線を得ることが出来た。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a wiring board having fine wiring with high wiring accuracy. 2. Description of the Related Art In recent years, the demand for smaller, lighter, and faster electronic devices has increased the density of printed wiring boards. Conventionally, in a printed wiring board in which wiring is mainly formed by etching a roughened copper foil, it is difficult to miniaturize the wiring due to the influence of side etching, and there has been a limit in increasing the density of a substrate. Therefore, in recent years, a method of manufacturing a printed wiring board by the FAM method, which is a semi-additive method using pattern electroplating, has attracted attention. In this FAM method, as described in Japanese Patent No. 3142270, after forming a pattern electroplating resist on a thin copper foil layer, pattern electroplating is performed, and after removing the plating resist, the thin copper foil layer other than the pattern portion is etched. Although this is a method of removing, there has been a problem that the fine wiring already formed by the etching at this time is also etched, thereby lowering the wiring accuracy. [0003] The present invention relates to a method of etching a thin metal layer after forming a wiring by adding a thin metal layer other than copper, such as Ni or Ti, to the surface of an insulating substrate in the FAM method. Another object of the present invention is to solve the problems of the prior art, by using a solution for selectively etching a metal other than copper to prevent the already formed fine wiring from being etched. [0004] The present invention relates to the following. (1) A semi-additive (FA) in which a thin metal layer is added to the surface of an insulating substrate, a wiring pattern is formed by electroplating, and the thin metal layer on the surface of the substrate is removed to form fine wiring.
In the M: Foil Additive Method) method, a thin metal layer other than copper such as roughened Ni or Ti having a thickness of 5 μm or less is previously added to one side of a copper foil having a smooth surface, and the thin metal surface is coated with a resin. After laminating through, a copper foil is removed to add a roughened thin metal layer having a thickness of 5 μm or less to the substrate surface, a pattern electroplating resist is formed, pattern electroplating is performed, and the resist is removed. A method for manufacturing a printed wiring board, comprising at least a step of etching and removing a thin metal layer. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The production of the FAM method wiring board of the present invention is described in the following. Beforehand, on one side of copper foil with smooth surface, thickness 5μ
A metal other than copper, such as m or less of roughened Ni or Ti, is added. The method of adding a metal other than copper is based on a method such as electroplating. The thickness of the metal other than copper is preferably 1 to 5 μm. The roughened surface of the thin metal may be subjected to a dissimilar metal treatment for promoting adhesion, such as a chromate treatment. B. A thin metal surface is laminated on a substrate via a resin. The resin contains an epoxy-based resin or a polyimide-based resin as a main component, and may be an acrylic resin, a polyimide resin, a benzocyclobutene resin, a fluororesin, a cyanate resin, PPE, or the like. C. The copper foil is removed and a thin metal layer is added to the substrate surface. When the thin metal is Ni, an alkali etching solution is preferable for removing the copper foil, and when the thin metal is Ti, a cupric chloride or a ferric chloride solution is preferable. [0008] D. After drilling, desmearing and conductivity treatment are performed. A hole is formed in the substrate with a thin metal layer. The hole shape is a through hole or a blind through hole, that is, an IVH (interstitial via hole) for interlayer connection. As a method for forming the holes, it is preferable to use a drill or a laser. Lasers that can be used here include gas lasers such as CO2 and excimer and Y
There are solid state lasers such as AG. The CO2 laser is suitable for processing an IVH having a diameter of 50 μm or more because a large output can be easily obtained. In the case of processing a fine IVH having a diameter of 50 μm or less, a YAG laser having a shorter wavelength and a good condensing property is suitable. Next, the resin residue inside the hole is removed by using an oxidizing agent such as permanganate, chromate or chromate. Next, a catalyst core is provided on the thin metal and inside the hole.
Noble metal ions or palladium colloids are used to provide the catalyst nuclei. In particular, it is preferable to use a palladium colloid at a low cost. Next, a thin electroless plating layer is formed on the thin metal provided with the catalyst nucleus and inside the hole. For this electroless plating, commercially available electroless copper plating such as CUST2000 (trade name, manufactured by Hitachi Chemical Co., Ltd.) or CUST 201 (trade name, manufactured by Hitachi Chemical Co., Ltd.) can be used. These electroless copper platings contain copper sulfate, formalin, a complexing agent, and sodium hydroxide as main components. The thickness of the plating may be any thickness as long as the next electroplating can be performed.
11 μm. E. After performing electroless plating, a wiring pattern is formed with a plating resist. The thickness of the plating resist is preferably equal to or greater than the thickness of the conductor to be subsequently plated. Resins that can be used for the plating resist include liquid resists such as PMER P-LA900PM (trade name, manufactured by Tokyo Ohka Co., Ltd.) and HW-425.
(Hitachi Chemical Industries, Ltd., trade name), RY-3025
(Hitachi Chemical Industries, Ltd.). No plating resist is formed on the through-hole or on the IVH to become a conductor circuit. F. Pattern plating is performed by electroplating. For the electroplating, copper sulfate electroplating and pyrophosphoric acid electroplating usually used for printed wiring boards can be used. The plating thickness may be any thickness as long as it can be used as a wiring conductor, and is preferably in the range of 1 to 100 μm, more preferably in the range of 5 to 50 μm. G. After removing the plating resist, the electroless copper plating and the thin metal layer on the insulating substrate are removed. Stripping of the plating resist is performed using an alkaline stripping solution, sulfuric acid, or a commercially available resist stripping solution. Next, the electroless copper plating is removed with an etching solution containing sulfuric acid / hydrogen peroxide as a main component, and the Ni layer other than the pattern portion is selectively removed using an etching solution containing nitric acid / hydrogen peroxide as a main component. This completes the wiring formation. Further, a specific embodiment of the present invention will be described with reference to the drawings. However, the present invention is not limited to this. 3 μm on 18 μm thick smooth surface copper foil 1 (a)
After the Ni roughening plating having a thickness of m is applied (b), the prepreg 3 (a glass cloth impregnated and laminated with an epoxy resin) having a thickness of 0.2 mm is coated on the prepreg 3 at a temperature of 170 ° C. and 3 MPa through a Ni surface.
The laminate was heat-pressed and laminated by thermocompression for 0 minutes, and the copper foil was removed by alkali etching to form a 3 μm thick Ni layer on the substrate surface (d). Next, a drilling machine ND-6P160 / 1
A through hole having a diameter of 300 μm was made with 0P (trade name, manufactured by Hitachi Via Mechanics Co., Ltd.), and immersed in a mixed aqueous solution of 65 g / l of potassium permanganate and 40 g / l of sodium hydroxide at a liquid temperature of 70 ° C. for 20 minutes. And the smear was removed. Thereafter, HS-202B (trade name, manufactured by Hitachi Chemical Co., Ltd.) which is a palladium solution
Immersion at 25 ° C. for 15 minutes to give a catalyst,
Using ST-201 (trade name, manufactured by Hitachi Chemical Co., Ltd.), electroless copper plating was performed at a liquid temperature of 25 ° C. for 30 minutes to form an electroless copper plating layer having a thickness of 0.3 μm ( e). RY which is a dry film photoresist
-3025 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is laminated on the surface of the electroless plating layer, exposed to ultraviolet light through a photomask masking a portion to be subjected to electrolytic copper plating, and developed to form a plating resist. (F). Using a copper sulfate bath, under conditions of a liquid temperature of 25 ° C. and a current density of 1.0 A / dm 2 , electrolytic copper plating is applied to about 20 μm, and the circuit conductor width / circuit conductor interval (L / S) = 20/20 μm. Thus, an electrolytic copper plating layer was formed (g). Next, the dry film was removed with HTO (trade name, manufactured by Nichigo Morton Co., Ltd.) as a resist stripping solution. Thereafter, the electroless copper plating is removed with an etching solution containing sulfuric acid / hydrogen peroxide as a main component, and a Ni selective etching solution N having a nitric acid / hydrogen peroxide composition.
Using -950A (trade name, manufactured by Meltex Co., Ltd.), a wiring board was manufactured by etching away Ni except for the pattern portion (h). When the thin conductive layer on the substrate is removed by etching, etching of the already formed wiring can be prevented, and a highly accurate wiring can be obtained.

【図面の簡単な説明】 【図1】本発明の実施例を説明するための各工程におけ
る断面図である。 【符号の説明】 1.平滑銅箔 2.Ni粗化層 3.プリプレグ 4.無電解銅めっき 5.めっきレジスト 6.電気銅めっき
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view in each step for explaining an example of the present invention. [Explanation of reference numerals] 1. smooth copper foil 2. Roughened Ni layer Prepreg4. 4. Electroless copper plating Plating resist6. Electro copper plating

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 4E351 AA03 AA04 AA05 BB01 BB33 BB35 CC06 CC19 DD04 DD11 DD19 DD56 GG20 5E343 AA02 AA13 AA15 AA17 AA18 AA19 BB16 BB24 BB35 BB44 BB67 CC34 CC50 CC62 CC73 DD44 DD51 EE54 ER02 ER16 ER18 ER26 GG08    ────────────────────────────────────────────────── ─── Continuation of front page    F term (reference) 4E351 AA03 AA04 AA05 BB01 BB33                       BB35 CC06 CC19 DD04 DD11                       DD19 DD56 GG20                 5E343 AA02 AA13 AA15 AA17 AA18                       AA19 BB16 BB24 BB35 BB44                       BB67 CC34 CC50 CC62 CC73                       DD44 DD51 EE54 ER02 ER16                       ER18 ER26 GG08

Claims (1)

【特許請求の範囲】 【請求項1】 絶縁基板表面に薄手の金属層を付加し、
電気めっきにより配線パターンを形成後、基板表面の薄
手金属層を除去して微細配線を形成するセミアデイテイ
ブ(FAM:Foil Additive Metho
d)工法において、あらかじめ、表面が平滑な銅箔の片
面に、厚み5μm以下の粗化したNiまたはTiなど銅
以外の薄手金属層を付加し、薄手金属面を基板に樹脂を
介してラミネート後、銅箔を除去することにより基板表
面に厚み5μm以下の粗化した薄手金属層を付加し、パ
ターン電気めっきレジストを形成した後にパターン電気
めっきを行いレジストを除去し、パターン部以外の薄手
金属層をエッチング除去する工程を少なくとも有するこ
とを特徴とするプリント配線板の製造方法。
Claims: 1. A thin metal layer is added to the surface of an insulating substrate,
After a wiring pattern is formed by electroplating, a thin metal layer on the substrate surface is removed to form a fine wiring (FAM: Foil Additive Metho).
d) In the construction method, a thin metal layer other than copper such as roughened Ni or Ti having a thickness of 5 μm or less is added to one side of a copper foil having a smooth surface in advance, and the thin metal surface is laminated on a substrate via a resin. Then, a roughened thin metal layer having a thickness of 5 μm or less is added to the substrate surface by removing the copper foil, a pattern electroplating resist is formed, and then the pattern electroplating is performed to remove the resist, and the thin metal layer other than the pattern portion is removed. A method for manufacturing a printed wiring board, comprising at least a step of removing a substrate by etching.
JP2001289246A 2001-09-21 2001-09-21 Production method for printed wiring board Pending JP2003101194A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001289246A JP2003101194A (en) 2001-09-21 2001-09-21 Production method for printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001289246A JP2003101194A (en) 2001-09-21 2001-09-21 Production method for printed wiring board

Publications (1)

Publication Number Publication Date
JP2003101194A true JP2003101194A (en) 2003-04-04

Family

ID=19111767

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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006334694A (en) * 2005-05-31 2006-12-14 Ibiden Co Ltd Method of manufacturing drill and printed circuit board
JP2013038120A (en) * 2011-08-04 2013-02-21 Fujikura Ltd Manufacturing method of printed-wiring board
CN103002663A (en) * 2011-09-09 2013-03-27 深南电路有限公司 Printed circuit board processing method
US10314608B2 (en) 2007-02-05 2019-06-11 Boston Scientific Scimed Inc. Thrombectomy apparatus and method
US11490909B2 (en) 2014-05-19 2022-11-08 Walk Vascular, Llc Systems and methods for removal of blood and thrombotic material
US11497521B2 (en) 2008-10-13 2022-11-15 Walk Vascular, Llc Assisted aspiration catheter system
US11510689B2 (en) 2016-04-06 2022-11-29 Walk Vascular, Llc Systems and methods for thrombolysis and delivery of an agent
US11672561B2 (en) 2015-09-03 2023-06-13 Walk Vascular, Llc Systems and methods for manipulating medical devices
US11678905B2 (en) 2018-07-19 2023-06-20 Walk Vascular, Llc Systems and methods for removal of blood and thrombotic material
US12171444B2 (en) 2021-02-15 2024-12-24 Walk Vascular, Llc Systems and methods for removal of blood and thrombotic material
US12274458B2 (en) 2021-02-15 2025-04-15 Walk Vascular, Llc Systems and methods for removal of blood and thrombotic material

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JPH03254178A (en) * 1990-03-05 1991-11-13 Hitachi Chem Co Ltd Manufacture of wiring board
JPH05167220A (en) * 1991-12-12 1993-07-02 Hitachi Chem Co Ltd Manufacture of wiring board
JPH07226575A (en) * 1994-02-14 1995-08-22 Hitachi Chem Co Ltd Manufacture of printed wiring board

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JPH03254178A (en) * 1990-03-05 1991-11-13 Hitachi Chem Co Ltd Manufacture of wiring board
JPH05167220A (en) * 1991-12-12 1993-07-02 Hitachi Chem Co Ltd Manufacture of wiring board
JPH07226575A (en) * 1994-02-14 1995-08-22 Hitachi Chem Co Ltd Manufacture of printed wiring board

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006334694A (en) * 2005-05-31 2006-12-14 Ibiden Co Ltd Method of manufacturing drill and printed circuit board
US10314608B2 (en) 2007-02-05 2019-06-11 Boston Scientific Scimed Inc. Thrombectomy apparatus and method
US11653945B2 (en) 2007-02-05 2023-05-23 Walk Vascular, Llc Thrombectomy apparatus and method
US11497521B2 (en) 2008-10-13 2022-11-15 Walk Vascular, Llc Assisted aspiration catheter system
US12329406B2 (en) 2008-10-13 2025-06-17 Walk Vascular, Llc Assisted aspiration catheter system
JP2013038120A (en) * 2011-08-04 2013-02-21 Fujikura Ltd Manufacturing method of printed-wiring board
CN103002663A (en) * 2011-09-09 2013-03-27 深南电路有限公司 Printed circuit board processing method
US12150659B2 (en) 2014-05-19 2024-11-26 Walk Vascular, Llc Systems and methods for removal of blood and thrombotic material
US11490909B2 (en) 2014-05-19 2022-11-08 Walk Vascular, Llc Systems and methods for removal of blood and thrombotic material
US12156665B2 (en) 2014-05-19 2024-12-03 Walk Vascular, Llc Systems and methods for removal of blood and thrombotic material
US11672561B2 (en) 2015-09-03 2023-06-13 Walk Vascular, Llc Systems and methods for manipulating medical devices
US11510689B2 (en) 2016-04-06 2022-11-29 Walk Vascular, Llc Systems and methods for thrombolysis and delivery of an agent
US11678905B2 (en) 2018-07-19 2023-06-20 Walk Vascular, Llc Systems and methods for removal of blood and thrombotic material
US12171444B2 (en) 2021-02-15 2024-12-24 Walk Vascular, Llc Systems and methods for removal of blood and thrombotic material
US12171445B2 (en) 2021-02-15 2024-12-24 Walk Vascular, Llc Systems and methods for removal of blood and thrombotic material
US12274458B2 (en) 2021-02-15 2025-04-15 Walk Vascular, Llc Systems and methods for removal of blood and thrombotic material

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