JP4453703B2 - Printed wiring board - Google Patents

Description

  The present invention relates to a method for producing a printed wiring board having good fine wiring formability and a printed wiring board obtained thereby.

In recent years, there has been an increasing demand for smaller, lighter, and faster electronic devices, and the density of printed wiring boards has been increasing. A conventional printed wiring board manufactured by etching copper has a limit in miniaturization of wiring due to the influence of side etching, and has a limit in increasing the density of the substrate. Therefore, in recent years, a method for producing a printed wiring board by a semi-additive method using electroplating has attracted attention. In this semi-additive method, as shown in Patent Document 1, after forming a hole to be IVH with a laser or the like on the surface of the resin on which a circuit is to be formed, unevenness of several μm is formed on the resin by chemical roughening or plasma treatment, In this method, a Pd catalyst is applied, electroless plating of about 1 μm is performed, a pattern electroplating resist is formed, a circuit is formed by pattern electroplating, and then the resist and unnecessary portions of electroless plating are removed.
Japanese Patent Laid-Open No. 11-186716

  However, when circuit formation is performed by the semi-additive method described above, it is difficult to remove Pd in a subsequent step in order to provide a Pd catalyst for directly forming an electroless copper plating layer on the insulating resin. If Pd remains on the insulating resin, problems such as a decrease in insulation reliability and problems such as Ni / Au plating being deposited on the resin occur.

  Further, in order to improve adhesion, it is necessary to form unevenness of several μm on the insulating resin by chemical roughening, plasma treatment or the like. However, the roughening is insufficient and the trouble that the conductor circuit is peeled off easily occurs. .

  Furthermore, when a circuit is formed on the interlayer insulating resin with copper foil by the semi-additive method, there is a drawback that excessive melting of the conductor circuit is unavoidable and the top width of the conductor circuit becomes extremely thin.

  The present invention provides a method for manufacturing a printed wiring board that is less likely to cause the above-described problems, has few short-circuit defects between conductor circuits, suppresses dissolution of conductor circuits, and has good circuit formability.

  In order to solve the above-described problems, the present invention provides a step of laminating an interlayer insulating resin having a copper foil of 5 μm or less on the upper and lower surfaces of an inner layer circuit board having a conductor circuit, and an interlayer connection to the inner layer circuit board. Forming an IVH (interstitial via hole), performing a thin electroless copper plating as a power supply layer, forming an electroplating resist, and then performing an electrocopper plating, removing the electroplating resist, And a step of forming a conductor circuit pattern by etching away copper other than the portion of the printed wiring board. Moreover, you may laminate | stack copper foil with a thickness of 5 micrometers or less through the prepreg on the upper and lower surfaces of the inner-layer circuit board in the said lamination process.

  According to this feature, the catalyst is adsorbed not on the insulating resin but on the copper foil, so that the catalyst can be easily removed. Further, since the electroless copper plating layer is formed on the copper foil, There is no need to roughen the resin.

  In addition, the present invention is characterized in that the etching rate of the electrolytic copper plating when the copper other than the pattern portion is removed by etching is 80% or less of the etching rate of the copper foil. Furthermore, in order to control such an etching rate, use a copper foil produced at a current density larger than the current density at the time of electrolytic copper plating as a copper foil having a thickness of 5 μm or less to be attached to an interlayer insulating resin or prepreg, It is also a feature of the present invention that an etching solution mainly containing an acid excluding halogen and hydrogen peroxide is used for etching removal.

  Generally, the crystal structure of electrolytic copper produced at a high current density is different from that produced at a low current density. In addition, since the main components of the etching liquid as described above are weakly diffusion-controlled and reaction-controlled, the etching rate varies depending on the crystal structure of copper. That is, the copper foil of the present invention manufactured with a high density current is easily etched, and the copper electroplating of the present invention applied with a lower density current is difficult to etch, so that copper other than the pattern portion is quickly removed. Thus, a significant decrease in the top width of the conductor circuit is suppressed, and a printed wiring board with good circuit formability can be manufactured. In particular, when sulfuric acid is used as an acid excluding halogen, which is the main component of the etching solution, very good fine wiring formability is brought about. In addition, since the difference in etching rate due to the difference in crystal structure is conspicuous during low-temperature etching, the etching solution temperature should be as low as possible to suppress excessive dissolution of the conductor circuit, resulting in better fine wiring. Will form.

  The present invention is also characterized by including a step of forming an electroless Ni / Au plating layer on the outermost surface of the conductor circuit.

  With the features of the present invention as described above, it is possible to provide a printed wiring board having high reliability and good circuit formation.

  The term “current density” used in the present invention represents the magnitude of current per unit area of the electrode, and is used in the ordinary sense understood by those skilled in the art.

  According to the present invention, it is possible to produce a printed wiring board having few short-circuit defects between conductor circuits and having good circuit formability.

  Hereinafter, the manufacturing method of the printed wiring board by this invention is demonstrated still in detail using FIG.

  First, an insulating base material is processed to produce an inner layer circuit board. The formation of the conductor circuit on the surface of the insulating base material is generally a subtractive method performed by etching a copper-clad laminate, but is not particularly limited. Further, through holes such as through holes are formed in the insulating base material to form an inner layer conductor circuit, thereby obtaining an inner layer circuit board. Although FIG. 1A shows a single-layer double-sided board, the inner-layer circuit board may be a multilayer board.

  Next, it is necessary to roughen the inner layer copper pattern on the surface of the inner layer circuit board and improve the adhesion to the interlayer resin insulating layer formed on the copper pattern. Specifically, there are a method of forming acicular electroless plating on the inner layer copper pattern, a method of oxidizing (blackening) -reducing the inner layer copper pattern, a method of etching the inner layer copper pattern, and the like.

Next, an interlayer insulating resin with copper foil is laminated on the inner layer circuit board obtained as described above as shown in FIG. The interlayer insulating resin preferably contains an epoxy resin or a polyimide resin as a main component, but in addition, an acrylic resin, a polyimide resin, a benzocyclobutene resin, a fluororesin, a cyanate resin, PPE, or the like, or a content thereof Good. Instead of laminating the interlayer insulating resin with copper foil, the copper foil may be laminated via a prepreg. The thickness of the interlayer resin insulation layer is about 10 to 100 μm, desirably 20 to 60 μm, and the thickness of the copper foil is preferably 5 μm or less. The copper foil used here may be any copper foil produced at a current density higher than that at the time of electrolytic copper plating, but one produced at a current density of 5 A / dm ² or more is preferably used. If the current density at the time of producing the copper foil is low, there is a problem that the etching rate is slow in the subsequent etching process, which hinders circuit formation.

Next, as shown in FIG. 1C, IVH is formed on the interlayer resin insulation layer from above the copper foil. As a method of forming IVH, it is preferable to use a laser. Examples of the laser that can be used here include gas lasers such as CO ₂ , CO, and excimer, and solid lasers such as YAG. Since a CO ₂ laser can easily obtain a large output, it is suitable for processing IVH of φ50 μm or more. When processing a fine IVH of φ50 μm or less, a YAG laser with a shorter wavelength and good condensing property is suitable.

  Next, the resin residue inside IVH is removed using an oxidizing agent such as permanganate, chromate, or chromic acid.

  Next, catalyst nuclei are applied on the copper foil and inside the IVH. A precious metal ion or a palladium colloid is used for imparting the catalyst nucleus. In particular, it is preferable to use palladium colloid because it is inexpensive.

  Next, as shown in FIG. 1D, a thin electroless plating layer is formed on the copper foil provided with the catalyst nucleus and inside the IVH. For this electroless plating, commercially available products mainly composed of copper sulfate, formalin, complexing agent, sodium hydroxide and the like can be used. For example, CUST2000 (trade name, manufactured by Hitachi Chemical Co., Ltd.) or CUST201 (Hitachi). The product name, manufactured by Kasei Kogyo Co., Ltd., and the like are listed, but not limited thereto. The thickness of plating should just be the thickness which can perform the following electrolytic copper plating, Preferably it is 0.1-1 micrometer.

  Next, as shown in FIG. 1E, an electroplating resist is formed on the IVH on the electroless plating layer and at portions other than the conductor circuit. The thickness of the electroplating resist is preferably the same as or thicker than the conductor to be subsequently plated. Resins that can be used for the electroplating resist include liquid resists such as PMER P-LA900PM (trade name, manufactured by Tokyo Ohka Co., Ltd.), HW-425 (trade name, Hitachi Chemical Co., Ltd.), RY-3025 (Hitachi). There are dry films such as Kasei Kogyo Co., Ltd. (trade name).

Next, an electrolytic copper plating layer is formed as shown in FIG. For copper electroplating, copper sulfate electroplating or pyrophosphoric acid electroplating, which are usually used for printed wiring boards, can be used. The thickness of electrolytic copper plating should just be used as a conductor circuit, it is preferable that it is the range of 1-100 micrometers, and it is more preferable that it is the range of 5-50 micrometers. In addition, the current density at the time of forming the copper electroplating layer may be smaller than the current density at the time of producing a copper foil having a thickness of 5 μm or less, but is preferably 0.5 A / dm ² or more and 5 A / dm ² or less. If the current density at the time of forming the copper electroplating layer is higher than the current density at the time of copper foil preparation, it will be easily dissolved excessively in the subsequent etching step, which hinders the formation of a good circuit.

  Next, the electroplating resist is stripped using an alkaline stripping solution, sulfuric acid, or a commercially available resist stripping solution.

  Next, the formation of the circuit is completed by removing the copper other than the pattern portion by using an etching solution mainly composed of an acid other than halogen and hydrogen peroxide. (FIG. 1 (g)) The etching solution of the present invention is a solution comprising a solvent and an additive in addition to the above main components. As the solvent, water is preferably used from the viewpoint of cost, handleability, and safety. Alcohol etc. may be added to. In addition, a hydrogen peroxide stabilizer or the like can be added as an additive. Furthermore, sulfuric acid, nitric acid, etc. are mentioned as acids other than the halogen which are the main components of this invention, Preferably, a sulfuric acid is used.

  In order to obtain the top width and the bottom width of the conductor circuit as designed by etching away the copper other than the pattern portion using the etching solution of the present invention, the etching rate of the copper electroplating is the same as the etching rate of the copper foil. It is preferable that it is 80% or less.

  When sulfuric acid is used as the acid other than halogen, it is preferable to use 10 to 300 g / L sulfuric acid and 10 to 200 g / L hydrogen peroxide as the concentration of the main component of the etching solution. When the concentration is lower than the above-mentioned concentration range, the workability is poor because the etching rate is low, and when the concentration is higher than the above-mentioned concentration region, the etching rate is high, and it is difficult to control the etching amount. Moreover, it is preferable from the surface of workability | operativity to control so that it may become 1-15 micrometers / min as an etching rate of copper foil. Moreover, since the difference in etching rate due to the difference in crystal structure depends on the temperature of the etching solution, the temperature of the etching solution at the time of etching removal is preferably 20 to 50 ° C., more preferably 20 to 40 ° C. preferable. Further, as the etching time, a time during which a desired conductor circuit width can be formed may be determined by experiments, but it is preferably in the range of 10 seconds to 10 minutes for workability, etching uniformity, and the like. .

  Furthermore, a gold plating process can also be performed on the conductor circuit pattern formed as described above. As a method for forming the gold plating layer, after activation of the conductor circuit interface with an activation treatment solution such as SA-100 (trade name, manufactured by Hitachi Chemical Co., Ltd.), NIPS-100 (Hitachi Chemical Industry) A nickel layer of about 1 to 10 μm is formed by an electroless nickel plating solution such as a product name manufactured by Co., Ltd., and HGS-100 (product name manufactured by Hitachi Chemical Co., Ltd.) is formed on the upper surface of the nickel layer. A gold plating base layer of about 0.01 to 0.1 μm is formed with a displacement gold plating solution, and further, an electroless gold plating solution such as HGS-2000 (manufactured by Hitachi Chemical Co., Ltd., trade name) is formed on the upper surface thereof. Although a method of forming a gold plating finish layer of about 1 to 1 μm is mentioned, of course, the method is not limited to this, and any method suitable for a gold plating process that can be normally performed may be used.

Example 1
As shown to Fig.1 (a), MCL-E-679 (MCL-E-679) which is a 0.2 mm-thick glass cloth base epoxy copper clad laminated board which bonded the copper foil of thickness 18 micrometers on both surfaces to the insulating base material. The copper foil of the unnecessary part was removed by etching using Hitachi Chemical Co., Ltd. (trade name) to form the through-hole 12 to form the inner-layer conductor circuit 10 and the inner-layer circuit board 11 was produced.

  Using the MEC etch BOND CZ-8100 (trade name, manufactured by MEC Co., Ltd.), the inner layer conductor circuit 10 of the inner layer circuit board 11 is spray sprayed at a liquid temperature of 35 ° C. and a spray pressure of 0.15 MP. The copper surface is roughened to create irregularities with a roughness of about 3 μm, and immersed using MEC etch BOND CL-8300 (trade name, manufactured by MEC Co., Ltd.) at a liquid temperature of 25 ° C. and an immersion time of 20 seconds. The copper surface was subjected to rust prevention treatment.

As shown in FIG. 1 (b), MCF-7000LX (manufactured by Hitachi Chemical Co., Ltd.) manufactured by applying an adhesive to a 3 μm copper foil 13 produced at a current density of 10 A / dm ^{2 on} both surfaces of the inner layer circuit board 11. Name) was heated and pressurized laminated at 170 ° C. and 30 kgf / cm ² for 60 minutes to form an interlayer insulating resin layer 14 having a thickness of 40 μm.

  As shown in FIG.1 (c), IVH15 which is a non-through-hole with a diameter of 80 micrometers is opened from the copper foil 13 by the carbon dioxide impact laser drilling machine L-500 (product name made by Sumitomo Heavy Industries, Ltd.) Smear was removed by immersing in a mixed aqueous solution of potassium permanganate 65 g / L and sodium hydroxide 40 g / L at a liquid temperature of 70 ° C. for 20 minutes.

  Then, after immersing in HS-202B (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is a palladium solution, at 25 ° C. for 15 minutes to give a catalyst, CUST-201 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is used. Then, electroless copper plating was performed at a liquid temperature of 25 ° C. for 30 minutes to form an electroless copper plating layer 16 having a thickness of 0.3 μm as shown in FIG.

  As shown in FIG.1 (e), the place which laminates the dry film photoresist RY-3025 (made by Hitachi Chemical Co., Ltd., brand name) on the surface of the electroless-plating layer 16, and performs electro copper plating. The electroplating resist 17 was formed by exposing and developing ultraviolet rays through the masked photomask.

As shown in FIG. 1 (f), using a copper sulfate bath, electrolytic copper plating is performed at a liquid temperature of 25 ° C. and a current density of 1.0 A / dm ² for about 20 μm, and the circuit conductor width / circuit conductor interval ( The copper electroplating layer 18 was formed so that L / S) = 35/25 μm.

Next, as shown in FIG. 1 (g), after removing the electroplating resist 17 with HTO (trade name, manufactured by Nichigo-Morton Co., Ltd.) which is a resist stripping solution, 20 g / L of sulfuric acid as a main component, peroxide Copper other than the pattern portion was removed by etching using an etchant having a composition of hydrogen 10 g / L. At the time of etching, the substrate was cut into small pieces of 1 dm ² on one side, placed in a 1 L beaker, and etched at 40 ° C. for 5 minutes using a magnetic stirrer.

Finally, a Ni / Au plating layer 19 was formed on the conductor circuit under the conditions shown in Table 1 (FIG. 1 (h)).

Example 2
A substrate was produced in the same manner as in Example 1 except that electrolytic copper plating was performed at a current density of 3 A / dm ² .

Example 3
A substrate was prepared in the same manner as in Example 1 except that the main components of the etching solution were sulfuric acid 20 g / L, hydrogen peroxide 40 g / L, and the etching time was 60 seconds.

Example 4
A substrate was prepared in the same manner as in Example 3 except that electrolytic copper plating was performed at a current density of 3 A / dm ² .

Example 5
A substrate was produced in the same manner as in Example 1 except that the main components of the etching solution were sulfuric acid 20 g / L, hydrogen peroxide 40 g / L, the etching temperature was 30 ° C., and the etching time was 100 seconds.

Example 6
A substrate was prepared in the same manner as in Example 5 except that the electrolytic copper plating was performed at a current density of 3 A / dm ² .

Example 7
A substrate was prepared in the same manner as in Example 1 except that the composition of the main components of the etching solution was 20 g / L nitric acid and 10 g / L hydrogen peroxide.

Example 8
A substrate was prepared in the same manner as in Example 1 except that the main components of the etching solution were sulfuric acid 200 g / L and hydrogen peroxide 200 g / L.

Comparative Example 1
A substrate was prepared in the same manner as in Example 1 except that the main components of the etching solution were sulfuric acid 20 g / L, hydrogen peroxide 20 g / L, the etching temperature was 60 ° C., and the etching time was 100 seconds.

Comparative Example 2
A substrate was prepared in the same manner as in Example 1 except that 30 g / L of FeCl ₃ aqueous solution was used for etching copper other than the pattern portion.

Comparative Example 3
A substrate was prepared in the same manner as in Example 1 except that 40 g / L of CuCl ₂ aqueous solution and 30 g / L of hydrochloric acid were used for etching copper other than the pattern portion.

Comparative Example 4
Example 1 except that etching of copper other than the pattern portion was performed at 30 ° C. for 30 seconds using A process liquid (trade name, manufactured by Meltex Co., Ltd.) containing tetraamminecopper chloride (II) as a main component. Similarly, a substrate was prepared.

Comparative Example 5
As shown in FIG. 2 (a), MCL-E-679, which is a 0.2 mm thick glass cloth base epoxy copper-clad laminate in which an 18 μm thick copper foil is bonded to both sides of an insulating base material. The copper foil of the unnecessary location was removed by etching using Hitachi Chemical Co., Ltd. (trade name), the through hole 22 was formed, the inner conductor circuit 20 was formed, and the inner circuit board 21 was produced.

  The inner layer conductor circuit 20 of the inner layer circuit board 21 is subjected to a spray spraying process using a MEC etch BOND CZ-8100 (trade name, manufactured by MEC Co., Ltd.) at a liquid temperature of 35 ° C. and a spray pressure of 0.15 MP. The copper surface is roughened to create irregularities with a roughness of about 3 μm, and immersed using MEC etch BOND CL-8300 (trade name, manufactured by MEC Co., Ltd.) at a liquid temperature of 25 ° C. and an immersion time of 20 seconds. Then, a rust prevention treatment was performed on the copper surface.

  As shown in FIG. 2 (b), BL-9700 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is an insulating adhesive, is applied on both surfaces of the inner layer circuit board 21 to a thickness of 40 μm, and is heated at 170 ° C. for 60 minutes. The interlayer insulating resin layer 24 was formed by heating.

  As shown in FIG. 2 (c), a carbon dioxide impact laser drilling machine L-500 (trade name, manufactured by Sumitomo Heavy Industries, Ltd.) was used to open IVH25, which is a non-through hole having a diameter of 80 μm, and 65 g of potassium permanganate. / L and 40 g / L of sodium hydroxide in a mixed aqueous solution at a liquid temperature of 70 ° C. for 20 minutes to remove smears and at the same time create fine irregularities on the surface.

  Next, using an ultrasonic cleaning apparatus PUC-0586 (trade name, manufactured by Tokyo Ultrasonic Giken Co., Ltd.), ultrasonic treatment is performed for 5 minutes under conditions of cleaning liquid ion-exchanged water, a transmission frequency of 25 kHz, and an output of 600 W. The fragile layer was removed.

  Then, after immersing in HS-202B (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is a palladium solution, at 25 ° C. for 15 minutes to give a catalyst, CUST-201 (trade name, manufactured by Hitachi Chemical Co., Ltd.) Was used, and electroless copper plating was performed at a liquid temperature of 25 ° C. for 30 minutes to form an electroless copper plating layer 26 having a thickness of 0.3 μm as shown in FIG.

  As shown in FIG. 2E, a dry film photoresist, RY-3025 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is laminated on the surface of the electroless copper plating layer 26 and subjected to electrolytic copper plating. The electroplating resist 27 was formed by exposing and developing ultraviolet rays through a photomask having a mask of.

As shown in FIG. 2 (f), using a copper sulfate bath, electrolytic copper plating is performed for about 20 μm under conditions of a liquid temperature of 25 ° C. and a current density of 1.0 A / dm ² , and the circuit conductor layer / circuit conductor interval ( The copper electroplating layer 28 was formed so that L / S) = 30/30 μm.

Next, as shown in FIG. 2G, after removing the electroplating resist 27 with HTO (trade name, manufactured by Nichigo Morton Co., Ltd.) which is a resist stripping solution, 20 g / L of sulfuric acid as a main component, Copper other than the pattern portion was removed by etching using an etching solution having a composition of hydrogen peroxide of 10 g / L. At the time of etching, the substrate was cut into small pieces of 1 dm ² on one side, placed in a 1 L beaker, heated to 40 ° C., and then etched with a magnetic stirrer for 1 minute.

  Finally, as shown in FIG. 2 (h), a Ni / Au plating layer 29 was formed by the same method as in Example 1 to produce a substrate.

Comparative Example 6
A substrate was prepared in the same manner as in Comparative Example 5 except that 30 g / L of FeCl ₃ aqueous solution was used for etching copper other than the pattern portion.

Comparative Example 7
A substrate was prepared in the same manner as in Comparative Example 5, except that 40 g / L of CuCl ₂ aqueous solution and 30 g / L of hydrochloric acid were used for etching copper other than the pattern portion.

Comparative Example 8
Comparative Example 5 except that etching of copper other than the pattern portion was performed at 30 ° C. for 30 seconds using A process liquid (trade name, manufactured by Meltex Co., Ltd.) containing tetraamminecopper chloride (II) as a main component. Similarly, a substrate was prepared.

Comparative Example 9
A substrate was prepared in the same manner as in Example 1 except that the main components of the etching solution were hydrochloric acid 40 g / L and hydrogen peroxide 10 g / L.

Comparative Example 10
A substrate was prepared in the same manner as in Example 1 except that the composition of the main components of the etching solution was 3 g / L sulfuric acid and 3 g / L hydrogen peroxide.

Comparative Example 11
A substrate was prepared in the same manner as in Example 1 except that the current density at the time of copper foil preparation was 5 A / dm ² and the current density at the time of electrolytic copper plating was 7 A / dm ² .

Table 2 shows the results of evaluating the conductor top width, conductor bottom width, inter-circuit etching residue, and inter-circuit Au plating deposition of the substrates prepared in Examples 1 to 8 and Comparative Examples 1 to 11. In many cases, the inter-circuit etching residue and inter-circuit Au plating deposition occur in a shape that forms a skirt from the circuit as shown in FIG. Therefore, the length obtained by dividing the difference between the top and the bottom between the circuits by 2 is the length, and if this value is 5 μm or more, there is an inter-circuit etching residue (the measurement method for inter-circuit Au plating deposition is also the same). The top width and the bottom width between the conductor and the circuit are obtained by taking an image of the substrate from above with an optical microscope, measuring 20 points arbitrarily based on image-processed data, and calculating an average.

  The substrates produced in Examples 1 to 8 were finished with the conductor top width almost as designed, and there was almost no difference between the top width and the bottom width, and the circuit formability was good. On the other hand, in Comparative Example 1, since the temperature of the etching solution was set high, there was almost no difference between the etching rates of the copper foil and the conductor circuit, and the problem that the conductor circuit was excessively dissolved occurred. In Comparative Examples 2 to 4 and 6 to 9, since the diffusion rate-limiting etching solution is used, the portion of the conductor top that is good per solution is excessively dissolved, etching between circuits is likely to remain, and Au plating deposition between circuits is likely to occur. I understood that. In Comparative Example 5, it was found that Pd removal tends to be insufficient and Au plating deposition between circuits tends to occur. In Comparative Example 10, since the main component concentration of the etching solution is thin, the etching time until the circuit is formed as designed is too long, and the workability is poor. In Comparative Example 11, since the current density at the time of electrolytic copper plating is larger than the value of the current density at the time of copper foil preparation, there is almost no difference in the etching rate between copper other than the pattern portion and the conductor top portion, and the conductor circuit is excessive. It has been etched.

  Although the present invention has been described above with reference to a plurality of embodiments, it should not be understood that this description limits the present invention. From this disclosure, various alternative embodiments, examples, and operational techniques not described herein will be apparent to those skilled in the art. Therefore, the technical scope of the present invention is determined only by the invention specifying matters according to the appropriate claims from the above description.

It is sectional drawing which shows an example of the manufacturing process of the printed wiring board by this invention. 12 is a cross-sectional view showing a process for manufacturing a printed wiring board of Comparative Example 5. It is sectional drawing of the circuit which shows the etching remainder between circuits, or Au plating precipitation between circuits.

Explanation of symbols

10, 20 Inner layer conductor circuit 11, 21 Inner layer circuit board 12, 22 Through hole 13 Copper foil 14, 24 Interlayer insulating resin layer 15, 25 IVH
16, 26 Electroless copper plating layer 17, 27 Electroplating resist 18, 28 Electrocopper plating layer 19, 29 Ni / Au plating layer

Claims (5)

A printed wiring board having a conductor circuit pattern in which at least a copper foil layer, an electroless copper plating layer and an electrolytic copper plating layer are laminated in this order on an insulating layer,
The copper electroplating layer is formed at a current density smaller than the current density at the time of copper foil preparation of the copper foil layer, has a crystal structure that is harder to etch than the copper foil layer, and the conductor circuit pattern A printed wiring board, wherein a value obtained by dividing a difference between a top width (St) and a bottom width (Sb) by 2 is less than 5 μm.   The printed wiring board according to claim 1, further comprising an electroless Ni / Au plating layer on the outermost surface of the conductor circuit pattern. Printed wiring board according to claim 1 or claim 2, wherein the copper foil of the copper foil layer is electrodeposited copper foil produced by 5A / dm ² or more current density. Printed wiring board according to any one of claims 1 to 3, wherein the copper plating layer is one formed with a current density of less than 0.5A / dm ² or more 5A / dm ^2. Printed wiring board according to any one of claims 1 to 4, the thickness of the electroless copper plating layer is characterized in that it is a 0.1 to 1.0 [mu] m.

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