JP2002373950A - Method for manufacturing hermetically sealed ic package - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a hermetically sealed IN package with enhanced productivity and reduced manufacturing cost. SOLUTION: A substrate having an external electrode and an internal electrode wiring is coated entirely with a photosensitive substance and then mounts an IC chip using a photoetching method before the photosensitive substance is formed in a region other than that being connected to wires. A large number of chips are mounted at desired positions in a region where the photosensitive substance is not present and the internal electrode wiring of the substrate is connected to the electrodes of the IC chip through wires. A planar lid is then bonded onto the frame of the photosensitive substance surrounding the IC chip. Finally, the substrate is cut at an intermediate position of the photosensitive substance thus producing individual IC packages.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a hermetically sealed IC package.

[0002]

2. Description of the Related Art As shown in FIG. 1, a conventional hermetically sealed IC package has an IC chip 45 mounted on an individual substrate 41 having a frame 47 and a wire 46 mounted thereon. 49 was on it.

[0003]

The conventional hermetically sealed IC packages are manufactured individually and individually, resulting in extremely low productivity and, therefore, very expensive.

[0004]

In order to solve the above problems, the present invention uses a substrate on which a plurality of IC chips are mounted, forms a photosensitive material into a desired shape, and then forms the photosensitive material. An IC chip is mounted in an unoccupied area and wire wiring is performed. Next, after covering with a plate-like lid, the substrate is cut into individual IC packages.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention relates to a method for manufacturing a gas-sealed package in which the surface of an IC chip is surrounded by a gas such as air. Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view of an IC package showing a process sequence of the manufacturing method of the present invention. As shown in FIG. 1A, a substrate 11 having an external electrode 12 and an internal electrode wiring 13
Is prepared. A large number of IC chips are mounted on the substrate 11 and are finally divided into individual pieces. Therefore, the size of the substrate is large, and finally each IC
The external electrode 12 which becomes a package is also the internal electrode wiring 1
3 also has a repeating pattern. The material of the substrate 11 includes ceramic, glass epoxy, polyimide, glass, and the like.

[0007] Next, as shown in FIG.
7 is applied. The photosensitive material 17 includes a negative resist, a positive resist, and a photosensitive polyimide. Also, the thickness of the photosensitive material 17 to be applied must be designed to be higher than the highest point of the wire which will be described later. In some cases, pre-baking is performed after coating to maximize the effect of photosensitivity. Next, as shown in FIG. 1C, light is applied using a mask 18 formed so that an area where the IC chip is mounted and an area where the wire is connected are exposed. In the case of a negative-type photosensitive material, a portion exposed to light cures. In the case of the positive type, on the other hand, the area where no light is irradiated cures.

Next, as shown in FIG. 1 (d), by developing, the photosensitive material 17 in the area where the IC chip is mounted and the area where the wire is connected disappears. , A thick wall-shaped photosensitive substance 17 is formed. By heat-treating this,
The photosensitive substance 17 becomes even stronger. Although the photosensitive material 17 may be reduced by this heat treatment, the photosensitive material 17 must be higher than the highest point of the wire even if the photosensitive material 17 is reduced in height and reduced in height. The photosensitive material 17 formed in the desired pattern surrounds the area for mounting the IC chip and the area for connecting the wires.

Next, as shown in FIG.
5 is bonded to a desired position of the internal electrode wiring 13. That is, the IC chip 1 is placed at a position where the IC chip is to be placed in a region where there is no photosensitive material 17 sandwiched between the photosensitive material walls 17.
5 is adhered. In some cases, the internal electrode wiring 13 may not be provided at the position where the IC chip 15 is bonded. For example, there are cases where the surface of the IC chip 15 needs to be as low as possible, cases where there is no need to electrically conduct the IC chip 15, and cases where there is little need to radiate the heat of the IC chip 15. Next, the electrodes on the surface of the IC chip 15 and the internal electrode wires 13 are connected by wires 16. Gold (Au), gold alloy, aluminum (A
l), aluminum alloy, copper (Cu), copper alloy and other metals are used. Since the wires are generally connected by a wire bonder, the photosensitive material 17 is large enough to move the capillary.
And the distance between the internal electrode wiring 13 and the internal electrode wiring 13. Note that I
Since the mounting of the C chip 15 is performed after the photosensitive material 17 is formed, the process of forming the photosensitive material 17 does not damage the IC chip 15.

Next, as shown in FIG.
9 is adhered. In this case, a method of bonding the lid 19 after attaching an adhesive material on the photosensitive substance 17 or applying an adhesive to a position where the photosensitive substance 17 comes to the lid 19 and then bonding the lid 19 is applied. Or a method of bonding the photosensitive substance 17 and the lid 19 by heat treatment. If it is necessary to transmit light, the plate-shaped lid 19 is made of a material made of a substance transparent to the light, such as glass or transparent plastic. If it is not necessary to transmit light, a material such as ceramic, glass epoxy, or polyimide can be used. Also, a tape-shaped sheet can be used depending on the application.

Next, as shown in FIG.
The substrate is cut at the midpoint of 7. Examples of the cutting method include a method using a dicing device, a method using a wire saw, and a method using a laser or high-pressure water. Further, in the case of dicing, a method of preventing a crack from entering a cut surface by first cutting shallowly with a relatively wide blade and then cutting with a narrow blade can be used. In this way,
As shown in FIG. 1H, an IC package in which the IC chip 15 is sealed with a gas is obtained.

Now, as a method of measuring the electrical characteristics of an IC package, it is of course possible to measure the electrical characteristics of a single package after the package has been formed as in the conventional case. In addition, Figure 1
It can also be measured before cutting the substrate in (g). That is, a probe card can be prepared in accordance with the electrodes of the substrate, and measurement can be performed in the same manner as in the case of wafer measurement. Therefore many ICs
It is also possible to measure the package in one probing.

FIG. 2 shows a plan view of FIG. Substrate 2
Many IC chips 25 are mounted in one. The IC chip 25 and the wires 26 are exposed. A photosensitive material 27 is formed between the IC chips in a wall shape. Since the photolithography method is used, the photosensitive material is accurately patterned.

FIG. 3 shows a plan view of FIG. 1 (g). It is cut at the position shown by the dotted line. The photosensitive material 37 is cut at a substantially intermediate position.

[0015]

As described above, as described above, a large number of I
Make C package all at once, cut at the end
Since individual IC packages are used, productivity is greatly improved and manufacturing costs are significantly reduced. In addition, since electrical characteristics can be measured when a single substrate is cut before cutting, the electrical characteristics of a large number of ICs can be measured all at once with the same concept as a wafer prober, greatly reducing the cost required for testing. Can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing a method of manufacturing an IC package according to the present invention.

FIG. 2 is a plan view of FIG. 1 (e).

FIG. 3 is a diagram showing a plan view of FIG. 1 (g).

FIG. 4 is a diagram showing a conventional IC package.

[Explanation of symbols]

 11, 21, 31, 41 Semiconductor substrate 12, 42 External electrode 13, 23, 33, 43 Internal electrode wiring 15, 25, 35, 45 IC chip 16, 26, 36, 46 Wire 17, 27, 37 Photosensitive substance 18 Mask 19, 49 Lid 47 Frame

Claims (10)

[Claims] 1. A step of applying a photosensitive substance to a substrate having external electrodes and internal electrode wiring, a step of forming the photosensitive substance into a desired shape using a photolithography method, and a step of removing the photosensitive substance. A step of mounting an IC chip on a region and connecting an electrode in the IC chip to the internal electrode wiring with a wire, a step of bonding a plate-like lid to the thick film of the photosensitive material, And a method of manufacturing a hermetically sealed IC package. 2. A step of applying a photosensitive substance to a substrate having an external electrode and an internal electrode wiring, a step of forming the photosensitive substance into a desired shape by using a photolithography method, and a heat treatment. Curing the photosensitive material formed on the substrate and placing the IC chip on the area where the photosensitive material has been removed
A step of connecting an electrode in a chip and the internal electrode wiring with a wire, a step of bonding a plate-shaped lid to a thick film of the photosensitive substance, and a step of cutting at an intermediate point of the photosensitive substance. Method for manufacturing hermetically sealed IC package 3. The substrate having an external electrode and an internal electrode wiring is made of a glass epoxy material.
Or the method for manufacturing an IC package according to 2. 4. The method for manufacturing an IC package according to claim 1, wherein the substrate having the external electrodes and the internal electrode wiring is made of a ceramic material. 5. The method for manufacturing an IC package according to claim 1, wherein the plate-like lid is a glass plate. 6. The method for manufacturing an IC package according to claim 1, wherein the plate-shaped lid is a ceramic plate. 7. The method of manufacturing an IC package according to claim 1, wherein the thickness is larger than the highest point of the thickness wire after curing of the photosensitive material. 8. The method for manufacturing an IC package according to claim 1, wherein the plate-like lid is a tape-like sheet. 9. The method for manufacturing an IC package according to claim 1, further comprising a step of measuring electric characteristics of the IC package using the whole substrate before cutting the substrate. 10. The IC according to claim 9, wherein electric characteristics are measured using a probe card-shaped jig.
Package manufacturing method