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GR920100398A - Αναλογικος πολλαπλασιαστης mosfet. - Google Patents

Αναλογικος πολλαπλασιαστης mosfet.

Info

Publication number
GR920100398A
GR920100398A GR920100398A GR920100398A GR920100398A GR 920100398 A GR920100398 A GR 920100398A GR 920100398 A GR920100398 A GR 920100398A GR 920100398 A GR920100398 A GR 920100398A GR 920100398 A GR920100398 A GR 920100398A
Authority
GR
Greece
Prior art keywords
terminal
mosfet
variable
output current
linear
Prior art date
Application number
GR920100398A
Other languages
English (en)
Other versions
GR1002179B (en
Inventor
Song Han Il
Original Assignee
Korea Telecommunication
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Korea Telecommunication filed Critical Korea Telecommunication
Publication of GR920100398A publication Critical patent/GR920100398A/el
Publication of GR1002179B publication Critical patent/GR1002179B/el

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/16—Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division
    • G06G7/163—Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division using a variable impedance controlled by one of the input signals, variable amplification or transfer function
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Biophysics (AREA)
  • Health & Medical Sciences (AREA)
  • Software Systems (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biomedical Technology (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Evolutionary Computation (AREA)
  • Data Mining & Analysis (AREA)
  • Computational Linguistics (AREA)
  • Artificial Intelligence (AREA)
  • Neurology (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Networks Using Active Elements (AREA)

Abstract

Περιγράφεται αναλογικός πολλαπλασιαστής MOSFET μεταβλητού γραμμικού συστήματος ωμικής συζεύξεως MOSFET μεταβάλλοντος γραμμικώς ρεύμα εξόδου Ι, εξαρτωμένου εκ συμμετρικής τάσεως εισόδου εκ των πηγών τάσεως V2 και -V2 και εκ πηγής τάσεως εισόδου V1 συνδεόμενος λειτουργικώς μετά της συμμετρικής τάσεως εισόδου εκ των πηγών τάσεως V2 και -V2, του μεταβλητού γραμμικού συστήματος ωμικής συζεύξεως MOSFET έχοντος κόμβον Α αποδίδοντα μεταβλητόν ρεύμα εξόδου Ι δι' αυτού. Λειτουργική ενισχυτική μονάς δια την ενίσχυσιν του γραμμικώς μεταβλητού ρεύματος εξόδου Ι, η οποία περιλαμβάνει λειτουργικόν ενισχυτήν U μετά αναστρέφοντος ακροδέκτου εισόδου συνδεομένου προς τον κόμβον Α του γραμμικού συστήματος MΟSFET, μη αναστρέφοντα ακροδέκτην συνδεόμενον προς την γείωσιν και ακροδέκτην συνδεόμενον προς την γείωσιν και ακροδέκτην εξόδου. Η λειτουργική ενισχυτική μονάς περιλαμβάνει περαιτέρω στοιχείον αναδράσεως Ζ συνδεόμενον μεταξύ του αναστρέφοντος ακροδέκτου εισόδου και του ακροδέκτου εξόδου του λειτουργικού ενισχυτού U, εκ του οποίου ακροδέκτου εξόδου, αποδίδεται κατά την χρήσιν τάσις Vo. ω
GR920100398A 1991-11-01 1992-09-23 Mofset analog multiplier. GR1002179B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910019374A KR940004429B1 (ko) 1991-11-01 1991-11-01 가변저항형 mosfet 아날로그 곱셈기

Publications (2)

Publication Number Publication Date
GR920100398A true GR920100398A (el) 1993-07-30
GR1002179B GR1002179B (en) 1996-03-11

Family

ID=19322147

Family Applications (1)

Application Number Title Priority Date Filing Date
GR920100398A GR1002179B (en) 1991-11-01 1992-09-23 Mofset analog multiplier.

Country Status (18)

Country Link
US (1) US5254889A (el)
JP (1) JPH0693248B2 (el)
KR (1) KR940004429B1 (el)
AT (1) AT397443B (el)
BE (1) BE1005226A5 (el)
CH (1) CH684855A5 (el)
DE (1) DE4222844C2 (el)
DK (1) DK81692A (el)
ES (1) ES2040660B1 (el)
FR (1) FR2683354A1 (el)
GB (1) GB2261092B (el)
GR (1) GR1002179B (el)
IT (1) IT1255430B (el)
LU (1) LU88147A1 (el)
MC (1) MC2321A1 (el)
NL (1) NL9201212A (el)
PT (1) PT100692B (el)
SE (1) SE515267C2 (el)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5666080A (en) * 1993-06-17 1997-09-09 Yozan, Inc. Computational circuit
US5442583A (en) * 1993-05-14 1995-08-15 California Institute Of Technology Compensated analog multipliers
US5617053A (en) * 1993-06-17 1997-04-01 Yozan, Inc. Computational circuit
KR970007006B1 (ko) * 1993-08-31 1997-05-01 한국전자통신연구원 인공 신경 회로와 패턴 분리 및 인식용 발진 신경 망의 구조
CN1109404C (zh) * 1993-09-20 2003-05-21 株式会社鹰山 计算电路
GB2325341A (en) * 1997-03-28 1998-11-18 Nec Corp A composite transistor for a current squarer and analog multiplier
US6829598B2 (en) 2000-10-02 2004-12-07 Texas Instruments Incorporated Method and apparatus for modeling a neural synapse function by utilizing a single conventional MOSFET
US10700695B1 (en) 2018-04-17 2020-06-30 Ali Tasdighi Far Mixed-mode quarter square multipliers for machine learning
US10832014B1 (en) 2018-04-17 2020-11-10 Ali Tasdighi Far Multi-quadrant analog current-mode multipliers for artificial intelligence
US10594334B1 (en) 2018-04-17 2020-03-17 Ali Tasdighi Far Mixed-mode multipliers for artificial intelligence
US11275909B1 (en) 2019-06-04 2022-03-15 Ali Tasdighi Far Current-mode analog multiply-accumulate circuits for artificial intelligence
US11416218B1 (en) 2020-07-10 2022-08-16 Ali Tasdighi Far Digital approximate squarer for machine learning
US11467805B1 (en) 2020-07-10 2022-10-11 Ali Tasdighi Far Digital approximate multipliers for machine learning and artificial intelligence applications
KR102480434B1 (ko) * 2020-02-13 2022-12-23 광운대학교 산학협력단 선형 전류-전압 특성의 시냅스 소자 및 신경망 회로

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4837527A (en) * 1987-12-23 1989-06-06 Rca Licensing Corporation Switched capacitor arrangement
US5021988A (en) * 1989-04-27 1991-06-04 Mitsubishi Denki Kabushiki Kaisha Semiconductor neural network and method of driving the same
US5061866A (en) * 1990-08-06 1991-10-29 The Ohio State University Research Foundation Analog, continuous time vector scalar multiplier circuits and programmable feedback neural network using them

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DD103746A1 (el) * 1973-05-23 1974-02-05
DE2643659A1 (de) * 1976-09-28 1978-03-30 Hitachi Ltd Multiplizierschaltung mit einem feldeffekttransistor
US4156923A (en) * 1977-10-17 1979-05-29 Westinghouse Electric Corp. Method and apparatus for performing matrix multiplication or analog signal correlation
JP2760543B2 (ja) * 1989-02-10 1998-06-04 株式会社東芝 多重帰還回路
JPH02311972A (ja) * 1989-05-29 1990-12-27 Matsushita Electric Ind Co Ltd ニューロン素子回路

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4837527A (en) * 1987-12-23 1989-06-06 Rca Licensing Corporation Switched capacitor arrangement
US5021988A (en) * 1989-04-27 1991-06-04 Mitsubishi Denki Kabushiki Kaisha Semiconductor neural network and method of driving the same
US5061866A (en) * 1990-08-06 1991-10-29 The Ohio State University Research Foundation Analog, continuous time vector scalar multiplier circuits and programmable feedback neural network using them

Also Published As

Publication number Publication date
KR940004429B1 (ko) 1994-05-25
MC2321A1 (fr) 1993-10-25
ES2040660A2 (es) 1993-10-16
JPH0693248B2 (ja) 1994-11-16
DE4222844A1 (de) 1993-05-06
ES2040660B1 (es) 1996-09-01
LU88147A1 (fr) 1993-02-15
ATA144592A (de) 1993-08-15
ITMI921726A0 (it) 1992-07-16
NL9201212A (nl) 1993-06-01
BE1005226A5 (fr) 1993-06-01
KR930011428A (ko) 1993-06-24
DK81692D0 (da) 1992-06-19
DE4222844C2 (de) 1999-05-27
PT100692A (pt) 1994-05-31
AT397443B (de) 1994-04-25
SE9201882D0 (sv) 1992-06-18
PT100692B (pt) 1999-06-30
FR2683354B1 (el) 1997-02-14
JPH05225364A (ja) 1993-09-03
ES2040660R (el) 1996-01-16
CH684855A5 (de) 1995-01-13
GB2261092A (en) 1993-05-05
DK81692A (da) 1993-05-02
GR1002179B (en) 1996-03-11
SE9201882L (sv) 1993-05-02
SE515267C2 (sv) 2001-07-09
FR2683354A1 (fr) 1993-05-07
ITMI921726A1 (it) 1994-01-16
IT1255430B (it) 1995-10-31
GB9213381D0 (en) 1992-08-05
US5254889A (en) 1993-10-19
GB2261092B (en) 1995-06-14

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