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GB2398927B - Method for fabricating a semiconductor device - Google Patents

Method for fabricating a semiconductor device

Info

Publication number
GB2398927B
GB2398927B GB0330186A GB0330186A GB2398927B GB 2398927 B GB2398927 B GB 2398927B GB 0330186 A GB0330186 A GB 0330186A GB 0330186 A GB0330186 A GB 0330186A GB 2398927 B GB2398927 B GB 2398927B
Authority
GB
United Kingdom
Prior art keywords
fabricating
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0330186A
Other versions
GB2398927A (en
GB0330186D0 (en
Inventor
Moon-Keun Lee
Tae-Kwon Lee
Jun-Mo Yang
Tae-Su Park
Yoon-Jik Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Priority to GB0620741A priority Critical patent/GB2428888B/en
Publication of GB0330186D0 publication Critical patent/GB0330186D0/en
Publication of GB2398927A publication Critical patent/GB2398927A/en
Application granted granted Critical
Publication of GB2398927B publication Critical patent/GB2398927B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
    • H01L29/456—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/258—Source or drain electrodes for field-effect devices characterised by the relative positions of the source or drain electrodes with respect to the gate electrode
    • H10D64/259—Source or drain electrodes being self-aligned with the gate electrode and having bottom surfaces higher than the interface between the channel and the gate dielectric
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/62—Electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physical Vapour Deposition (AREA)
  • Chemical Vapour Deposition (AREA)
GB0330186A 2003-02-21 2003-12-30 Method for fabricating a semiconductor device Expired - Fee Related GB2398927B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0620741A GB2428888B (en) 2003-02-21 2003-12-30 Semiconductor device with epitaxial C49-titanium silicide (TiSi2) layer and method for fabricating the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR10-2003-0011101A KR100538806B1 (en) 2003-02-21 2003-02-21 SEMICONDUCTOR DEVICE WITH EPITAXIAL C49-TiSi2 LAYER AND METHOD FOR FABRICATING THE SAME

Publications (3)

Publication Number Publication Date
GB0330186D0 GB0330186D0 (en) 2004-02-04
GB2398927A GB2398927A (en) 2004-09-01
GB2398927B true GB2398927B (en) 2006-12-27

Family

ID=36682973

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0330186A Expired - Fee Related GB2398927B (en) 2003-02-21 2003-12-30 Method for fabricating a semiconductor device

Country Status (7)

Country Link
US (3) US7037827B2 (en)
JP (1) JP5036957B2 (en)
KR (1) KR100538806B1 (en)
CN (1) CN100501954C (en)
DE (1) DE10361829B4 (en)
GB (1) GB2398927B (en)
TW (1) TWI261309B (en)

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US7012024B2 (en) * 2003-08-15 2006-03-14 Micron Technology, Inc. Methods of forming a transistor with an integrated metal silicide gate electrode
KR100591157B1 (en) * 2004-06-07 2006-06-19 동부일렉트로닉스 주식회사 Manufacturing method of semiconductor device
KR100604089B1 (en) * 2004-12-31 2006-07-24 주식회사 아이피에스 Ｉｎ-ｓｉｔｕ Thin film deposition method
CN1294098C (en) * 2005-05-25 2007-01-10 浙江大学 Titanium silicide coated glass with compound functions prepared by nitrogen protection under normal pressure and preparation method thereof
US7361596B2 (en) * 2005-06-28 2008-04-22 Micron Technology, Inc. Semiconductor processing methods
JP5056418B2 (en) * 2005-11-14 2012-10-24 日本電気株式会社 Semiconductor device and manufacturing method thereof
US20070232043A1 (en) * 2006-04-03 2007-10-04 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming thermal stable silicide using surface plasma treatment
JP5207615B2 (en) * 2006-10-30 2013-06-12 東京エレクトロン株式会社 Film forming method and substrate processing apparatus
US8004013B2 (en) * 2007-06-15 2011-08-23 Sandisk 3D Llc Polycrystalline thin film bipolar transistors
KR100872801B1 (en) * 2007-07-23 2008-12-09 포항공과대학교 산학협력단 Metal silicide formation method of semiconductor device using plasma nitridation
WO2009031886A2 (en) * 2007-09-07 2009-03-12 Fujifilm Manufacturing Europe B.V. Method and apparatus for atomic layer deposition using an atmospheric pressure glow discharge plasma
KR100920455B1 (en) * 2007-10-01 2009-10-08 포항공과대학교 산학협력단 Method for preparing metal silicide thin film using plasma atomic layer deposition without heat treatment
JP2010219139A (en) * 2009-03-13 2010-09-30 Elpida Memory Inc Semiconductor device, and method for manufacturing the same
KR101907972B1 (en) * 2011-10-31 2018-10-17 주식회사 원익아이피에스 Apparatus and Method for treating substrate
US8785310B2 (en) * 2012-01-27 2014-07-22 Tokyo Electron Limited Method of forming conformal metal silicide films
US20140110838A1 (en) * 2012-10-22 2014-04-24 Infineon Technologies Ag Semiconductor devices and processing methods
CN103137562B (en) * 2013-02-07 2017-02-08 无锡华润上华科技有限公司 Method for eliminating silicon pits
CN103938272A (en) * 2014-04-03 2014-07-23 清华大学 Plasma assisted epitaxial growth device and method
US11085122B2 (en) * 2014-06-26 2021-08-10 Vapor Technologies, Inc. Diamond coated electrodes for electrochemical processing and applications thereof
KR102163383B1 (en) 2016-12-12 2020-10-08 어플라이드 머티어리얼스, 인코포레이티드 Methods for silicide formation
US10535527B2 (en) * 2017-07-13 2020-01-14 Applied Materials, Inc. Methods for depositing semiconductor films
US10475654B2 (en) 2017-08-31 2019-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Wrap-around contact plug and method manufacturing same
KR102641942B1 (en) * 2017-12-29 2024-02-27 어플라이드 머티어리얼스, 인코포레이티드 Method of reducing leakage current of storage capacitors for display applications
CN109062952B (en) * 2018-06-22 2022-06-03 北京奇艺世纪科技有限公司 Data query method and device and electronic equipment
US11195923B2 (en) * 2018-12-21 2021-12-07 Applied Materials, Inc. Method of fabricating a semiconductor device having reduced contact resistance
US10978354B2 (en) 2019-03-15 2021-04-13 Taiwan Semiconductor Manufacturing Co., Ltd. Selective dual silicide formation
US11232953B2 (en) * 2019-09-17 2022-01-25 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device and a semiconductor device
US11233134B2 (en) 2019-12-19 2022-01-25 Taiwan Semiconductor Manufacturing Co., Ltd. Field effect transistors with dual silicide contact structures
JP2021136343A (en) * 2020-02-27 2021-09-13 東京エレクトロン株式会社 Contaminant reduction method and contaminant reduction device
US11489057B2 (en) 2020-08-07 2022-11-01 Taiwan Semiconductor Manufacturing Co., Ltd. Contact structures in semiconductor devices
JP2023039081A (en) 2021-09-08 2023-03-20 東京エレクトロン株式会社 Film deposition method, method for manufacturing semiconductor device, and film deposition apparatus

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US5043300A (en) * 1990-04-16 1991-08-27 Applied Materials, Inc. Single anneal step process for forming titanium silicide on semiconductor wafer
US6071552A (en) * 1997-10-20 2000-06-06 Industrial Technology Research Institute Insitu formation of TiSi2 /TiN bi-layer structures using self-aligned nitridation treatment on underlying CVD-TiSi2 layer
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JP2001297998A (en) * 2000-04-12 2001-10-26 Fujitsu Ltd Method for manufacturing semiconductor device
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US6518155B1 (en) * 1997-06-30 2003-02-11 Intel Corporation Device structure and method for reducing silicide encroachment

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US5043300A (en) * 1990-04-16 1991-08-27 Applied Materials, Inc. Single anneal step process for forming titanium silicide on semiconductor wafer
US6518155B1 (en) * 1997-06-30 2003-02-11 Intel Corporation Device structure and method for reducing silicide encroachment
US6071552A (en) * 1997-10-20 2000-06-06 Industrial Technology Research Institute Insitu formation of TiSi2 /TiN bi-layer structures using self-aligned nitridation treatment on underlying CVD-TiSi2 layer
JP2000297998A (en) * 1999-04-12 2000-10-24 Nec Corp Apparatus and method for detecting mine
JP2001297998A (en) * 2000-04-12 2001-10-26 Fujitsu Ltd Method for manufacturing semiconductor device
KR20020003001A (en) * 2000-06-30 2002-01-10 박종섭 Method for forming epitaxial titanium silicide

Non-Patent Citations (1)

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INSPEC abstract no. 6425045 & "Crystallographic structures and parasitic resistances of self-aligned silicide TiSi2/ self-aligned nitrided barrier layer/ selective CVD aluminum in fully self-aligned metallization MOSFET" Jap. J. App. Phys., Part 1, Vol 38, No 10, pp 5835-5838, Lee Chan-Hun et al *

Also Published As

Publication number Publication date
US7476617B2 (en) 2009-01-13
CN100501954C (en) 2009-06-17
TW200416837A (en) 2004-09-01
KR100538806B1 (en) 2005-12-26
TWI261309B (en) 2006-09-01
US20060157742A1 (en) 2006-07-20
KR20040075556A (en) 2004-08-30
DE10361829A1 (en) 2004-09-09
JP2004253797A (en) 2004-09-09
CN1534749A (en) 2004-10-06
US7868458B2 (en) 2011-01-11
US7037827B2 (en) 2006-05-02
GB2398927A (en) 2004-09-01
DE10361829B4 (en) 2009-12-10
US20090146306A1 (en) 2009-06-11
GB0330186D0 (en) 2004-02-04
US20040180543A1 (en) 2004-09-16
JP5036957B2 (en) 2012-09-26

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20131230