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GB2428888B - Semiconductor device with epitaxial C49-titanium silicide (TiSi2) layer and method for fabricating the same - Google Patents

Semiconductor device with epitaxial C49-titanium silicide (TiSi2) layer and method for fabricating the same

Info

Publication number
GB2428888B
GB2428888B GB0620741A GB0620741A GB2428888B GB 2428888 B GB2428888 B GB 2428888B GB 0620741 A GB0620741 A GB 0620741A GB 0620741 A GB0620741 A GB 0620741A GB 2428888 B GB2428888 B GB 2428888B
Authority
GB
United Kingdom
Prior art keywords
tisi2
epitaxial
fabricating
layer
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0620741A
Other versions
GB0620741D0 (en
GB2428888A (en
Inventor
Moon-Keun Lee
Tae-Kwon Lee
Jun-Mo Yang
Tae-Su Park
Yoon-Jik Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR10-2003-0011101A external-priority patent/KR100538806B1/en
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Priority to GB0620741A priority Critical patent/GB2428888B/en
Publication of GB0620741D0 publication Critical patent/GB0620741D0/en
Publication of GB2428888A publication Critical patent/GB2428888A/en
Application granted granted Critical
Publication of GB2428888B publication Critical patent/GB2428888B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H10D64/0112
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • H01L29/456
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/62Electrodes ohmically coupled to a semiconductor
    • H10W20/033
    • H10W20/055
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
GB0620741A 2003-02-21 2003-12-30 Semiconductor device with epitaxial C49-titanium silicide (TiSi2) layer and method for fabricating the same Expired - Fee Related GB2428888B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0620741A GB2428888B (en) 2003-02-21 2003-12-30 Semiconductor device with epitaxial C49-titanium silicide (TiSi2) layer and method for fabricating the same

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR10-2003-0011101A KR100538806B1 (en) 2003-02-21 2003-02-21 SEMICONDUCTOR DEVICE WITH EPITAXIAL C49-TiSi2 LAYER AND METHOD FOR FABRICATING THE SAME
GB0620741A GB2428888B (en) 2003-02-21 2003-12-30 Semiconductor device with epitaxial C49-titanium silicide (TiSi2) layer and method for fabricating the same
GB0330186A GB2398927B (en) 2003-02-21 2003-12-30 Method for fabricating a semiconductor device

Publications (3)

Publication Number Publication Date
GB0620741D0 GB0620741D0 (en) 2006-11-29
GB2428888A GB2428888A (en) 2007-02-07
GB2428888B true GB2428888B (en) 2008-02-06

Family

ID=38947410

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0620741A Expired - Fee Related GB2428888B (en) 2003-02-21 2003-12-30 Semiconductor device with epitaxial C49-titanium silicide (TiSi2) layer and method for fabricating the same

Country Status (1)

Country Link
GB (1) GB2428888B (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5043300A (en) * 1990-04-16 1991-08-27 Applied Materials, Inc. Single anneal step process for forming titanium silicide on semiconductor wafer
US5604155A (en) * 1995-07-17 1997-02-18 Winbond Electronics Corp. Al-based contact formation process using Ti glue layer to prevent nodule-induced bridging
US6071552A (en) * 1997-10-20 2000-06-06 Industrial Technology Research Institute Insitu formation of TiSi2 /TiN bi-layer structures using self-aligned nitridation treatment on underlying CVD-TiSi2 layer
JP2001297998A (en) * 2000-04-12 2001-10-26 Fujitsu Ltd Method for manufacturing semiconductor device
KR20020003001A (en) * 2000-06-30 2002-01-10 박종섭 Method for forming epitaxial titanium silicide
US6518155B1 (en) * 1997-06-30 2003-02-11 Intel Corporation Device structure and method for reducing silicide encroachment
US20030203606A1 (en) * 2002-04-26 2003-10-30 Kazuyoshi Maekawa Method for manufacturing a semiconductor device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5043300A (en) * 1990-04-16 1991-08-27 Applied Materials, Inc. Single anneal step process for forming titanium silicide on semiconductor wafer
US5604155A (en) * 1995-07-17 1997-02-18 Winbond Electronics Corp. Al-based contact formation process using Ti glue layer to prevent nodule-induced bridging
US6518155B1 (en) * 1997-06-30 2003-02-11 Intel Corporation Device structure and method for reducing silicide encroachment
US6071552A (en) * 1997-10-20 2000-06-06 Industrial Technology Research Institute Insitu formation of TiSi2 /TiN bi-layer structures using self-aligned nitridation treatment on underlying CVD-TiSi2 layer
JP2001297998A (en) * 2000-04-12 2001-10-26 Fujitsu Ltd Method for manufacturing semiconductor device
KR20020003001A (en) * 2000-06-30 2002-01-10 박종섭 Method for forming epitaxial titanium silicide
US20030203606A1 (en) * 2002-04-26 2003-10-30 Kazuyoshi Maekawa Method for manufacturing a semiconductor device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"Crystallographic structures and parasitic resistances of self-aligned TiSi2/ self aligned nitride barrier layer/selective chemical vapour deposited aluminium in fully self aligned metallization MOSFET" Chang-Hun Lee et al, Jap.J.App.Phys, Vol 38, pp5835-5838 (1999) *

Also Published As

Publication number Publication date
GB0620741D0 (en) 2006-11-29
GB2428888A (en) 2007-02-07

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20131230