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FI20045482A0 - Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi - Google Patents

Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi

Info

Publication number
FI20045482A0
FI20045482A0 FI20045482A FI20045482A FI20045482A0 FI 20045482 A0 FI20045482 A0 FI 20045482A0 FI 20045482 A FI20045482 A FI 20045482A FI 20045482 A FI20045482 A FI 20045482A FI 20045482 A0 FI20045482 A0 FI 20045482A0
Authority
FI
Finland
Prior art keywords
manufacturing
semiconductor substrate
dislocation density
reduced dislocation
reduced
Prior art date
Application number
FI20045482A
Other languages
English (en)
Swedish (sv)
Inventor
Maxim Odnoblyudov
Vladislav Bougrov
Original Assignee
Optogan Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Optogan Oy filed Critical Optogan Oy
Priority to FI20045482A priority Critical patent/FI20045482A0/fi
Publication of FI20045482A0 publication Critical patent/FI20045482A0/fi
Priority to CNB2005800429707A priority patent/CN100487865C/zh
Priority to HK08105914.4A priority patent/HK1111264B/xx
Priority to JP2007546092A priority patent/JP2008523635A/ja
Priority to PCT/FI2005/000233 priority patent/WO2006064081A1/en
Priority to RU2007126749/28A priority patent/RU2368030C2/ru
Priority to US11/792,687 priority patent/US20080308841A1/en
Priority to EP05742487A priority patent/EP1834349A1/en
Priority to KR1020077015679A priority patent/KR101159156B1/ko
Priority to TW094143517A priority patent/TW200639926A/zh
Priority to US13/211,627 priority patent/US20120064700A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H10D62/405—Orientations of crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)
  • Chemical Vapour Deposition (AREA)
FI20045482A 2004-12-14 2004-12-14 Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi FI20045482A0 (fi)

Priority Applications (11)

Application Number Priority Date Filing Date Title
FI20045482A FI20045482A0 (fi) 2004-12-14 2004-12-14 Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi
KR1020077015679A KR101159156B1 (ko) 2004-12-14 2005-05-19 반도체 기판, 반도체 장치 및 반도체 기판의 제조 방법
PCT/FI2005/000233 WO2006064081A1 (en) 2004-12-14 2005-05-19 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate
HK08105914.4A HK1111264B (en) 2004-12-14 2005-05-19 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate
JP2007546092A JP2008523635A (ja) 2004-12-14 2005-05-19 半導体基板、半導体装置、および半導体基板の製造方法
CNB2005800429707A CN100487865C (zh) 2004-12-14 2005-05-19 半导体衬底、半导体器件和制造半导体衬底的方法
RU2007126749/28A RU2368030C2 (ru) 2004-12-14 2005-05-19 Полупроводниковая подложка, полупроводниковое устройство и способ получения полупроводниковой подложки
US11/792,687 US20080308841A1 (en) 2004-12-14 2005-05-19 Semiconductor Substrate, Semiconductor Device and Method of Manufacturing a Semiconductor Substrate
EP05742487A EP1834349A1 (en) 2004-12-14 2005-05-19 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate
TW094143517A TW200639926A (en) 2004-12-14 2005-12-09 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate
US13/211,627 US20120064700A1 (en) 2004-12-14 2011-08-17 Semiconductor substrate, semiconductor device and method of manufacturing a semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20045482A FI20045482A0 (fi) 2004-12-14 2004-12-14 Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi

Publications (1)

Publication Number Publication Date
FI20045482A0 true FI20045482A0 (fi) 2004-12-14

Family

ID=33548081

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20045482A FI20045482A0 (fi) 2004-12-14 2004-12-14 Matalamman dislokaatiotiheyden omaava puolijohdesubstraatti, ja menetelmä sen valmistamiseksi

Country Status (9)

Country Link
US (2) US20080308841A1 (fi)
EP (1) EP1834349A1 (fi)
JP (1) JP2008523635A (fi)
KR (1) KR101159156B1 (fi)
CN (1) CN100487865C (fi)
FI (1) FI20045482A0 (fi)
RU (1) RU2368030C2 (fi)
TW (1) TW200639926A (fi)
WO (1) WO2006064081A1 (fi)

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US8574968B2 (en) * 2007-07-26 2013-11-05 Soitec Epitaxial methods and templates grown by the methods
JP5749888B2 (ja) * 2010-01-18 2015-07-15 住友電気工業株式会社 半導体素子及び半導体素子を作製する方法
JP6090998B2 (ja) * 2013-01-31 2017-03-08 一般財団法人電力中央研究所 六方晶単結晶の製造方法、六方晶単結晶ウエハの製造方法
US9564494B1 (en) * 2015-11-18 2017-02-07 International Business Machines Corporation Enhanced defect reduction for heteroepitaxy by seed shape engineering
JP2017178769A (ja) * 2016-03-22 2017-10-05 インディアン インスティテゥート オブ サイエンスＩｎｄｉａｎ Ｉｎｓｔｉｔｕｔｅ Ｏｆ Ｓｃｉｅｎｃｅ 横方向に配向した低欠陥密度で大面積の金属窒化物アイランドのプラットフォームおよびその製造方法
US11177123B2 (en) * 2017-02-16 2021-11-16 Shin-Etsu Chemical Co., Ltd. Compound semiconductor laminate substrate, method for manufacturing same, and semiconductor element
WO2020047814A1 (zh) * 2018-09-07 2020-03-12 苏州晶湛半导体有限公司 半导体结构及其制备方法
US20220416015A1 (en) * 2019-10-29 2022-12-29 Kyocera Corporation Semiconductor element and method for manufacturing semiconductor element
CN113921664B (zh) * 2021-10-11 2023-01-06 松山湖材料实验室 一种高质量氮化物紫外发光结构的生长方法

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Also Published As

Publication number Publication date
EP1834349A1 (en) 2007-09-19
CN100487865C (zh) 2009-05-13
KR101159156B1 (ko) 2012-06-26
RU2007126749A (ru) 2009-01-27
HK1111264A1 (zh) 2008-08-01
US20120064700A1 (en) 2012-03-15
CN101080808A (zh) 2007-11-28
TW200639926A (en) 2006-11-16
RU2368030C2 (ru) 2009-09-20
US20080308841A1 (en) 2008-12-18
KR20070108147A (ko) 2007-11-08
WO2006064081A1 (en) 2006-06-22
JP2008523635A (ja) 2008-07-03

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