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ES8503889A1 - Un metodo para activar un potencial y luego eliminar las trayectorias de corriente de cortocircuito activadas y existentes. - Google Patents

Un metodo para activar un potencial y luego eliminar las trayectorias de corriente de cortocircuito activadas y existentes.

Info

Publication number
ES8503889A1
ES8503889A1 ES526597A ES526597A ES8503889A1 ES 8503889 A1 ES8503889 A1 ES 8503889A1 ES 526597 A ES526597 A ES 526597A ES 526597 A ES526597 A ES 526597A ES 8503889 A1 ES8503889 A1 ES 8503889A1
Authority
ES
Spain
Prior art keywords
circuit current
short circuit
current paths
latent
semiconductor region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES526597A
Other languages
English (en)
Other versions
ES526597A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Energy Conversion Devices Inc
Original Assignee
Energy Conversion Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/520,054 external-priority patent/US4464823A/en
Application filed by Energy Conversion Devices Inc filed Critical Energy Conversion Devices Inc
Publication of ES8503889A1 publication Critical patent/ES8503889A1/es
Publication of ES526597A0 publication Critical patent/ES526597A0/es
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
    • H01L21/46Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/469Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers
    • H01L21/47Organic layers, e.g. photoresist
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00Manufacture or treatment of devices covered by this subclass
    • H10F71/10Manufacture or treatment of devices covered by this subclass the devices comprising amorphous semiconductor material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00Individual photovoltaic cells, e.g. solar cells
    • H10F10/10Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/17Photovoltaic cells having only PIN junction potential barriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00Manufacture or treatment of devices covered by this subclass
    • H10F71/10Manufacture or treatment of devices covered by this subclass the devices comprising amorphous semiconductor material
    • H10F71/107Continuous treatment of the devices, e.g. roll-to roll processes or multi-chamber deposition
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

METODO PARA ACTIVAR UN POTENCIAL Y ELIMINAR LAS TRAYECTORIAS DE CORRIENTE DE CORTOCIRCUITO ACTIVADAS.CONSISTE EN: A) APLICAR UNA POLARIZACION (56, 57) AL DISPOSITIVO FOTOVOLTAICO (55) QUE TIENE: UNA REGION SEMICONDUCTORA (62) POR ENCIMA DE UN SUSTRATO (61) Y CON UNA SUPERFICIE DE INTERFAZ OPUESTA AL SUSTRATO, Y UNA CAPA (64) DE UN MATERIAL CONDUCTOR TRANSMISOR DE LA LUZ, POR ENCIMA DE LA SUPERFICIE DE INTERFAZ DE LA REGION SEMICONDUCTORA, PARA CONVERTIR LOS DEFECTOS POTENCIALES (58, 59) LATENTES EN TRAYECTORIAS DE CORRIENTE DE CORTOCIRCUITO EXISTENTES; Y B) AUMENTAR CONSIDERABLEMENTE LA RESISTIVIDAD DE LAS TRAYECTORIAS DE CORRIENTE DE CORTOCIRCUITO DE MANERA SELECTIVA EN LA SUPERFICIE DE INTERFAZ DE LA REGION SEMICONDUCTORA (62).
ES526597A 1983-08-03 1983-10-20 Un metodo para activar un potencial y luego eliminar las trayectorias de corriente de cortocircuito activadas y existentes. Granted ES526597A0 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/520,054 US4464823A (en) 1982-10-21 1983-08-03 Method for eliminating short and latent short circuit current paths in photovoltaic devices

Publications (2)

Publication Number Publication Date
ES8503889A1 true ES8503889A1 (es) 1985-03-01
ES526597A0 ES526597A0 (es) 1985-03-01

Family

ID=24071012

Family Applications (1)

Application Number Title Priority Date Filing Date
ES526597A Granted ES526597A0 (es) 1983-08-03 1983-10-20 Un metodo para activar un potencial y luego eliminar las trayectorias de corriente de cortocircuito activadas y existentes.

Country Status (8)

Country Link
EP (1) EP0134364A3 (es)
JP (1) JPS6046080A (es)
KR (1) KR850003476A (es)
AU (1) AU2042183A (es)
BR (1) BR8305792A (es)
ES (1) ES526597A0 (es)
IN (1) IN160221B (es)
MX (1) MX159519A (es)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU594359B2 (en) * 1985-08-24 1990-03-08 Semiconductor Energy Laboratory Co. Ltd. Semiconductor device free from the current leakage through a semiconductor layer and method for manufacturing same
US6228662B1 (en) 1999-03-24 2001-05-08 Kaneka Corporation Method for removing short-circuited sections of a solar cell
ATE240589T1 (de) * 1999-03-25 2003-05-15 Kaneka Corp Verfahren zum herstellen von dünnschicht- solarzellen-modulen
JP4627575B2 (ja) * 1999-08-12 2011-02-09 株式会社カネカ 太陽電池の短絡部除去方法
AU766466B2 (en) * 1999-05-14 2003-10-16 Kaneka Corporation Reverse biasing apparatus for solar battery module
JP2007189199A (ja) 2005-12-12 2007-07-26 Tdk Corp キャパシタおよびその製造方法
US8158454B2 (en) 2008-09-09 2012-04-17 Sanyo Electric Co., Ltd. Method for manufacturing solar cell module
JP5990533B2 (ja) * 2011-11-14 2016-09-14 株式会社日本マイクロニクス シート状電池のリペア装置
DE102018001057A1 (de) 2018-02-07 2019-08-08 Aic Hörmann Gmbh & Co. Kg Verfahren zur Verbesserung des ohmschen Kontaktverhaltens zwischen einem Kontaktgitter und einer Ermitterschicht einer Siliziumsolarzelle
CN108233329B (zh) * 2018-03-16 2024-05-31 西安赛诺克新能源科技有限公司 一种提高主电路断开响应速度的保护电路
CN117353651B (zh) * 2023-10-16 2024-04-16 中科宏一教育科技集团有限公司 光伏系统控制方法、装置、设备和介质

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4197141A (en) * 1978-01-31 1980-04-08 Massachusetts Institute Of Technology Method for passivating imperfections in semiconductor materials
US4166918A (en) * 1978-07-19 1979-09-04 Rca Corporation Method of removing the effects of electrical shorts and shunts created during the fabrication process of a solar cell
JPS5683981A (en) * 1979-12-13 1981-07-08 Matsushita Electric Ind Co Ltd Semiconductor device and manufacture
US4385971A (en) * 1981-06-26 1983-05-31 Rca Corporation Electrolytic etch for eliminating shorts and shunts in large area amorphous silicon solar cells

Also Published As

Publication number Publication date
IN160221B (es) 1987-07-04
EP0134364A3 (en) 1986-06-04
MX159519A (es) 1989-06-26
JPS6046080A (ja) 1985-03-12
KR850003476A (ko) 1985-06-17
BR8305792A (pt) 1985-05-21
AU2042183A (en) 1985-02-07
EP0134364A2 (en) 1985-03-20
JPH0572756B2 (es) 1993-10-12
ES526597A0 (es) 1985-03-01

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