EP0639038B1 - Schaltungsanordnung zum Umwandeln eines Stereosignals - Google Patents
Schaltungsanordnung zum Umwandeln eines Stereosignals Download PDFInfo
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- EP0639038B1 EP0639038B1 EP94202275A EP94202275A EP0639038B1 EP 0639038 B1 EP0639038 B1 EP 0639038B1 EP 94202275 A EP94202275 A EP 94202275A EP 94202275 A EP94202275 A EP 94202275A EP 0639038 B1 EP0639038 B1 EP 0639038B1
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- European Patent Office
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- signal
- circuit
- output
- correction
- storage device
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04S—STEREOPHONIC SYSTEMS
- H04S1/00—Two-channel systems
- H04S1/007—Two-channel systems in which the audio signals are in digital form
Definitions
- the invention relates to a circuit arrangement for converting a center signal and a stereo signal comprising a side signal in each case an output signal for two audio signal channels with a matching arrangement to minimize crosstalk between the output signals.
- the output signals for the audio signal channels generated by dematricing the center signal and the side signal contains in the usual stereo systems, the center signal sound information over both sound signal channels, whereas the side signal prefers either audio information via one of the audio channels or for example a difference between the sound information of the two Contains audio signal channels.
- the center signal sound information over both sound signal channels
- the side signal prefers either audio information via one of the audio channels or for example a difference between the sound information of the two Contains audio signal channels.
- certain amplitude ratios are adhered to in order to dematriculate a to obtain crosstalk-free division of the sound information into the two sound signal channels.
- These predetermined amplitude ratios can, for example, by Circuit tolerances or transmission errors may be disturbed, so that there is between the two Audio signal channels to crosstalk.
- an arrangement for adjusting a stereo decoder is minimal Crosstalk known.
- a bandpass filter is filtered out of the subcarrier of the stereo multiplex signal the pilot tone and so that a local oscillator is phase-synchronized, is used for adjustment to the minimum Crosstalk between the left and right output channels using an electronically adjustable Phase setting device in the pilot tone filter branch automatically sets the phase.
- the object of the invention is to design a circuit arrangement of the type mentioned at the beginning, that during their manufacture, commissioning or during their operation, a quick, there is a simple and precise possibility of adjustment by means of which the crosstalk during operation can be effectively eliminated.
- a circuit arrangement for converting a center signal and a stereo signal comprising a side signal in each case an output signal for two audio signal channels with a matching arrangement to minimize crosstalk between the Output signals solved according to the invention by a limiter circuit, the first of the Output signals can be fed and from which this into an at least almost rectangular, amplitude-limited signal of the same frequency can be converted, a mixer circuit for Obtaining a DC signal by multiplicatively combining the amplitude-limited Signal with a second of the output signals, a control circuit for winning a Control signal from the DC signal, an adjustment circuit for influencing the amplitudes the center signal and / or the side signal with the aid of the control signal, a storage device for storing the control signal and a switching device by which in a first Operating state of the circuit arrangement, the control signal of both the storage device for storing and the setting circuit can be fed and in a second operating state the circuit arrangement, the control signal stored in the memory device Setting circuit can be fed.
- the adjustment made possible by the circuit arrangement according to the invention is in the carried out first operating state, in which the adjustment arrangement a control loop forms, which can be used to minimize a signal which is formed in this way is that it only occurs when there is crosstalk between the audio signal channels.
- the circuit arrangement according to the invention can then be used in their second operating state for processing, for example, by a broadcaster or a stereo signal received on a recording medium.
- the second operating state is the storage of the control signal in the storage device maintain the recorded alignment state of the circuit arrangement.
- the center signal and the side signal of the stereo signal are correct in the first operating state match, and the control signal is regulated to a value at which the second output signal disappears.
- This method is used especially in the stereo systems, which as the center signal the sum and as the side signal the difference of the sound signals of the transmit both audio signal channels; in particular, the second output signal is the assigned to the right audio signal channel.
- the control signal is regulated to a value at which the second output signal disappears.
- This method is preferably used when the center signal is the sum of the sound signals of the two sound signal channels and the side signal double the sound signal for the right Sound signal channel corresponds. While the first-mentioned method is therefore especially for the European stereo broadcasting as well as the television sound according to Korean standard use the second method can be found, in particular, for the television sound of European television apply. For these different transmission standards of the sound signals can always use a matching arrangement of the same structure.
- the circuit arrangement can be compared, for example, directly after their manufacture, in the manufacture of a device for stereo sound signal reproduction, in which the circuit arrangement according to the invention is used, or in a first or each time the circuit arrangement according to the invention is started up.
- the one for the adjustment value of the control signal is then stored in the memory device filed and can be called up during operation.
- the invention includes Circuitry prefers a conversion circuit that converts into signal paths for that Control signal between the control circuit, the setting circuit and the memory device is inserted and through which the control signal emitted by the control circuit into a form is convertible, in which it can be stored in the storage device, and by which stored control signal can be converted into a form to be supplied to the setting circuit.
- a particularly simple and precise storage is achieved in that the Control signal can be stored in the memory device in digital form and the Conversion circuit each an arrangement for converting the control signal into this digital Form or from this digital form.
- the adjustment signal to be stored in digital form can be a method for adjustment for example, in one of the circuit arrangements according to the invention Read memory must be stored.
- the storage device can also be of the circuit arrangement to convert the stereo signal spatially separated within a control system, For example, a bus system can be arranged in which other control and Adjustment data are stored.
- the invention can also be carried out in a simple manner carry out an automatically controlled adjustment, for example, each time it is started up of a device in which the circuit arrangement according to the invention is used. On in this way, for example, aging effects of components and others Eliminate time-variable interferences effectively.
- a preferred embodiment of the circuit arrangement according to the invention is distinguished characterized in that the arrangement for converting the control signal into digital form a Comparator stage, which can be supplied with the control signal from the control circuit at a first input is, and comprises a counter stage, the counting direction by an output signal of the comparator stage determinable and their counter reading as a control signal in digital form in the storage device is storable, and that the arrangement for converting the control signal from the digital form includes a digital-to-analog converter stage for converting the actuating signal the digital in the form that can be fed to the setting circuit, in which it continues to be second input of the comparator stage for comparison with that which can be supplied by the control circuit Control signal can be fed.
- Such an arrangement for converting the control signal provides a very simple structure on the one hand a very precise control signal and on the other hand it is used both for the output of a control signal in digital form as well as for taking over such an actuating signal from the storage device simple and easy to use. This is preferably done in the storage device Stored control signal of the counter stage for presetting to an appropriate counter reading forwarded.
- the control circuit preferably includes an integration stage for obtaining the control signal as well as a low pass level.
- the low-pass level serves to suppress all alternating components of the mixed products of the mixer circuit, since only their DC components are used for the control signal are. However, since a control error remains with a low-pass stage alone, so that crosstalk the integration level is still provided, that cancels this control error. This is a complete elimination of crosstalk guaranteed.
- Another embodiment of the circuit arrangement according to the invention is characterized by this from that the trimming arrangement a second limiter circuit which the second output signal can be fed and from which this into an at least almost rectangular, second amplitude-limited signal of the same frequency is deformable, a second mixer circuit to obtain a second DC signal by multiplying the second amplitude-limited signal with the first output signal, a second control circuit to obtain a second actuating signal from the second direct signal, a second Storage device for storing the second control signal and a second switching device comprises, by the in a first operating state of the circuit arrangement second control signal of both the second storage device for storing and the setting circuit can be supplied and in a second operating state of the circuit arrangement the second control signal of the setting circuit stored in the second memory device can be supplied, and that in the setting circuit, the amplitudes of the center signal and / or the side signal in mutually different frequency ranges using the two control signals can be influenced.
- This embodiment of the invention is particularly applicable to circuit arrangements for converting a stereo signal, in which the side signal before dematricating a Noise reduction should be subjected.
- Such noise suppression is special then advantageous if the side signal is modulated to a higher frequency than has the center signal and thus higher noise components. Because of the special, spectral Distribution of this noise can then be beneficial in matching the crosstalk also to be made frequency-dependent.
- the two control signals can then be used.
- the individual signal processing stages that are in the adjustment arrangement from each other form independent control loops; for example
- the first and the second limiter circuit can have an identical structure, accordingly the first and second mixer circuits, and so on.
- a test signal is supplied as a stereo signal in the first operating state, at which the center signal an additive and the side signal a subtractive superimposition of a low-frequency first test oscillation and a high-frequency second test oscillation and the second test signal in the side signal to the second test signal in Center signal occurs in phase opposition, and the frequency of the second test oscillation is a non-integer multiple of the frequency of the first test oscillation, and that the first Control signal is regulated to a value in which parts of the first test vibration in the second Output signal disappear, and the second control signal is regulated to a value, where the proportions of the second test oscillation disappear in the first output signal.
- the reference numeral 1 denotes a stereo demodulator
- the one at an input 2 a stereo signal is supplied, which in the usual manner according to one of the known Transmission standards include a center signal and a side signal.
- From the stereo demodulator 1 becomes the center signal at a first output 3 and the side signal at a second Output 4 delivered.
- the side signal at the second output 4 contains depending on the applied Transmission standard of the stereo signal preferably either a difference signal between the Sound signals for the two sound signal channels "left" and "right", or only the sound signal for the right audio signal channel.
- the center signal becomes a first input 5 fed to a dematricating circuit 6. Accordingly, the side signal comes from second output 4 of the stereo demodulator 1 to a second input 7 of the dematricating circuit 6, but in the example according to FIG. 1 via a setting circuit 8, the input 9 with the second output 4 of the stereo demodulator 1 and its output 10 with the second Input 7 of the dematricating circuit 6 is connected.
- the side signal the amplitude of the stereo demodulator 1 is set by the setting circuit 8, before it reaches the dematricating circuit 6. This can reduce the amplitude ratio between the center signal supplied to the dematricating circuit 6 and the side signal the value required for crosstalk-free dematriculation.
- the dematricating circuit 6 also has two outputs 11, 12 at which the sound signals for the two audio signal channels and assigned output connections 13 or 14 of the circuit arrangement for example for playback. Even though The circuit arrangement should also be readily usable for other transmission standards 1 further described by way of example for processing a stereo signal where the center signal is the sum and the side signal is the difference which represents audio signals for the two audio signal channels. At the first output 11 of the dematricating circuit 6 then becomes the sound signal for the left sound signal channel, on the second Output 12 of the dematricating circuit 6 the sound signal for the right sound signal channel submitted. It should also be mentioned that the setting circuit 8 in a modification of the 1 also between the first output 3 of the stereo demodulator 1 and the first input 5 of the dematricating circuit 6 and then be used accordingly to adjust the amplitude of the center signal can.
- the limiter circuit 16 that occurs at the first output 11 of the dematricating circuit 6 Output signal - i.e. a tone signal assigned to the left tone signal channel - into a rectangular, amplitude-limited signal transformed, the frequency of the output signal from the first output 11 of the dematricating circuit 6 remains unchanged.
- the limiter circuit 16 preferably comprises an amplifier for this, which is determined by the output signal on Input 15 is heavily overdriven. In Fig. 2a this rectangular signal is for the simple one Case shown that a vibration constant as a sound signal for the left sound signal channel Frequency, preferably sinusoidal, is used.
- the stereo signal which is fed to the stereo demodulator 1 at input 2
- the stereo signal is such that, when correctly converted, it is only for the left audio signal channel provides a sound signal in the event that the side signal is the difference and the center signal represents the sum of the audio signals for the left and right audio signal channels, which Match the center signal with the side signal of the stereo signal at input 2.
- the side signal is twice the sound signal for the right Sound signal channel corresponds to form the stereo signal at input 2 such that the center signal corresponds to half the side signal.
- this is the sound signal for the right in this case Sound signal channel forming second output signal disappear, in the second case disappears the second output signal which then forms the audio signal for the left audio signal channel; correct amplitude setting of side signal and center signal at the outputs 3, 4 of the stereo demodulator 1 provided.
- a control circuit 22 the input 23 of the DC signal from the output 21 of the Mixer circuit 19 is supplied.
- the control circuit 22 wins from the DC signal an actuating signal and outputs this at an output 24.
- the control circuit 22 includes preferably a low pass level and an integration level; through the integration level essentially a continuously increasing one from the direct component of the direct signal according to FIG. 2c) Control signal generated, whereas the alternating component of the direct signal (its superimposed Ripple) is suppressed by the low-pass stage.
- the control signal formed in this way is available at the output 24 of the control circuit 22.
- the 1 also shows a switching device 25 with a first input 26 and a second input 27 and an output 28.
- the switching device 25 is of simplicity for the sake of schematic representation as a mechanical switch, through which the first one can be selected Input 26 in a switch position "1" or the second input 27 in a second Switch position "2" can be connected to output 28.
- the Switching device 25 are preferably constructed with electronic switching means.
- the output 28 of the switching device 25 with an adjustment input 29 is also the Setting circuit 8 connected to supply the control signal.
- the connection of the exit 24 with the first input 26 is also with a control signal output 30, the second Input 27 connected to a control signal input 31.
- the control signal output 30 can preferably with the input of a memory device for storing the control signal be connected, the output of which in turn can be connected to the control signal input 31. As a result, a value of the control signal can be stored in this storage device, not shown saved and retrieved when needed.
- the switching device 25 takes its first switch position "1" a.
- the control signal of both the storage device not shown, over the control signal output 30 for storing and the setting circuit 8 via the setting input 29 fed.
- the circuit arrangement thus forms a control loop for adjustment of crosstalk.
- the control signal is changed until the second output signal at the second output 12 and thus the DC signal according to FIG. 2c) disappear.
- the Control signal at the output 24 of the control circuit 22 is then constant and can be constant with this Value can be stored in the storage device.
- the switching device 25 In a second operating state, the switching device 25 is in its second switch position "2" transferred. The control loop described above is then interrupted. Rather, the storage device now uses the control signal input 31 and the setting input 29 of the setting circuit 8, the stored, constant control signal. In this second operating state, the stereo signal at the input 2 can take any form assume, always ensuring crosstalk-free operation of the circuit arrangement is.
- the first operating state of the circuit arrangement thus serves to balance it second operating state use for (intended) conversion, for example stereo signals to be reproduced.
- Fig. 2d) and e) corresponding to Fig. 2b) and c) the case is shown that in the first Operating state of the circuit arrangement for the side signal a positive amplitude deviation compared to the center signal. That at the second output 12 of the dematricating circuit 6 resulting in FIG. 2d) is then compared to the signal in FIG. 2b) represented case negative; there is a negative DC signal at the output 21 of the mixer circuit 19. An actuating signal is formed from this, which via the setting circuit 8 a reduction in the amplitude of the side signal and thus an adjustment of the crosstalk causes.
- FIG. 3 shows a further exemplary embodiment of the circuit arrangement according to the invention with a conversion circuit 32, which into the signal paths for the control signal between the Control circuit 22, the setting circuit 8 and the storage device (not shown) is inserted. Otherwise, the circuit elements already described for FIG. 1 are again provided with the same reference numerals.
- the conversion circuit 32 in particular enables the actuating signal in the memory device can be saved in digital form.
- the conversion circuit 32 comprises an arrangement for converting the control signal from the output 24 of the control circuit 22 in the digital form.
- this arrangement comprises a comparator stage 33, whose first, non-inverting input forms the control signal output 30 and whose second, inverting input 34 is connected to the control signal input 31.
- On Output 35 of the comparator stage 33 has a counting direction input 36 of a counter stage 37 connected, the counting direction of the output signal of the comparator 33 Output 35 can be determined.
- the count of the counter 37 is at an output 38 of the Counter stage 37 as a control signal in digital form. As such, it can have a digital signal output 39 of the storage device, not shown, and stored there become.
- the comparator stage 33 and the counter stage 37 includes the arrangement for converting the control signal from this digital form a digital-to-analog converter stage 40, whose digital input 41 connected to the output 38 of the counter 37 and the digital signal output 39 and whose analog output 42 with the control signal input 31 and the second inverting input 34 of the comparator stage 33 is linked.
- the digital-to-analog converter stage 40 sets this Control signal from the digital form in which it can also be stored in the storage device is into the form which can be supplied to the setting circuit 8 via its setting input 29.
- the comparator stage 33 By connecting the analog output 42 to the second inverting input 34 the comparator stage 33 is supplied with a reference signal for the latter, with which the control signal can be compared from the output 24 of the control circuit 22. Depending on the outcome of this In comparison, the control stage 37 is switched in the up or down count direction. By The count becomes a counting pulse of a clock signal that can be supplied via a counting input 43 the counting stage 37 corresponding to the counting direction specified by the comparator stage 33 changed until it corresponds to the digital form of the control signal at output 24. This The counter reading is adjusted in the first operating state in which the switching device 25 is in the switch position "1". Accordingly, the control loop then available of FIG. 3 be unchanged from that of FIG. 1 and thus one by Processes in the conversion circuit 32 unaffected regulation of crosstalk signals, i.e. an unaffected comparison of this crosstalk take place. The conversion circuit 32 only settles to the final value of the control signal and feeds it to the storage device.
- the clock signal is the counter input 43 of the counter 37 via a switch 44 from the output 17 supplied to the limiter circuit 16 and thus from the amplitude-limited signal derived.
- the switch 44 is located in the one labeled "1" Switch position.
- the one in Fig. 3 can be simpler than mechanical Switch 44 shown switch preferably also carried out with electronic components become.
- the switching device 25 and the switch 44 in their Switch positions "2" transferred. This takes place after the adjustment has been carried out and for an intended use Processing a stereo signal to be reproduced, for example.
- the counting entrance 43 then no more counting pulses are supplied, so that the count of the counter stage 37 remains unchanged and thus a constant as a control signal from the analog output 42 Value for the control signal is given.
- FIG. 4 shows a further exemplary embodiment of the circuit arrangement according to the invention, which has two control loops for preferably frequency-selective adjustment of crosstalk between the two audio signal channels and in the rest with parts of the elements described above match elements again matching reference numerals are provided.
- This second output signal is from the second limiter circuit 46 into an at least almost rectangular, second amplitude-limited signal of the same type Frequency deformable, which can be output at an output 48 of the second limiter circuit 46 is.
- the second mixer circuit 49 further comprises a second mixer circuit 49, the first input 50 is connected to the output 48 of the second limiter circuit 46.
- a second input 51 of the second mixer circuit 49 is connected to the first output 11 Dematricator 6 connected.
- the second mixer circuit 49 is in the Able to output a second DC signal at its output 52, which by multiplicative Linking the second amplitude limited signal from the output 48 of the second limiter circuit 46 with the first output signal from the first output 11 of the dematricating circuit 6 can be won.
- the second DC signal from the output 52 of the second mixer circuit 49 is a second control circuit 53 connected to its output 52 Input 54 can be fed.
- the second control circuit 53 also has an output 55 on which a signal which can be obtained in the second control circuit 53 from the second direct signal, second control signal can be issued.
- the adjustment arrangement according to the exemplary embodiment according to FIG. 4 there is also one second conversion circuit 56 is provided which corresponds to the first conversion circuit 32 is constructed and thus a second comparator stage 57, a second counter stage 58 and a second digital-to-analog converter stage 59.
- the second comparator stage 57 and the second counter 58 form a second arrangement for converting the second control signal in a digital, in a second storage device, not shown storable form.
- a first, non-inverting input of the second comparator stage 57 which forms a second control signal output 60, with the output 55 of the second Control circuit 53 connected.
- An output 61 of the second comparator stage 57 leads to one Counting direction input 62 of the second counter stage 58, of which an output 63 at which the counter reading the second counter stage 58 can be output as a second actuating signal in digital form with a digital input 64 of the second digital-to-analog converter stage 59 is connected. Moreover is the output 63 of the second counter stage 58 with a second digital signal output 65 connected via which the second control signal in digital form of the second storage device is feedable.
- An analog output 66 of the second digital-to-analog converter stage 59 is on the one hand connected to a second, inverting input 67 of the second comparator stage 57, around the second control signal after conversion into the analog form as a reference signal to provide the second comparator stage 57.
- the second counter stage 58 has a preset input 69, via which the second counter stage 58 can be set to a predeterminable counter reading.
- a counting input 70 is provided for supplying counting pulses to the second Counting stage 58.
- the counting inputs 43, 70 are both counting stages 37, 58 connected via the switch 44 to the output 48 of the second limiter circuit 46, in order to derive the clock signal from the second amplitude-limited signal which can be tapped there.
- the second control signal output 60 is in FIG. 4 with a first input 71 of a second switching device 72 connected, the second input 73 to the second actuating signal input 68 is performed.
- An output 74 of the second switching device 72 is connected to a second one Setting input 292 connected to a setting circuit 80, the first setting input 291 is connected to the output 28 of the first switching device 25 and which is the location of the Adjustment circuit 8 takes in the embodiments of FIGS. 1 and 3.
- the setting circuit 80 designed such that the first and the second control signal at the setting inputs 291, 292 the side signal from the second output 4 of the stereo demodulator 1 can be influenced in amplitude in different parts of its frequency spectrum is.
- a depth adjuster for example, within the setting circuit 80 via the first setting input 291 a depth adjuster, but a height adjuster via the second setting input 292 be operated.
- Other spectral setting options can also be implemented. In any case, these settings are made by two independent control loops performed.
- a bus circuit 75 is provided in the circuit arrangement according to FIG Data line 76 data and commands can be fed or the data via this data line 76 and can issue orders. Via this bus circuit 75 and the data line 76, which with the Presetting inputs 45, 69 and the digital signal outputs 39, 65 are connected the illustrated alignment arrangement with the storage devices for storing the Control signals must be connected. In addition, can not be connected by the Bus circuit 75 to the switching devices 25, 72 and to the switch 44, through which these can be switched according to the first or second operating state.
- the stereo demodulator 1 in the first operating state as the input 2 Stereo signal fed a test signal in which the center signal is an additive and the side signal a subtractive superposition of a low-frequency first test vibration and one high-frequency second test vibration.
- the second test vibration occurs in the side signal and in the middle signal in opposite phase, the first test oscillation in contrast in Center signal and in phase in the side signal.
- the frequencies of the test vibrations are selected in accordance with the spectral setting options of the setting circuit 80 and should be non-integer multiples of each other. For example, the first test vibration a frequency of 300 Hz and the second test oscillation a frequency of approximately 3.1 kHz.
- the first limiter circuit 16 is then a first amplitude-limited, at least almost rectangular signal with the frequency of the first test oscillation (e.g. 300 Hz) emitted, whereas the second limiter circuit 46 has a second one at its output 48 amplitude-limited, at least almost rectangular signal with the frequency of second test vibration (e.g. 3.1 kHz).
- crosstalk becomes via the second switching device 72 the second test oscillation to the first output 11 of the dematricating circuit 6
- Zero regulating, second control signal is supplied, as this is via the second setting input 292 only the frequency range of the second test oscillation regardless of the first setting input 291 influenced.
- the simultaneous effectiveness of the two control loops results in a complete Adjustment of crosstalk, i.e. a correct adjustment of the circuit arrangement.
- iterative adjustment procedure alternating with a multiple Adjustment by the first and the second control signal is therefore not necessary.
- the matching process in this The first operating state is preferably controlled by the bus circuit 75. After that The switching devices 25, 72 and the switch 44 are adjusted to their switch positions "2" transferred, whereupon the setting circuit 80 with constant values for the first and the second control signal is operated.
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Description
- durch Einspeisen eines Kalibriersignals mit der Frequenz des Pilottons unmittelbar am Eingang des Pilotton-Bandpaßfilters und Abgleich des Phasenfehlers zwischen Eingang und Ausgang des Pilotton-Filterzweiges auf Null oder
- durch Einspeisen eines Stereo-Multiplex-Kalibriersignals am Eingang des Decoders und Abgleich der dabei gemessenen Übersprechdämpfung auf ein Maximum oder
- bei Verwendung eines Pilotton-Bandpaßfilters, dessen Durchlaßkurve bei der Mittenfrequenz ein lokales Minimum und einen Phasenfehler von M*90° (M=0, 1, 2, 3...) zwischen Ein- und Ausgang aufweist, durch Einspeisen eines beliebigen Stereo-Multiplexsignals am Eingang des Decoders und Abgleich der Mittenfrequenz des Bandpaßfilters auf das lokale Minimum.
- Fig. 1
- ein Prinzipschaltbild einer erfindungsgemäßen Schaltungsanordnung und zur Erläuterung eines erfindungsgemäßen Verfahrens zum Durchführen eines Abgleichs dieser Schaltungsanordnung,
- Fig. 2
- einige beispielhafte Signalverläufe der Schaltungsanordnung nach Fig. 1,
- Fig. 3
- eine detailliertere Ausgestaltung einer Schaltungsanordnung gemäß Fig. 1 und
- Fig. 4
- ein Ausführungsbeispiel einer für einen frequenzabhängigen Abgleich eingerichteten, erfindungsgemäßen Schaltungsanordnung.
Claims (11)
- Schaltungsanordnung zum Umwandeln eines ein Mittensignal und ein Seitensignal umfassenden Stereosignals in je ein Ausgangssignal für zwei Tonsignalkanäle mit einer Abgleichanordnung zum Minimieren eines Übersprechens zwischen den Ausgangssignalen (an 11, 12),
gekennzeichnet durcheine Begrenzerschaltung (16), der ein erstes der Ausgangssignale (von 11) zuführbar ist und von der dieses in ein wenigstens nahezu rechteckförmiges, amplitudenbegrenztes Signal gleicher Frequenz umformbar ist,eine Mischerschaltung (19) zum Gewinnen eines Gleichsignals durch multiplikatives Verknüpfen des amplitudenbegrenzten Signals mit einem zweiten der Ausgangssignale (an 12),eine Regelschaltung (22) zum Gewinnen eines Stellsignals aus dem Gleichsignal,eine Einstellschaltung (8) zum Beeinflussen der Amplituden des Mittensignals und/oder des Seitensignals mit Hilfe des Stellsignals (von 24),eine Speichervorrichtung zum Speichern des Stellsignals (von 24) sowieeine Umschaltvorrichtung (25), durch die in einem ersten Betriebszustand der Schaltungsanordnung das Stellsignal (von 24) sowohl der Speichervorrichtung zum Speichern als auch der Einstellschaltung (8) zuführbar ist und in einem zweiten Betriebszustand der Schaltungsanordnung das in der Speichervorrichtung gespeicherte Stellsignal der Einstellschaltung (8) zugeleitet werden kann. - Schaltungsanordnung nach Anspruch 1,
gekennzeichnet durch eine Umwandlungsschaltung (32), die in Signalwege für das Stellsignal zwischen der Regelschaltung (22), der Einstellschaltung (8) und der Speichervorrichtung eingefügt ist und durch die das von der Regelschaltung (22) abgegebene Stellsignal in eine Form umwandelbar ist, in der es in der Speichervorrichtung abspeicherbar ist, und durch die das gespeicherte Stellsignal in eine der Einstellschaltung (8) zuzuführende Form umwandelbar ist. - Schaltungsanordnung nach Anspruch 2,
dadurch gekennzeichnet, daß das Stellsignal in der Speichervorrichtung in digitaler Form abspeicherbar ist und die Umwandlungsschaltung (32) je eine Anordnung zum Umwandeln des Stellsignals in diese digitale Form bzw. aus dieser digitalen Form umfaßt. - Schaltungsanordnung nach Anspruch 3,
dadurch gekennzeichnet, daß die Anordnung zum Umwandeln des Stellsignals in die digitale Formeine Komparatorstufe (33), der an einem ersten Eingang (30) das Stellsignal von der Regelschaltung (22) zuführbar ist, undeine Zählstufe (37) umfaßt, deren Zählrichtung durch ein Ausgangssignal (an 35) der Komparatorstufe (33) bestimmbar und deren Zählerstand (von 38) als Stellsignal in digitaler Form in der Speichervorrichtung speicherbar ist, - Schaltungsanordnung nach Anspruch 4,
dadurch gekennzeichnet, daß das in der Speichervorrichtung gespeicherte Stellsignal der Zählstufe (37) zur Voreinstellung (an 45) auf einen entsprechenden Zählerstand zuleitbar ist. - Schaltungsanordnung nach Anspruch 4 oder 5,
dadurch gekennzeichnet, daß ein aus dem amplitudenbegrenzten Signal (an 17) abgeleitetes Taktsignal der Zählstufe (37) als Zählsignal (an 43) zuleitbar ist. - Schaltungsanordnung nach einem der vorhergehenden Ansprüche,
dadurch gekennzeichnet, daß die Regelschaltung (22) eine Integrationsstufe sowie eine Tiefpaßstufe umfaßt. - Schaltungsanordnung nach einem der vorhergehenden Ansprüche,
dadurch gekennzeichnet, daß die Abgleichanordnungeine zweite Begrenzerschaltung (46), der das zweite Ausgangssignal (von 12) zuführbar ist und von der dieses in ein wenigstens nahezu rechteckförmiges, zweites amplitudenbegrenztes Signal gleicher Frequenz (an 48) umformbar ist,eine zweite Mischerschaltung (49) zum Gewinnen eines zweiten Gleichsignals (an 52) durch multiplikatives Verknüpfen des zweiten amplitudenbegrenzten Signals mit dem ersten Ausgangssignal (von 11),eine zweite Regelschaltung (53) zum Gewinnen eines zweiten Stellsignals (an 55) aus dem zweiten Gleichsignal (an 52),eine zweite Speichervorrichtung zum Speichern des zweiten Stellsignals (an 55) sowieeine zweite Umschaltvorrichtung (72) umfaßt, durch die in einem ersten Betriebszustand der Schaltungsanordnung das zweite Stellsignal (von 55) sowohl der zweiten Speichervorrichtung zum Speichern als auch der Einstellschaltung (80; Fig. 4)zuführbar ist und in einem zweiten Betriebszustand der Schaltungsanordnung das in der zweiten Speichervorrichtung gespeicherte, zweite Stellsignal der Einstellschaltung (80) zugeleitet werden kann,und daß in der Einstellschaltung (80) die Amplituden des Mittensignals (an 3) und/oder des Seitensignals (an 4) in voneinander unterschiedlichen Frequenzbereichen mit Hilfe der beiden Stellsignale (an 291, 292) beeinflußbar sind. - Verfahren zum Betreiben einer Schaltungsanordnung zum Umwandeln eines ein Mittensignal und ein Seitensignal umfassenden Stereosignals in je ein Ausgangssignal für zwei Tonsignalkanäle,
dadurch gekennzeichnet, daß in einer Abgleichanordnung zum Minimieren eines Übersprechens zwischen den Ausgangssignalen (an 11, 12)einer Begrenzerschaltung (16) ein erstes der Ausgangssignale (von 11) zugeführt und von dieser in ein wenigstens nahezu rechteckförmiges, amplitudenbegrenztes Signal gleicher Frequenz umgeformt wird,in einer Mischerschaltung (19) ein Gleichsignal durch multiplikatives Verknüpfen des amplitudenbegrenzten Signals mit einem zweiten der Ausgangssignale (an 12) gewonnen wird,in einer Regelschaltung (22) ein Stellsignal aus dem Gleichsignal gewonnen wird,in einer Einstellschaltung (8) die Amplituden des Mittensignals und/oder des Seitensignals mit Hilfe des Stellsignals (von 24) beeinflußt werden,das Stellsignal (von 24) in einer Speichervorrichtung gespeichert wird,durch eine Umschaltvorrichtung (25) in einem ersten Betriebszustand der Schaltungsanordnung das Stellsignal (von 24) sowohl der Speichervorrichtung zum Speichern als auch der Einstellschaltung (8) zugeführt und in einem zweiten Betriebszustand der Schaltungsanordnung das in der Speichervorrichtung gespeicherte Stellsignal der Einstellschaltung (8) zugeleitet wird, und daßim ersten Betriebszustand das Mittensignal (an 3) und das Seitensignal (an 4) des Stereosignals übereinstimmen und das Stellsignal (an 24) auf einen Wert geregelt wird, bei dem das zweite Ausgangssignal (an 12) verschwindet. - Verfahren zum Betreiben einer Schaltungsanordnung zum Umwandeln eines ein Mittensignal und ein Seitensignal umfassenden Stereosignals in je ein Ausgangssignal fiir zwei Tonsignalkanäle,
dadurch gekennzeichnet, daß in einer Abgleichanordnung zum Minimieren eines Übersprechens zwischen den Ausgangssignalen (an 11, 12)einer Begrenzerschaltung (16) ein erstes der Ausgangssignale (von 11) zugeführt und von dieser in ein wenigstens nahezu rechteckförmiges, amplitudenbegrenztes Signal gleicher Frequenz umgeformt wird,in einer Mischerschaltung (19) ein Gleichsignal durch multiplikatives Verknüpfen des amplitudenbegrenzten Signals mit einem zweiten der Ausgangssignale (an 12) gewonnen wird,in einer Regelschaltung (22) ein Stellsignal aus dem Gleichsignal gewonnen wird,in einer Einstellschaltung (8) die Amplituden des Mittensignals und/oder des Seitensignals mit Hilfe des Stellsignals (von 24) beeinflußt werden,das Stellsignal (von 24) in einer Speichervorrichtung gespeichert wird,durch eine Umschaltvorrichtung (25) in einem ersten Betriebszustand der Schaltungsanordnung das Stellsignal (von 24) sowohl der Speichervorrichtung zum Speichern als auch der Einstellschaltung (8) zugeführt und in einem zweiten Betriebsizustand der Schaltungsanordnung das in der Speichervorrichtung gespeicherte Stellsignal der Einstellschaltung (8) zugeleitet wird, und daßim ersten Betriebszustand das Mittensignal (an 3) des Stereosignals dem halben Seitensignal (an 4) entspricht und das Stellsignal (an 24) auf einen Wert geregelt wird, bei dem das zweite Ausgangssignal (an 12) verschwindet. - Verfahren nach Anspruch 9 oder 10 zum Betreiben einer Schaltungsanordnung zum Umwandeln eines ein Mittensignal und ein Seitensignal umfassenden Stereosignals in je ein Ausgangssignal fiir zwei Tonsignalkanäle,
dadurch gekennzeichnet, daß in der Abgleichanordnungeiner zweiten Begrenzerschaltung (46) das zweite Ausgangssignal (von 12) zugeführt und von dieser in ein wenigstens nahezu rechteckförmiges, zweites amplitudenbegrenztes Signal gleicher Frequenz (an 48) umgeformt wird,in einer zweiten Mischerschaltung (49) ein zweites Gleichsignal (an 52) durch multiplikatives Verknüpfen des zweiten amplitudenbegrenzten Signals mit dem ersten Ausgangssignal (von 11) gewonnen wird,in einer zweiten Regelschaltung (53) ein zweites Stellsignal (an 55) aus dem zweiten Gleichsignal (an 52) gewonnen wird,das zweite Stellsignal (an 55) in einer zweiten Speichervorrichtung gespeichert wird,durch eine zweite Umschaltvorrichtung (72) in einem ersten Betriebszustand der Schaltungsanordnung das zweite Stellsignal (von 55) sowohl der zweiten Speichervorrichtung zum Speichern als auch der Einstellschaltung (80; Fig. 4) zugeführt und in einem zweiten Betriebszustand der Schaltungsanordnung das in der zweiten Speichervorrichtung gespeicherte, zweite Stellsignal der Einstellschaltung (80) zugeleitet wird,in der Einstellschaltung (80) die Amplituden des Mittensignals (an 3) und/oder des Seitensignals (an 4) in voneinander unterschiedlichen Frequenzbereichen mit Hilfe der beiden Stellsignale (an 291, 292) beeinflußt werdenund daß im ersten Betriebszustand als Stereosignal ein Prüfsignal zugeführt wird, bei dem das Mittensignal (an 3) eine additive und das Seitensignal (an 4) eine subtraktive Überlagerung einer niederfrequenten ersten Prüfschwingung und einer hochfrequenten zweiten Prüfschwingung aufweist und die zweite Prüfschwingung im Seitensignal (an 4) zur zweiten Prüfschwingung im Mittensignal (an 3) gegenphasig auftritt, und wobei die Frequenz der zweiten Prüfschwingung ein nicht-ganzzahliges Vielfaches der Frequenz der ersten Prüfschwingung ist, und daß das erste Stellsignal (an 291) auf einen Wert geregelt wird, bei dem Anteile der ersten Prüfschwingung im zweiten Ausgangssignal (an 12) verschwinden, und das zweite Stellsignal (an 292) auf einen Wert geregelt wird, bei dem Anteile der zweiten Prüfschwingung im ersten Ausgangssignal (an 11) verschwinden.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE4326811A DE4326811A1 (de) | 1993-08-10 | 1993-08-10 | Schaltungsanordnung zum Umwandeln eines Stereosignals |
DE4326811 | 1993-08-10 |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0639038A2 EP0639038A2 (de) | 1995-02-15 |
EP0639038A3 EP0639038A3 (de) | 1995-09-27 |
EP0639038B1 true EP0639038B1 (de) | 2001-12-12 |
Family
ID=6494848
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP94202275A Expired - Lifetime EP0639038B1 (de) | 1993-08-10 | 1994-08-08 | Schaltungsanordnung zum Umwandeln eines Stereosignals |
Country Status (5)
Country | Link |
---|---|
US (1) | US5579395A (de) |
EP (1) | EP0639038B1 (de) |
JP (1) | JPH07154900A (de) |
BR (1) | BR9403199A (de) |
DE (2) | DE4326811A1 (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
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US6449368B1 (en) | 1997-03-14 | 2002-09-10 | Dolby Laboratories Licensing Corporation | Multidirectional audio decoding |
AU2013400A (en) * | 1999-11-25 | 2001-06-04 | Embracing Sound Experience Ab | A method of processing and reproducing an audio stereo signal, and an audio stereo signal reproduction system |
DE10120108C2 (de) * | 2001-04-25 | 2003-04-30 | Harman Becker Automotive Sys | Verfahren zum Abgleich eines Roll-Off-Kompensationsfilters in einem Stereoempfänger sowie Stereoempfänger |
SE527062C2 (sv) * | 2003-07-21 | 2005-12-13 | Embracing Sound Experience Ab | Stereoljudbehandlingsmetod, -anordning och -system |
KR100739786B1 (ko) * | 2006-01-20 | 2007-07-13 | 삼성전자주식회사 | 다중 채널 디지털 앰프 시스템 및 그 신호 처리 방법 |
SE530180C2 (sv) * | 2006-04-19 | 2008-03-18 | Embracing Sound Experience Ab | Högtalaranordning |
US8064624B2 (en) * | 2007-07-19 | 2011-11-22 | Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. | Method and apparatus for generating a stereo signal with enhanced perceptual quality |
CN102484763B (zh) | 2009-07-22 | 2016-01-06 | 斯托明瑞士有限责任公司 | 用于优化立体声或伪立体声音频信号的设备和方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2648698A1 (de) * | 1976-10-27 | 1978-05-03 | Standard Elektrik Lorenz Ag | Nachrichtenempfangsgeraet mit einem stereodecoder |
JPS583434A (ja) * | 1981-06-30 | 1983-01-10 | Nippon Gakki Seizo Kk | ステレオ復調回路 |
US4503554A (en) * | 1983-06-03 | 1985-03-05 | Dbx, Inc. | Stereophonic balance control system |
US4972482A (en) * | 1987-09-18 | 1990-11-20 | Sanyo Electric Co., Ltd. | Fm stereo demodulator |
JP3112913B2 (ja) * | 1989-12-28 | 2000-11-27 | パイオニア株式会社 | 音質調整装置 |
DE4102834A1 (de) * | 1991-01-31 | 1992-08-06 | Rohde & Schwarz | Anordnung zum abgleich eines stereodecoders auf minimales uebersprechen |
-
1993
- 1993-08-10 DE DE4326811A patent/DE4326811A1/de not_active Withdrawn
-
1994
- 1994-08-05 US US08/286,607 patent/US5579395A/en not_active Expired - Fee Related
- 1994-08-08 BR BR9403199A patent/BR9403199A/pt not_active Application Discontinuation
- 1994-08-08 EP EP94202275A patent/EP0639038B1/de not_active Expired - Lifetime
- 1994-08-08 DE DE59410000T patent/DE59410000D1/de not_active Expired - Fee Related
- 1994-08-08 JP JP6185682A patent/JPH07154900A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPH07154900A (ja) | 1995-06-16 |
US5579395A (en) | 1996-11-26 |
EP0639038A2 (de) | 1995-02-15 |
DE4326811A1 (de) | 1995-02-16 |
BR9403199A (pt) | 1995-04-11 |
EP0639038A3 (de) | 1995-09-27 |
DE59410000D1 (de) | 2002-01-24 |
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