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DE69224755D1 - Verfahren zur Herstellung von Halbleiterkomponenten, insbesondere auf GaAs oder InP, bei dem das Substrat auf chemischem Wege wiedergewonnen wird - Google Patents

Verfahren zur Herstellung von Halbleiterkomponenten, insbesondere auf GaAs oder InP, bei dem das Substrat auf chemischem Wege wiedergewonnen wird

Info

Publication number
DE69224755D1
DE69224755D1 DE69224755T DE69224755T DE69224755D1 DE 69224755 D1 DE69224755 D1 DE 69224755D1 DE 69224755 T DE69224755 T DE 69224755T DE 69224755 T DE69224755 T DE 69224755T DE 69224755 D1 DE69224755 D1 DE 69224755D1
Authority
DE
Germany
Prior art keywords
inp
gaas
substrate
production
semiconductor components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69224755T
Other languages
English (en)
Other versions
DE69224755T2 (de
Inventor
Linh Nuyen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Picogiga SA
Original Assignee
Picogiga SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Picogiga SA filed Critical Picogiga SA
Application granted granted Critical
Publication of DE69224755D1 publication Critical patent/DE69224755D1/de
Publication of DE69224755T2 publication Critical patent/DE69224755T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/7605—Making of isolation regions between components between components manufactured in an active substrate comprising AIII BV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/05—Manufacture or treatment characterised by using material-based technologies using Group III-V technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Photovoltaic Devices (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Recrystallisation Techniques (AREA)
DE69224755T 1991-12-06 1992-12-04 Verfahren zur Herstellung von Halbleiterkomponenten, insbesondere auf GaAs oder InP, bei dem das Substrat auf chemischem Wege wiedergewonnen wird Expired - Fee Related DE69224755T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9115139A FR2684801B1 (fr) 1991-12-06 1991-12-06 Procede de realisation de composants semiconducteurs, notamment sur gaas ou inp, avec recuperation du substrat par voie chimique.
PCT/FR1992/001152 WO1993011559A1 (fr) 1991-12-06 1992-12-04 PROCEDE DE REALISATION DE COMPOSANTS SEMICONDUCTEURS, NOTAMMENT SUR GaAs OU InP, AVEC RECUPERATION DU SUBSTRAT PAR VOIE CHIMIQUE

Publications (2)

Publication Number Publication Date
DE69224755D1 true DE69224755D1 (de) 1998-04-16
DE69224755T2 DE69224755T2 (de) 1998-10-01

Family

ID=9419746

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69224755T Expired - Fee Related DE69224755T2 (de) 1991-12-06 1992-12-04 Verfahren zur Herstellung von Halbleiterkomponenten, insbesondere auf GaAs oder InP, bei dem das Substrat auf chemischem Wege wiedergewonnen wird

Country Status (6)

Country Link
US (1) US5593917A (de)
EP (1) EP0617839B1 (de)
JP (1) JPH07505257A (de)
DE (1) DE69224755T2 (de)
FR (1) FR2684801B1 (de)
WO (1) WO1993011559A1 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5827751A (en) * 1991-12-06 1998-10-27 Picogiga Societe Anonyme Method of making semiconductor components, in particular on GaAs of InP, with the substrate being recovered chemically
JPH0690014A (ja) * 1992-07-22 1994-03-29 Mitsubishi Electric Corp 薄型太陽電池及びその製造方法，エッチング方法及び自動エッチング装置，並びに半導体装置の製造方法
FR2715503B1 (fr) * 1994-01-26 1996-04-05 Commissariat Energie Atomique Substrat pour composants intégrés comportant une couche mince et son procédé de réalisation.
FR2731109A1 (fr) * 1995-02-27 1996-08-30 Picogiga Sa Composant a semiconducteurs iii-v et son procede de realisation
US6027958A (en) * 1996-07-11 2000-02-22 Kopin Corporation Transferred flexible integrated circuit
US6750149B2 (en) 1998-06-12 2004-06-15 Matsushita Electric Industrial Co., Ltd. Method of manufacturing electronic device
JP2001274528A (ja) 2000-01-21 2001-10-05 Fujitsu Ltd 薄膜デバイスの基板間転写方法
JP2001267578A (ja) * 2000-03-17 2001-09-28 Sony Corp 薄膜半導体装置及びその製造方法
JP3631956B2 (ja) * 2000-05-12 2005-03-23 富士通株式会社 半導体チップの実装方法
EP1162661B1 (de) * 2000-06-06 2006-09-27 STMicroelectronics S.r.l. Elektronischer Halbleiterbaustein mit Wärmeverteiler
US6627477B1 (en) * 2000-09-07 2003-09-30 International Business Machines Corporation Method of assembling a plurality of semiconductor devices having different thickness
TW521391B (en) * 2001-01-26 2003-02-21 Koninkl Philips Electronics Nv Method of manufacturing a display device
JP4649745B2 (ja) * 2001-02-01 2011-03-16 ソニー株式会社 発光素子の転写方法
US6878608B2 (en) * 2001-05-31 2005-04-12 International Business Machines Corporation Method of manufacture of silicon based package
FR2828579B1 (fr) * 2001-08-13 2004-01-30 St Microelectronics Sa Procede de manipulation d'une plaquette de silicium mince
JP4055405B2 (ja) * 2001-12-03 2008-03-05 ソニー株式会社 電子部品及びその製造方法
DE60206012T2 (de) 2002-02-05 2006-06-22 Dr. Bernd E. Maile Verfahren zur Herstellung einer T-förmigen Elektrode
EP1553640A4 (de) 2002-08-01 2006-09-06 Nichia Corp Halbleiter-lichtemissionsbauelement, verfahren zu seiner herstellung und lichtemissionsvorrichtung damit
CN101800183B (zh) * 2002-11-13 2013-02-06 日本冲信息株式会社 具有半导体薄膜的组合半导体装置
FR2878076B1 (fr) * 2004-11-17 2007-02-23 St Microelectronics Sa Amincissement d'une plaquette semiconductrice
JP5032231B2 (ja) * 2007-07-23 2012-09-26 リンテック株式会社 半導体装置の製造方法
DE102016004592B4 (de) * 2016-04-14 2017-11-02 Mühlbauer Gmbh & Co. Kg System und Verfahren zum Ausrichten elektronischer Bauteile
TWI765631B (zh) * 2021-03-31 2022-05-21 錼創顯示科技股份有限公司 微型發光元件結構及顯示裝置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3508980A (en) * 1967-07-26 1970-04-28 Motorola Inc Method of fabricating an integrated circuit structure with dielectric isolation
US3655540A (en) * 1970-06-22 1972-04-11 Bell Telephone Labor Inc Method of making semiconductor device components
GB1603260A (en) * 1978-05-31 1981-11-25 Secr Defence Devices and their fabrication
EP0029334B1 (de) * 1979-11-15 1984-04-04 The Secretary of State for Defence in Her Britannic Majesty's Government of the United Kingdom of Great Britain and Die Kombination der Halbleitervorrichtungen mit zwei in Serie geschalteten Elektroden und ihre Herstellung
US4369099A (en) * 1981-01-08 1983-01-18 Bell Telephone Laboratories, Incorporated Photoelectrochemical etching of semiconductors
IT1175541B (it) * 1984-06-22 1987-07-01 Telettra Lab Telefon Procedimento per la connessione a terra di dispositivi planari e circuiti integrati e prodotti cosi' ottenuti
JPS62171167A (ja) * 1986-01-23 1987-07-28 Mitsubishi Electric Corp 太陽電池の製造方法
IT1191977B (it) * 1986-06-30 1988-03-31 Selenia Ind Elettroniche Tecnica per allineare con fotolitografia convenzionale una struttura sul retro di un campione con alta precisione di registrazione
FR2639149A1 (fr) * 1988-11-15 1990-05-18 Thomson Csf Procede de realisation de composants sans substrat
GB2237143A (en) * 1989-09-15 1991-04-24 Philips Electronic Associated Two-terminal non-linear devices and their fabrication
HU213196B (en) * 1990-07-12 1997-03-28 Semilab Felvezetoe Fiz Lab Rt Process for electrochemical solving semiconductive materials and process for measuring parameters of semiconductive materials dependent on depth as a function of depth by electrochemical solving of semiconductive materials

Also Published As

Publication number Publication date
JPH07505257A (ja) 1995-06-08
EP0617839A1 (de) 1994-10-05
FR2684801A1 (fr) 1993-06-11
WO1993011559A1 (fr) 1993-06-10
US5593917A (en) 1997-01-14
EP0617839B1 (de) 1998-03-11
DE69224755T2 (de) 1998-10-01
FR2684801B1 (fr) 1997-01-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee