DE60211253D1 - Bitleitungs-Vorabladeschaltung für Halbleiterspeicher - Google Patents
Bitleitungs-Vorabladeschaltung für HalbleiterspeicherInfo
- Publication number
- DE60211253D1 DE60211253D1 DE60211253T DE60211253T DE60211253D1 DE 60211253 D1 DE60211253 D1 DE 60211253D1 DE 60211253 T DE60211253 T DE 60211253T DE 60211253 T DE60211253 T DE 60211253T DE 60211253 D1 DE60211253 D1 DE 60211253D1
- Authority
- DE
- Germany
- Prior art keywords
- vorabladeschaltung
- bit line
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001197534A JP2003016785A (ja) | 2001-06-28 | 2001-06-28 | 半導体記憶装置およびそれを用いた情報機器 |
| JP2001197534 | 2001-06-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE60211253D1 true DE60211253D1 (de) | 2006-06-14 |
| DE60211253T2 DE60211253T2 (de) | 2007-02-22 |
Family
ID=19035122
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE60211253T Expired - Lifetime DE60211253T2 (de) | 2001-06-28 | 2002-06-27 | Bitleitungs-Vorabladeschaltung für Halbleiterspeicher |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6947342B2 (de) |
| EP (1) | EP1271545B1 (de) |
| JP (1) | JP2003016785A (de) |
| KR (1) | KR100456990B1 (de) |
| DE (1) | DE60211253T2 (de) |
| TW (1) | TW561495B (de) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1679111B (zh) * | 2002-09-02 | 2011-06-15 | Nxp股份有限公司 | 同时向存储矩阵中的多个行进行写入的装置 |
| KR100555534B1 (ko) * | 2003-12-03 | 2006-03-03 | 삼성전자주식회사 | 인액티브 위크 프리차아징 및 이퀄라이징 스킴을 채용한프리차아지 회로, 이를 포함하는 메모리 장치 및 그프리차아지 방법 |
| JP5112860B2 (ja) * | 2004-05-24 | 2013-01-09 | ニコメド ファーマ エイエス | カルシム含有化合物および糖アルコールを含む微粒状物 |
| CA2644400C (en) * | 2005-02-03 | 2014-04-08 | Nycomed Pharma As | Fast wet-massing method for the preparation of calcium-containing compositions |
| DE102005055158B4 (de) * | 2005-11-18 | 2008-08-28 | Infineon Technologies Ag | Schaltungsanordnung mit einer Einrichtung zur Erkennung von Manipulationsversuchen und Verfahren zur Erkennung von Manipulationsversuchen bei einer Schaltungsanordnung |
| DE102006058865B4 (de) * | 2005-12-07 | 2010-06-10 | Samsung Electronics Co., Ltd., Suwon | Halbleiterspeicherbauelement und Verfahren zum Schreiben von Daten |
| JP2008191443A (ja) * | 2007-02-06 | 2008-08-21 | Nec Electronics Corp | 表示ドライバｉｃ |
| GB2525904B (en) * | 2014-05-08 | 2018-05-09 | Surecore Ltd | Memory unit |
| JP6540006B2 (ja) | 2014-12-11 | 2019-07-10 | 株式会社ソシオネクスト | ビット線プリチャージ回路、スタティックｒａｍ、電子デバイスおよびスタティックｒａｍのビット線プリチャージ方法 |
| KR102341230B1 (ko) * | 2015-05-08 | 2021-12-21 | 에스케이하이닉스 주식회사 | 저항 또는 셀에 저장된 정보를 리드하는 반도체 장치 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59151389A (ja) | 1983-02-18 | 1984-08-29 | Hitachi Ltd | 大規模集積回路 |
| NL8702800A (nl) | 1987-11-23 | 1989-06-16 | Philips Nv | Geintegreerde geheugenschakeling met interne voedingsspanningsregeling. |
| FR2652672B1 (fr) * | 1989-10-02 | 1991-12-20 | Sgs Thomson Microelectronics | Memoire a temps de lecture ameliore. |
| JPH04252497A (ja) | 1991-01-28 | 1992-09-08 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置 |
| KR950020726A (ko) * | 1993-12-30 | 1995-07-24 | 문정환 | 분리형 센세앰프의 등화회로 |
| JP3705842B2 (ja) * | 1994-08-04 | 2005-10-12 | 株式会社ルネサステクノロジ | 半導体装置 |
| JPH0869693A (ja) * | 1994-08-30 | 1996-03-12 | Mitsubishi Electric Corp | スタティック型半導体記憶装置 |
| JPH10302468A (ja) * | 1997-04-23 | 1998-11-13 | Toshiba Corp | 半導体記憶装置 |
| KR100297727B1 (ko) * | 1998-08-13 | 2001-09-26 | 윤종용 | 분리 제어라인의 큰 부하에 의한 스피드 손실을 방지할 수 있는반도체 메모리 장치 |
| KR20000021078A (ko) * | 1998-09-25 | 2000-04-15 | 김영환 | 비트라인 센스앰프의 구동장치 |
| JP2001110184A (ja) | 1999-10-14 | 2001-04-20 | Hitachi Ltd | 半導体装置 |
| JP2002042467A (ja) * | 2000-07-21 | 2002-02-08 | Mitsubishi Electric Corp | 電圧降圧回路およびそれを備える半導体集積回路装置 |
| JP2002133869A (ja) * | 2000-10-30 | 2002-05-10 | Mitsubishi Electric Corp | 半導体記憶装置 |
-
2001
- 2001-06-28 JP JP2001197534A patent/JP2003016785A/ja active Pending
-
2002
- 2002-06-25 US US10/183,700 patent/US6947342B2/en not_active Expired - Fee Related
- 2002-06-27 TW TW091114168A patent/TW561495B/zh not_active IP Right Cessation
- 2002-06-27 DE DE60211253T patent/DE60211253T2/de not_active Expired - Lifetime
- 2002-06-27 EP EP02254538A patent/EP1271545B1/de not_active Expired - Lifetime
- 2002-06-28 KR KR10-2002-0036914A patent/KR100456990B1/ko not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| TW561495B (en) | 2003-11-11 |
| EP1271545B1 (de) | 2006-05-10 |
| DE60211253T2 (de) | 2007-02-22 |
| KR20030003093A (ko) | 2003-01-09 |
| US6947342B2 (en) | 2005-09-20 |
| KR100456990B1 (ko) | 2004-11-10 |
| US20030021168A1 (en) | 2003-01-30 |
| EP1271545A1 (de) | 2003-01-02 |
| JP2003016785A (ja) | 2003-01-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition |