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DE3886114D1 - Halbleiterspeichergerät mit redundanter Speicherzellenmatrix. - Google Patents

Halbleiterspeichergerät mit redundanter Speicherzellenmatrix.

Info

Publication number
DE3886114D1
DE3886114D1 DE88111715T DE3886114T DE3886114D1 DE 3886114 D1 DE3886114 D1 DE 3886114D1 DE 88111715 T DE88111715 T DE 88111715T DE 3886114 T DE3886114 T DE 3886114T DE 3886114 D1 DE3886114 D1 DE 3886114D1
Authority
DE
Germany
Prior art keywords
cell matrix
memory cell
memory device
semiconductor memory
redundant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE88111715T
Other languages
English (en)
Other versions
DE3886114T2 (de
Inventor
Takahiko Urai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE3886114D1 publication Critical patent/DE3886114D1/de
Application granted granted Critical
Publication of DE3886114T2 publication Critical patent/DE3886114T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/848—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by adjacent switching
DE88111715T 1987-07-20 1988-07-20 Halbleiterspeichergerät mit redundanter Speicherzellenmatrix. Expired - Fee Related DE3886114T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62181612A JP2590897B2 (ja) 1987-07-20 1987-07-20 半導体メモリ

Publications (2)

Publication Number Publication Date
DE3886114D1 true DE3886114D1 (de) 1994-01-20
DE3886114T2 DE3886114T2 (de) 1994-04-14

Family

ID=16103847

Family Applications (1)

Application Number Title Priority Date Filing Date
DE88111715T Expired - Fee Related DE3886114T2 (de) 1987-07-20 1988-07-20 Halbleiterspeichergerät mit redundanter Speicherzellenmatrix.

Country Status (4)

Country Link
US (1) US4908798A (de)
EP (1) EP0300467B1 (de)
JP (1) JP2590897B2 (de)
DE (1) DE3886114T2 (de)

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JPH02276098A (ja) * 1989-01-10 1990-11-09 Matsushita Electron Corp 半導体メモリ装置
JP2547633B2 (ja) * 1989-05-09 1996-10-23 三菱電機株式会社 半導体記憶装置
US5289417A (en) * 1989-05-09 1994-02-22 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device with redundancy circuit
JP2837433B2 (ja) * 1989-06-05 1998-12-16 三菱電機株式会社 半導体記憶装置における不良ビット救済回路
US5471427A (en) * 1989-06-05 1995-11-28 Mitsubishi Denki Kabushiki Kaisha Circuit for repairing defective bit in semiconductor memory device and repairing method
EP0411626B1 (de) * 1989-08-04 1995-10-25 Fujitsu Limited Halbleiterspeichergerät mit Redundanz
JPH0371500A (ja) * 1989-08-11 1991-03-27 Sony Corp 半導体メモリ
GB8926004D0 (en) * 1989-11-17 1990-01-10 Inmos Ltd Repairable memory circuit
JPH03235290A (ja) * 1990-02-09 1991-10-21 Mitsubishi Electric Corp 階層的な行選択線を有する半導体記憶装置
US5134616A (en) * 1990-02-13 1992-07-28 International Business Machines Corporation Dynamic ram with on-chip ecc and optimized bit and word redundancy
JP3001252B2 (ja) * 1990-11-16 2000-01-24 株式会社日立製作所 半導体メモリ
KR940008208B1 (ko) * 1990-12-22 1994-09-08 삼성전자주식회사 반도체 메모리장치의 리던던트 장치 및 방법
EP0499131A1 (de) * 1991-02-12 1992-08-19 Texas Instruments Incorporated Hochleistungsfähige Reihenredundanz für einen dynamischen Speicher
JP2853406B2 (ja) * 1991-09-10 1999-02-03 日本電気株式会社 半導体記憶装置
JP2687785B2 (ja) * 1991-09-27 1997-12-08 日本電気株式会社 半導体記憶装置
JP3158542B2 (ja) * 1991-10-09 2001-04-23 日本電気株式会社 半導体メモリ装置
JP2738195B2 (ja) * 1991-12-27 1998-04-08 日本電気株式会社 不揮発性半導体記憶装置
JPH05210998A (ja) * 1992-01-30 1993-08-20 Nec Corp 半導体メモリ装置
JP3040625B2 (ja) * 1992-02-07 2000-05-15 松下電器産業株式会社 半導体記憶装置
JPH05314788A (ja) * 1992-05-07 1993-11-26 Mitsubishi Electric Corp リダンダンシ回路
JP3180231B2 (ja) * 1992-11-10 2001-06-25 株式会社 沖情報システムズ アドレス設定方法
KR950004623B1 (ko) * 1992-12-07 1995-05-03 삼성전자주식회사 리던던시 효율이 향상되는 반도체 메모리 장치
US5491664A (en) * 1993-09-27 1996-02-13 Cypress Semiconductor Corporation Flexibilitiy for column redundancy in a divided array architecture
JPH07105697A (ja) * 1993-10-07 1995-04-21 Mitsubishi Electric Corp 半導体記憶装置
JPH07182893A (ja) * 1993-12-24 1995-07-21 Mitsubishi Electric Corp 半導体記憶装置
US5579277A (en) * 1995-05-01 1996-11-26 Apple Computer, Inc. System and method for interleaving memory banks
US5841710A (en) * 1997-02-14 1998-11-24 Micron Electronics, Inc. Dynamic address remapping decoder
JP3581249B2 (ja) * 1997-06-10 2004-10-27 株式会社東芝 半導体不良ビット救済処理方法及び半導体不良ビット救済処理装置
US6332183B1 (en) 1998-03-05 2001-12-18 Micron Technology, Inc. Method for recovery of useful areas of partially defective synchronous memory components
US6314527B1 (en) 1998-03-05 2001-11-06 Micron Technology, Inc. Recovery of useful areas of partially defective synchronous memory components
US6381708B1 (en) 1998-04-28 2002-04-30 Micron Technology, Inc. Method for decoding addresses for a defective memory array
US6381707B1 (en) 1998-04-28 2002-04-30 Micron Technology, Inc. System for decoding addresses for a defective memory array
US6496876B1 (en) 1998-12-21 2002-12-17 Micron Technology, Inc. System and method for storing a tag to identify a functional storage location in a memory device
KR20000045361A (ko) * 1998-12-30 2000-07-15 김영환 워드라인 구동장치
JP2001076496A (ja) * 1999-09-02 2001-03-23 Fujitsu Ltd 不揮発性メモリのデータ化け防止回路およびその方法
US6249464B1 (en) 1999-12-15 2001-06-19 Cypress Semiconductor Corp. Block redundancy in ultra low power memory circuits
US6578157B1 (en) 2000-03-06 2003-06-10 Micron Technology, Inc. Method and apparatus for recovery of useful areas of partially defective direct rambus rimm components
US7269765B1 (en) 2000-04-13 2007-09-11 Micron Technology, Inc. Method and apparatus for storing failing part locations in a module
DE10121131C1 (de) * 2001-04-30 2002-12-19 Infineon Technologies Ag Datenspeicher
KR100809683B1 (ko) * 2005-07-14 2008-03-07 삼성전자주식회사 멀티 로우 어드레스 테스트 시간을 감소시킬 수 있는반도체 메모리 장치 및 멀티 로우 어드레스 테스트 방법.
JP2011198414A (ja) * 2010-03-19 2011-10-06 Toshiba Corp 半導体記憶装置
CN102682854A (zh) * 2012-05-09 2012-09-19 上海宏力半导体制造有限公司 具有冗余电路的存储器以及为存储器提供冗余电路的方法
US11221794B2 (en) * 2019-02-20 2022-01-11 International Business Machines Corporation Memory array element sparing
CN114297005A (zh) * 2021-12-29 2022-04-08 成都博尔微晶科技有限公司 一种针对Norflash的小面积、可多次列冗余替换方法

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Publication number Priority date Publication date Assignee Title
JPS5528160B2 (de) * 1974-12-16 1980-07-25
JPS51138336A (en) * 1975-05-26 1976-11-29 Hitachi Ltd Memory sysem
JPS5334430A (en) * 1976-09-10 1978-03-31 Fujitsu Ltd Memory unit
JPS5677997A (en) * 1979-11-28 1981-06-26 Fujitsu Ltd Semiconductor memory device
JPS58130495A (ja) * 1982-01-29 1983-08-03 Toshiba Corp 半導体記憶装置
US4471472A (en) * 1982-02-05 1984-09-11 Advanced Micro Devices, Inc. Semiconductor memory utilizing an improved redundant circuitry configuration
JPS5919367A (ja) * 1982-07-26 1984-01-31 Toshiba Corp メモリ付ゲ−トアレイ
JPS59144098A (ja) * 1983-02-08 1984-08-17 Fujitsu Ltd 半導体記憶装置
US4601019B1 (en) * 1983-08-31 1997-09-30 Texas Instruments Inc Memory with redundancy
JPH0666120B2 (ja) * 1983-11-09 1994-08-24 株式会社東芝 半導体記憶装置の冗長部
JPH0666394B2 (ja) * 1983-12-16 1994-08-24 富士通株式会社 半導体記憶装置
GB2154032B (en) * 1984-02-08 1988-04-20 Inmos Ltd A repairable memory array
JPS6221198A (ja) * 1985-07-22 1987-01-29 藤倉電工株式会社 ベル

Also Published As

Publication number Publication date
EP0300467A2 (de) 1989-01-25
JPS6425398A (en) 1989-01-27
EP0300467B1 (de) 1993-12-08
US4908798A (en) 1990-03-13
EP0300467A3 (en) 1990-06-27
DE3886114T2 (de) 1994-04-14
JP2590897B2 (ja) 1997-03-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee